head-nommu.S 2.3 KB

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  1. /*
  2. * linux/arch/arm/kernel/head-nommu.S
  3. *
  4. * Copyright (C) 1994-2002 Russell King
  5. * Copyright (C) 2003-2006 Hyok S. Choi
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Common kernel startup code (non-paged MM)
  12. *
  13. */
  14. #include <linux/linkage.h>
  15. #include <linux/init.h>
  16. #include <asm/assembler.h>
  17. #include <asm/mach-types.h>
  18. #include <asm/procinfo.h>
  19. #include <asm/ptrace.h>
  20. #include <asm/asm-offsets.h>
  21. #include <asm/thread_info.h>
  22. #include <asm/system.h>
  23. /*
  24. * Kernel startup entry point.
  25. * ---------------------------
  26. *
  27. * This is normally called from the decompressor code. The requirements
  28. * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
  29. * r1 = machine nr.
  30. *
  31. * See linux/arch/arm/tools/mach-types for the complete list of machine
  32. * numbers for r1.
  33. *
  34. */
  35. __INIT
  36. .type stext, %function
  37. ENTRY(stext)
  38. msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | SVC_MODE @ ensure svc mode
  39. @ and irqs disabled
  40. #ifndef CONFIG_CPU_CP15
  41. ldr r9, =CONFIG_PROCESSOR_ID
  42. #else
  43. mrc p15, 0, r9, c0, c0 @ get processor id
  44. #endif
  45. bl __lookup_processor_type @ r5=procinfo r9=cpuid
  46. movs r10, r5 @ invalid processor (r5=0)?
  47. beq __error_p @ yes, error 'p'
  48. bl __lookup_machine_type @ r5=machinfo
  49. movs r8, r5 @ invalid machine (r5=0)?
  50. beq __error_a @ yes, error 'a'
  51. ldr r13, __switch_data @ address to jump to after
  52. @ the initialization is done
  53. adr lr, __after_proc_init @ return (PIC) address
  54. add pc, r10, #PROCINFO_INITFUNC
  55. /*
  56. * Set the Control Register and Read the process ID.
  57. */
  58. .type __after_proc_init, %function
  59. __after_proc_init:
  60. #ifdef CONFIG_CPU_CP15
  61. mrc p15, 0, r0, c1, c0, 0 @ read control reg
  62. #ifdef CONFIG_ALIGNMENT_TRAP
  63. orr r0, r0, #CR_A
  64. #else
  65. bic r0, r0, #CR_A
  66. #endif
  67. #ifdef CONFIG_CPU_DCACHE_DISABLE
  68. bic r0, r0, #CR_C
  69. #endif
  70. #ifdef CONFIG_CPU_BPREDICT_DISABLE
  71. bic r0, r0, #CR_Z
  72. #endif
  73. #ifdef CONFIG_CPU_ICACHE_DISABLE
  74. bic r0, r0, #CR_I
  75. #endif
  76. #ifdef CONFIG_CPU_HIGH_VECTOR
  77. orr r0, r0, #CR_V
  78. #else
  79. bic r0, r0, #CR_V
  80. #endif
  81. mcr p15, 0, r0, c1, c0, 0 @ write control reg
  82. #endif /* CONFIG_CPU_CP15 */
  83. mov pc, r13 @ clear the BSS and jump
  84. @ to start_kernel
  85. .ltorg
  86. #include "head-common.S"