setup.c 12 KB

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  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <linux/seq_file.h>
  9. #include <linux/fs.h>
  10. #include <linux/delay.h>
  11. #include <linux/root_dev.h>
  12. #include <linux/console.h>
  13. #include <linux/module.h>
  14. #include <linux/cpu.h>
  15. #include <linux/of_fdt.h>
  16. #include <asm/sections.h>
  17. #include <asm/arcregs.h>
  18. #include <asm/tlb.h>
  19. #include <asm/cache.h>
  20. #include <asm/setup.h>
  21. #include <asm/page.h>
  22. #include <asm/irq.h>
  23. #include <asm/arcregs.h>
  24. #include <asm/prom.h>
  25. #include <asm/unwind.h>
  26. #include <asm/clk.h>
  27. #include <asm/mach_desc.h>
  28. #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
  29. int running_on_hw = 1; /* vs. on ISS */
  30. char __initdata command_line[COMMAND_LINE_SIZE];
  31. struct machine_desc *machine_desc __initdata;
  32. struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
  33. struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  34. void __init read_arc_build_cfg_regs(void)
  35. {
  36. struct bcr_perip uncached_space;
  37. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  38. FIX_PTR(cpu);
  39. READ_BCR(AUX_IDENTITY, cpu->core);
  40. cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
  41. cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
  42. if (cpu->vec_base == 0)
  43. cpu->vec_base = (unsigned int)_int_vec_base_lds;
  44. READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
  45. cpu->uncached_base = uncached_space.start << 24;
  46. cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
  47. cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
  48. cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
  49. cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
  50. cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
  51. READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
  52. cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
  53. cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
  54. /* Note that we read the CCM BCRs independent of kernel config
  55. * This is to catch the cases where user doesn't know that
  56. * CCMs are present in hardware build
  57. */
  58. {
  59. struct bcr_iccm iccm;
  60. struct bcr_dccm dccm;
  61. struct bcr_dccm_base dccm_base;
  62. unsigned int bcr_32bit_val;
  63. bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
  64. if (bcr_32bit_val) {
  65. iccm = *((struct bcr_iccm *)&bcr_32bit_val);
  66. cpu->iccm.base_addr = iccm.base << 16;
  67. cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
  68. }
  69. bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
  70. if (bcr_32bit_val) {
  71. dccm = *((struct bcr_dccm *)&bcr_32bit_val);
  72. cpu->dccm.sz = 0x800 << (dccm.sz);
  73. READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
  74. cpu->dccm.base_addr = dccm_base.addr << 8;
  75. }
  76. }
  77. READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
  78. read_decode_mmu_bcr();
  79. read_decode_cache_bcr();
  80. READ_BCR(ARC_REG_FP_BCR, cpu->fp);
  81. READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
  82. }
  83. static const struct cpuinfo_data arc_cpu_tbl[] = {
  84. { {0x10, "ARCTangent A5"}, 0x1F},
  85. { {0x20, "ARC 600" }, 0x2F},
  86. { {0x30, "ARC 700" }, 0x33},
  87. { {0x34, "ARC 700 R4.10"}, 0x34},
  88. { {0x00, NULL } }
  89. };
  90. char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
  91. {
  92. int n = 0;
  93. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  94. struct bcr_identity *core = &cpu->core;
  95. const struct cpuinfo_data *tbl;
  96. int be = 0;
  97. #ifdef CONFIG_CPU_BIG_ENDIAN
  98. be = 1;
  99. #endif
  100. FIX_PTR(cpu);
  101. n += scnprintf(buf + n, len - n,
  102. "\nARC IDENTITY\t: Family [%#02x]"
  103. " Cpu-id [%#02x] Chip-id [%#4x]\n",
  104. core->family, core->cpu_id,
  105. core->chip_id);
  106. for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
  107. if ((core->family >= tbl->info.id) &&
  108. (core->family <= tbl->up_range)) {
  109. n += scnprintf(buf + n, len - n,
  110. "processor\t: %s %s\n",
  111. tbl->info.str,
  112. be ? "[Big Endian]" : "");
  113. break;
  114. }
  115. }
  116. if (tbl->info.id == 0)
  117. n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
  118. n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
  119. (unsigned int)(arc_get_core_freq() / 1000000),
  120. (unsigned int)(arc_get_core_freq() / 10000) % 100);
  121. n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
  122. (cpu->timers & 0x200) ? "TIMER1" : "",
  123. (cpu->timers & 0x100) ? "TIMER0" : "");
  124. n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
  125. cpu->vec_base);
  126. n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
  127. cpu->uncached_base);
  128. return buf;
  129. }
  130. static const struct id_to_str mul_type_nm[] = {
  131. { 0x0, "N/A"},
  132. { 0x1, "32x32 (spl Result Reg)" },
  133. { 0x2, "32x32 (ANY Result Reg)" }
  134. };
  135. static const struct id_to_str mac_mul_nm[] = {
  136. {0x0, "N/A"},
  137. {0x1, "N/A"},
  138. {0x2, "Dual 16 x 16"},
  139. {0x3, "N/A"},
  140. {0x4, "32x16"},
  141. {0x5, "N/A"},
  142. {0x6, "Dual 16x16 and 32x16"}
  143. };
  144. char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
  145. {
  146. int n = 0;
  147. struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
  148. FIX_PTR(cpu);
  149. #define IS_AVAIL1(var, str) ((var) ? str : "")
  150. #define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
  151. #define IS_USED(var) ((var) ? "(in-use)" : "(not used)")
  152. n += scnprintf(buf + n, len - n,
  153. "Extn [700-Base]\t: %s %s %s %s %s %s\n",
  154. IS_AVAIL2(cpu->extn.norm, "norm,"),
  155. IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
  156. IS_AVAIL1(cpu->extn.swap, "swap,"),
  157. IS_AVAIL2(cpu->extn.minmax, "minmax,"),
  158. IS_AVAIL1(cpu->extn.crc, "crc,"),
  159. IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
  160. n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
  161. mul_type_nm[cpu->extn.mul].str);
  162. n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
  163. mac_mul_nm[cpu->extn_mac_mul.type].str);
  164. if (cpu->core.family == 0x34) {
  165. n += scnprintf(buf + n, len - n,
  166. "Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
  167. IS_USED(__CONFIG_ARC_HAS_LLSC_VAL),
  168. IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL),
  169. IS_USED(__CONFIG_ARC_HAS_RTSC_VAL));
  170. }
  171. n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
  172. !(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
  173. if (cpu->dccm.sz)
  174. n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
  175. cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
  176. if (cpu->iccm.sz)
  177. n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
  178. cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
  179. n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
  180. !(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
  181. if (cpu->fp.ver)
  182. n += scnprintf(buf + n, len - n, "SP [v%d] %s",
  183. cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
  184. if (cpu->dpfp.ver)
  185. n += scnprintf(buf + n, len - n, "DP [v%d] %s",
  186. cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
  187. n += scnprintf(buf + n, len - n, "\n");
  188. #ifdef _ASM_GENERIC_UNISTD_H
  189. n += scnprintf(buf + n, len - n,
  190. "OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
  191. #endif
  192. return buf;
  193. }
  194. void __init arc_chk_ccms(void)
  195. {
  196. #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
  197. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  198. #ifdef CONFIG_ARC_HAS_DCCM
  199. /*
  200. * DCCM can be arbit placed in hardware.
  201. * Make sure it's placement/sz matches what Linux is built with
  202. */
  203. if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
  204. panic("Linux built with incorrect DCCM Base address\n");
  205. if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
  206. panic("Linux built with incorrect DCCM Size\n");
  207. #endif
  208. #ifdef CONFIG_ARC_HAS_ICCM
  209. if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
  210. panic("Linux built with incorrect ICCM Size\n");
  211. #endif
  212. #endif
  213. }
  214. /*
  215. * Ensure that FP hardware and kernel config match
  216. * -If hardware contains DPFP, kernel needs to save/restore FPU state
  217. * across context switches
  218. * -If hardware lacks DPFP, but kernel configured to save FPU state then
  219. * kernel trying to access non-existant DPFP regs will crash
  220. *
  221. * We only check for Dbl precision Floating Point, because only DPFP
  222. * hardware has dedicated regs which need to be saved/restored on ctx-sw
  223. * (Single Precision uses core regs), thus kernel is kind of oblivious to it
  224. */
  225. void __init arc_chk_fpu(void)
  226. {
  227. struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
  228. if (cpu->dpfp.ver) {
  229. #ifndef CONFIG_ARC_FPU_SAVE_RESTORE
  230. pr_warn("DPFP support broken in this kernel...\n");
  231. #endif
  232. } else {
  233. #ifdef CONFIG_ARC_FPU_SAVE_RESTORE
  234. panic("H/w lacks DPFP support, apps won't work\n");
  235. #endif
  236. }
  237. }
  238. /*
  239. * Initialize and setup the processor core
  240. * This is called by all the CPUs thus should not do special case stuff
  241. * such as only for boot CPU etc
  242. */
  243. void __init setup_processor(void)
  244. {
  245. char str[512];
  246. int cpu_id = smp_processor_id();
  247. read_arc_build_cfg_regs();
  248. arc_init_IRQ();
  249. printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
  250. arc_mmu_init();
  251. arc_cache_init();
  252. arc_chk_ccms();
  253. printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
  254. #ifdef CONFIG_SMP
  255. printk(arc_platform_smp_cpuinfo());
  256. #endif
  257. arc_chk_fpu();
  258. }
  259. void __init setup_arch(char **cmdline_p)
  260. {
  261. #ifdef CONFIG_CMDLINE_UBOOT
  262. /* Make sure that a whitespace is inserted before */
  263. strlcat(command_line, " ", sizeof(command_line));
  264. #endif
  265. /*
  266. * Append .config cmdline to base command line, which might already
  267. * contain u-boot "bootargs" (handled by head.S, if so configured)
  268. */
  269. strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
  270. /* Save unparsed command line copy for /proc/cmdline */
  271. strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  272. *cmdline_p = command_line;
  273. machine_desc = setup_machine_fdt(__dtb_start);
  274. if (!machine_desc)
  275. panic("Embedded DT invalid\n");
  276. /* To force early parsing of things like mem=xxx */
  277. parse_early_param();
  278. /* Platform/board specific: e.g. early console registration */
  279. if (machine_desc->init_early)
  280. machine_desc->init_early();
  281. setup_processor();
  282. #ifdef CONFIG_SMP
  283. smp_init_cpus();
  284. #endif
  285. setup_arch_memory();
  286. /* copy flat DT out of .init and then unflatten it */
  287. copy_devtree();
  288. unflatten_device_tree();
  289. /* Can be issue if someone passes cmd line arg "ro"
  290. * But that is unlikely so keeping it as it is
  291. */
  292. root_mountflags &= ~MS_RDONLY;
  293. console_verbose();
  294. #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
  295. conswitchp = &dummy_con;
  296. #endif
  297. arc_unwind_init();
  298. arc_unwind_setup();
  299. }
  300. static int __init customize_machine(void)
  301. {
  302. /* Add platform devices */
  303. if (machine_desc->init_machine)
  304. machine_desc->init_machine();
  305. return 0;
  306. }
  307. arch_initcall(customize_machine);
  308. static int __init init_late_machine(void)
  309. {
  310. if (machine_desc->init_late)
  311. machine_desc->init_late();
  312. return 0;
  313. }
  314. late_initcall(init_late_machine);
  315. /*
  316. * Get CPU information for use by the procfs.
  317. */
  318. #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
  319. #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
  320. static int show_cpuinfo(struct seq_file *m, void *v)
  321. {
  322. char *str;
  323. int cpu_id = ptr_to_cpu(v);
  324. str = (char *)__get_free_page(GFP_TEMPORARY);
  325. if (!str)
  326. goto done;
  327. seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  328. seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
  329. loops_per_jiffy / (500000 / HZ),
  330. (loops_per_jiffy / (5000 / HZ)) % 100);
  331. seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
  332. seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
  333. seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
  334. #ifdef CONFIG_SMP
  335. seq_printf(m, arc_platform_smp_cpuinfo());
  336. #endif
  337. free_page((unsigned long)str);
  338. done:
  339. seq_printf(m, "\n\n");
  340. return 0;
  341. }
  342. static void *c_start(struct seq_file *m, loff_t *pos)
  343. {
  344. /*
  345. * Callback returns cpu-id to iterator for show routine, NULL to stop.
  346. * However since NULL is also a valid cpu-id (0), we use a round-about
  347. * way to pass it w/o having to kmalloc/free a 2 byte string.
  348. * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
  349. */
  350. return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
  351. }
  352. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  353. {
  354. ++*pos;
  355. return c_start(m, pos);
  356. }
  357. static void c_stop(struct seq_file *m, void *v)
  358. {
  359. }
  360. const struct seq_operations cpuinfo_op = {
  361. .start = c_start,
  362. .next = c_next,
  363. .stop = c_stop,
  364. .show = show_cpuinfo
  365. };
  366. static DEFINE_PER_CPU(struct cpu, cpu_topology);
  367. static int __init topology_init(void)
  368. {
  369. int cpu;
  370. for_each_present_cpu(cpu)
  371. register_cpu(&per_cpu(cpu_topology, cpu), cpu);
  372. return 0;
  373. }
  374. subsys_initcall(topology_init);