ymfpci_main.c 71 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/delay.h>
  21. #include <linux/firmware.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/pci.h>
  25. #include <linux/sched.h>
  26. #include <linux/slab.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/mutex.h>
  29. #include <sound/core.h>
  30. #include <sound/control.h>
  31. #include <sound/info.h>
  32. #include <sound/tlv.h>
  33. #include <sound/ymfpci.h>
  34. #include <sound/asoundef.h>
  35. #include <sound/mpu401.h>
  36. #include <asm/io.h>
  37. #include <asm/byteorder.h>
  38. /*
  39. * common I/O routines
  40. */
  41. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  42. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  43. {
  44. return readb(chip->reg_area_virt + offset);
  45. }
  46. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  47. {
  48. writeb(val, chip->reg_area_virt + offset);
  49. }
  50. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  51. {
  52. return readw(chip->reg_area_virt + offset);
  53. }
  54. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  55. {
  56. writew(val, chip->reg_area_virt + offset);
  57. }
  58. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  59. {
  60. return readl(chip->reg_area_virt + offset);
  61. }
  62. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  63. {
  64. writel(val, chip->reg_area_virt + offset);
  65. }
  66. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  67. {
  68. unsigned long end_time;
  69. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  70. end_time = jiffies + msecs_to_jiffies(750);
  71. do {
  72. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  73. return 0;
  74. schedule_timeout_uninterruptible(1);
  75. } while (time_before(jiffies, end_time));
  76. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  77. return -EBUSY;
  78. }
  79. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  80. {
  81. struct snd_ymfpci *chip = ac97->private_data;
  82. u32 cmd;
  83. snd_ymfpci_codec_ready(chip, 0);
  84. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  85. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  86. }
  87. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  88. {
  89. struct snd_ymfpci *chip = ac97->private_data;
  90. if (snd_ymfpci_codec_ready(chip, 0))
  91. return ~0;
  92. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  93. if (snd_ymfpci_codec_ready(chip, 0))
  94. return ~0;
  95. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  96. int i;
  97. for (i = 0; i < 600; i++)
  98. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  99. }
  100. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  101. }
  102. /*
  103. * Misc routines
  104. */
  105. static u32 snd_ymfpci_calc_delta(u32 rate)
  106. {
  107. switch (rate) {
  108. case 8000: return 0x02aaab00;
  109. case 11025: return 0x03accd00;
  110. case 16000: return 0x05555500;
  111. case 22050: return 0x07599a00;
  112. case 32000: return 0x0aaaab00;
  113. case 44100: return 0x0eb33300;
  114. default: return ((rate << 16) / 375) << 5;
  115. }
  116. }
  117. static u32 def_rate[8] = {
  118. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  119. };
  120. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  121. {
  122. u32 i;
  123. static u32 val[8] = {
  124. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  125. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  126. };
  127. if (rate == 44100)
  128. return 0x40000000; /* FIXME: What's the right value? */
  129. for (i = 0; i < 8; i++)
  130. if (rate <= def_rate[i])
  131. return val[i];
  132. return val[0];
  133. }
  134. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  135. {
  136. u32 i;
  137. static u32 val[8] = {
  138. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  139. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  140. };
  141. if (rate == 44100)
  142. return 0x370A0000;
  143. for (i = 0; i < 8; i++)
  144. if (rate <= def_rate[i])
  145. return val[i];
  146. return val[0];
  147. }
  148. /*
  149. * Hardware start management
  150. */
  151. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  152. {
  153. unsigned long flags;
  154. spin_lock_irqsave(&chip->reg_lock, flags);
  155. if (chip->start_count++ > 0)
  156. goto __end;
  157. snd_ymfpci_writel(chip, YDSXGR_MODE,
  158. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  159. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  160. __end:
  161. spin_unlock_irqrestore(&chip->reg_lock, flags);
  162. }
  163. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  164. {
  165. unsigned long flags;
  166. long timeout = 1000;
  167. spin_lock_irqsave(&chip->reg_lock, flags);
  168. if (--chip->start_count > 0)
  169. goto __end;
  170. snd_ymfpci_writel(chip, YDSXGR_MODE,
  171. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  172. while (timeout-- > 0) {
  173. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  174. break;
  175. }
  176. if (atomic_read(&chip->interrupt_sleep_count)) {
  177. atomic_set(&chip->interrupt_sleep_count, 0);
  178. wake_up(&chip->interrupt_sleep);
  179. }
  180. __end:
  181. spin_unlock_irqrestore(&chip->reg_lock, flags);
  182. }
  183. /*
  184. * Playback voice management
  185. */
  186. static int voice_alloc(struct snd_ymfpci *chip,
  187. enum snd_ymfpci_voice_type type, int pair,
  188. struct snd_ymfpci_voice **rvoice)
  189. {
  190. struct snd_ymfpci_voice *voice, *voice2;
  191. int idx;
  192. *rvoice = NULL;
  193. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  194. voice = &chip->voices[idx];
  195. voice2 = pair ? &chip->voices[idx+1] : NULL;
  196. if (voice->use || (voice2 && voice2->use))
  197. continue;
  198. voice->use = 1;
  199. if (voice2)
  200. voice2->use = 1;
  201. switch (type) {
  202. case YMFPCI_PCM:
  203. voice->pcm = 1;
  204. if (voice2)
  205. voice2->pcm = 1;
  206. break;
  207. case YMFPCI_SYNTH:
  208. voice->synth = 1;
  209. break;
  210. case YMFPCI_MIDI:
  211. voice->midi = 1;
  212. break;
  213. }
  214. snd_ymfpci_hw_start(chip);
  215. if (voice2)
  216. snd_ymfpci_hw_start(chip);
  217. *rvoice = voice;
  218. return 0;
  219. }
  220. return -ENOMEM;
  221. }
  222. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  223. enum snd_ymfpci_voice_type type, int pair,
  224. struct snd_ymfpci_voice **rvoice)
  225. {
  226. unsigned long flags;
  227. int result;
  228. if (snd_BUG_ON(!rvoice))
  229. return -EINVAL;
  230. if (snd_BUG_ON(pair && type != YMFPCI_PCM))
  231. return -EINVAL;
  232. spin_lock_irqsave(&chip->voice_lock, flags);
  233. for (;;) {
  234. result = voice_alloc(chip, type, pair, rvoice);
  235. if (result == 0 || type != YMFPCI_PCM)
  236. break;
  237. /* TODO: synth/midi voice deallocation */
  238. break;
  239. }
  240. spin_unlock_irqrestore(&chip->voice_lock, flags);
  241. return result;
  242. }
  243. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  244. {
  245. unsigned long flags;
  246. if (snd_BUG_ON(!pvoice))
  247. return -EINVAL;
  248. snd_ymfpci_hw_stop(chip);
  249. spin_lock_irqsave(&chip->voice_lock, flags);
  250. if (pvoice->number == chip->src441_used) {
  251. chip->src441_used = -1;
  252. pvoice->ypcm->use_441_slot = 0;
  253. }
  254. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  255. pvoice->ypcm = NULL;
  256. pvoice->interrupt = NULL;
  257. spin_unlock_irqrestore(&chip->voice_lock, flags);
  258. return 0;
  259. }
  260. /*
  261. * PCM part
  262. */
  263. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  264. {
  265. struct snd_ymfpci_pcm *ypcm;
  266. u32 pos, delta;
  267. if ((ypcm = voice->ypcm) == NULL)
  268. return;
  269. if (ypcm->substream == NULL)
  270. return;
  271. spin_lock(&chip->reg_lock);
  272. if (ypcm->running) {
  273. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  274. if (pos < ypcm->last_pos)
  275. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  276. else
  277. delta = pos - ypcm->last_pos;
  278. ypcm->period_pos += delta;
  279. ypcm->last_pos = pos;
  280. if (ypcm->period_pos >= ypcm->period_size) {
  281. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  282. ypcm->period_pos %= ypcm->period_size;
  283. spin_unlock(&chip->reg_lock);
  284. snd_pcm_period_elapsed(ypcm->substream);
  285. spin_lock(&chip->reg_lock);
  286. }
  287. if (unlikely(ypcm->update_pcm_vol)) {
  288. unsigned int subs = ypcm->substream->number;
  289. unsigned int next_bank = 1 - chip->active_bank;
  290. struct snd_ymfpci_playback_bank *bank;
  291. u32 volume;
  292. bank = &voice->bank[next_bank];
  293. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  294. bank->left_gain_end = volume;
  295. if (ypcm->output_rear)
  296. bank->eff2_gain_end = volume;
  297. if (ypcm->voices[1])
  298. bank = &ypcm->voices[1]->bank[next_bank];
  299. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  300. bank->right_gain_end = volume;
  301. if (ypcm->output_rear)
  302. bank->eff3_gain_end = volume;
  303. ypcm->update_pcm_vol--;
  304. }
  305. }
  306. spin_unlock(&chip->reg_lock);
  307. }
  308. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  309. {
  310. struct snd_pcm_runtime *runtime = substream->runtime;
  311. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  312. struct snd_ymfpci *chip = ypcm->chip;
  313. u32 pos, delta;
  314. spin_lock(&chip->reg_lock);
  315. if (ypcm->running) {
  316. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  317. if (pos < ypcm->last_pos)
  318. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  319. else
  320. delta = pos - ypcm->last_pos;
  321. ypcm->period_pos += delta;
  322. ypcm->last_pos = pos;
  323. if (ypcm->period_pos >= ypcm->period_size) {
  324. ypcm->period_pos %= ypcm->period_size;
  325. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  326. spin_unlock(&chip->reg_lock);
  327. snd_pcm_period_elapsed(substream);
  328. spin_lock(&chip->reg_lock);
  329. }
  330. }
  331. spin_unlock(&chip->reg_lock);
  332. }
  333. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  334. int cmd)
  335. {
  336. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  337. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  338. struct snd_kcontrol *kctl = NULL;
  339. int result = 0;
  340. spin_lock(&chip->reg_lock);
  341. if (ypcm->voices[0] == NULL) {
  342. result = -EINVAL;
  343. goto __unlock;
  344. }
  345. switch (cmd) {
  346. case SNDRV_PCM_TRIGGER_START:
  347. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  348. case SNDRV_PCM_TRIGGER_RESUME:
  349. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  350. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  351. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  352. ypcm->running = 1;
  353. break;
  354. case SNDRV_PCM_TRIGGER_STOP:
  355. if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
  356. kctl = chip->pcm_mixer[substream->number].ctl;
  357. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  358. }
  359. /* fall through */
  360. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  361. case SNDRV_PCM_TRIGGER_SUSPEND:
  362. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  363. if (ypcm->voices[1] != NULL && !ypcm->use_441_slot)
  364. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  365. ypcm->running = 0;
  366. break;
  367. default:
  368. result = -EINVAL;
  369. break;
  370. }
  371. __unlock:
  372. spin_unlock(&chip->reg_lock);
  373. if (kctl)
  374. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  375. return result;
  376. }
  377. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  378. int cmd)
  379. {
  380. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  381. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  382. int result = 0;
  383. u32 tmp;
  384. spin_lock(&chip->reg_lock);
  385. switch (cmd) {
  386. case SNDRV_PCM_TRIGGER_START:
  387. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  388. case SNDRV_PCM_TRIGGER_RESUME:
  389. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  390. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  391. ypcm->running = 1;
  392. break;
  393. case SNDRV_PCM_TRIGGER_STOP:
  394. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  395. case SNDRV_PCM_TRIGGER_SUSPEND:
  396. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  397. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  398. ypcm->running = 0;
  399. break;
  400. default:
  401. result = -EINVAL;
  402. break;
  403. }
  404. spin_unlock(&chip->reg_lock);
  405. return result;
  406. }
  407. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  408. {
  409. int err;
  410. if (ypcm->voices[1] != NULL && voices < 2) {
  411. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  412. ypcm->voices[1] = NULL;
  413. }
  414. if (voices == 1 && ypcm->voices[0] != NULL)
  415. return 0; /* already allocated */
  416. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  417. return 0; /* already allocated */
  418. if (voices > 1) {
  419. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  420. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  421. ypcm->voices[0] = NULL;
  422. }
  423. }
  424. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  425. if (err < 0)
  426. return err;
  427. ypcm->voices[0]->ypcm = ypcm;
  428. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  429. if (voices > 1) {
  430. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  431. ypcm->voices[1]->ypcm = ypcm;
  432. }
  433. return 0;
  434. }
  435. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  436. struct snd_pcm_runtime *runtime,
  437. int has_pcm_volume)
  438. {
  439. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  440. u32 format;
  441. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  442. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  443. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  444. struct snd_ymfpci_playback_bank *bank;
  445. unsigned int nbank;
  446. u32 vol_left, vol_right;
  447. u8 use_left, use_right;
  448. unsigned long flags;
  449. if (snd_BUG_ON(!voice))
  450. return;
  451. if (runtime->channels == 1) {
  452. use_left = 1;
  453. use_right = 1;
  454. } else {
  455. use_left = (voiceidx & 1) == 0;
  456. use_right = !use_left;
  457. }
  458. if (has_pcm_volume) {
  459. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  460. [ypcm->substream->number].left << 15);
  461. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  462. [ypcm->substream->number].right << 15);
  463. } else {
  464. vol_left = cpu_to_le32(0x40000000);
  465. vol_right = cpu_to_le32(0x40000000);
  466. }
  467. spin_lock_irqsave(&ypcm->chip->voice_lock, flags);
  468. format = runtime->channels == 2 ? 0x00010000 : 0;
  469. if (snd_pcm_format_width(runtime->format) == 8)
  470. format |= 0x80000000;
  471. else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  472. runtime->rate == 44100 && runtime->channels == 2 &&
  473. voiceidx == 0 && (ypcm->chip->src441_used == -1 ||
  474. ypcm->chip->src441_used == voice->number)) {
  475. ypcm->chip->src441_used = voice->number;
  476. ypcm->use_441_slot = 1;
  477. format |= 0x10000000;
  478. }
  479. if (ypcm->chip->src441_used == voice->number &&
  480. (format & 0x10000000) == 0) {
  481. ypcm->chip->src441_used = -1;
  482. ypcm->use_441_slot = 0;
  483. }
  484. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  485. format |= 1;
  486. spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags);
  487. for (nbank = 0; nbank < 2; nbank++) {
  488. bank = &voice->bank[nbank];
  489. memset(bank, 0, sizeof(*bank));
  490. bank->format = cpu_to_le32(format);
  491. bank->base = cpu_to_le32(runtime->dma_addr);
  492. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  493. bank->lpfQ = cpu_to_le32(lpfQ);
  494. bank->delta =
  495. bank->delta_end = cpu_to_le32(delta);
  496. bank->lpfK =
  497. bank->lpfK_end = cpu_to_le32(lpfK);
  498. bank->eg_gain =
  499. bank->eg_gain_end = cpu_to_le32(0x40000000);
  500. if (ypcm->output_front) {
  501. if (use_left) {
  502. bank->left_gain =
  503. bank->left_gain_end = vol_left;
  504. }
  505. if (use_right) {
  506. bank->right_gain =
  507. bank->right_gain_end = vol_right;
  508. }
  509. }
  510. if (ypcm->output_rear) {
  511. if (!ypcm->swap_rear) {
  512. if (use_left) {
  513. bank->eff2_gain =
  514. bank->eff2_gain_end = vol_left;
  515. }
  516. if (use_right) {
  517. bank->eff3_gain =
  518. bank->eff3_gain_end = vol_right;
  519. }
  520. } else {
  521. /* The SPDIF out channels seem to be swapped, so we have
  522. * to swap them here, too. The rear analog out channels
  523. * will be wrong, but otherwise AC3 would not work.
  524. */
  525. if (use_left) {
  526. bank->eff3_gain =
  527. bank->eff3_gain_end = vol_left;
  528. }
  529. if (use_right) {
  530. bank->eff2_gain =
  531. bank->eff2_gain_end = vol_right;
  532. }
  533. }
  534. }
  535. }
  536. }
  537. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  538. {
  539. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  540. 4096, &chip->ac3_tmp_base) < 0)
  541. return -ENOMEM;
  542. chip->bank_effect[3][0]->base =
  543. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  544. chip->bank_effect[3][0]->loop_end =
  545. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  546. chip->bank_effect[4][0]->base =
  547. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  548. chip->bank_effect[4][0]->loop_end =
  549. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  550. spin_lock_irq(&chip->reg_lock);
  551. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  552. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  553. spin_unlock_irq(&chip->reg_lock);
  554. return 0;
  555. }
  556. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  557. {
  558. spin_lock_irq(&chip->reg_lock);
  559. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  560. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  561. spin_unlock_irq(&chip->reg_lock);
  562. // snd_ymfpci_irq_wait(chip);
  563. if (chip->ac3_tmp_base.area) {
  564. snd_dma_free_pages(&chip->ac3_tmp_base);
  565. chip->ac3_tmp_base.area = NULL;
  566. }
  567. return 0;
  568. }
  569. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  570. struct snd_pcm_hw_params *hw_params)
  571. {
  572. struct snd_pcm_runtime *runtime = substream->runtime;
  573. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  574. int err;
  575. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  576. return err;
  577. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  578. return err;
  579. return 0;
  580. }
  581. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  582. {
  583. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  584. struct snd_pcm_runtime *runtime = substream->runtime;
  585. struct snd_ymfpci_pcm *ypcm;
  586. if (runtime->private_data == NULL)
  587. return 0;
  588. ypcm = runtime->private_data;
  589. /* wait, until the PCI operations are not finished */
  590. snd_ymfpci_irq_wait(chip);
  591. snd_pcm_lib_free_pages(substream);
  592. if (ypcm->voices[1]) {
  593. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  594. ypcm->voices[1] = NULL;
  595. }
  596. if (ypcm->voices[0]) {
  597. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  598. ypcm->voices[0] = NULL;
  599. }
  600. return 0;
  601. }
  602. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  603. {
  604. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  605. struct snd_pcm_runtime *runtime = substream->runtime;
  606. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  607. struct snd_kcontrol *kctl;
  608. unsigned int nvoice;
  609. ypcm->period_size = runtime->period_size;
  610. ypcm->buffer_size = runtime->buffer_size;
  611. ypcm->period_pos = 0;
  612. ypcm->last_pos = 0;
  613. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  614. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  615. substream->pcm == chip->pcm);
  616. if (substream->pcm == chip->pcm && !ypcm->use_441_slot) {
  617. kctl = chip->pcm_mixer[substream->number].ctl;
  618. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  619. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  620. }
  621. return 0;
  622. }
  623. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  624. struct snd_pcm_hw_params *hw_params)
  625. {
  626. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  627. }
  628. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  629. {
  630. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  631. /* wait, until the PCI operations are not finished */
  632. snd_ymfpci_irq_wait(chip);
  633. return snd_pcm_lib_free_pages(substream);
  634. }
  635. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  636. {
  637. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  638. struct snd_pcm_runtime *runtime = substream->runtime;
  639. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  640. struct snd_ymfpci_capture_bank * bank;
  641. int nbank;
  642. u32 rate, format;
  643. ypcm->period_size = runtime->period_size;
  644. ypcm->buffer_size = runtime->buffer_size;
  645. ypcm->period_pos = 0;
  646. ypcm->last_pos = 0;
  647. ypcm->shift = 0;
  648. rate = ((48000 * 4096) / runtime->rate) - 1;
  649. format = 0;
  650. if (runtime->channels == 2) {
  651. format |= 2;
  652. ypcm->shift++;
  653. }
  654. if (snd_pcm_format_width(runtime->format) == 8)
  655. format |= 1;
  656. else
  657. ypcm->shift++;
  658. switch (ypcm->capture_bank_number) {
  659. case 0:
  660. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  661. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  662. break;
  663. case 1:
  664. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  665. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  666. break;
  667. }
  668. for (nbank = 0; nbank < 2; nbank++) {
  669. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  670. bank->base = cpu_to_le32(runtime->dma_addr);
  671. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  672. bank->start = 0;
  673. bank->num_of_loops = 0;
  674. }
  675. return 0;
  676. }
  677. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  678. {
  679. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  680. struct snd_pcm_runtime *runtime = substream->runtime;
  681. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  682. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  683. if (!(ypcm->running && voice))
  684. return 0;
  685. return le32_to_cpu(voice->bank[chip->active_bank].start);
  686. }
  687. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  688. {
  689. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  690. struct snd_pcm_runtime *runtime = substream->runtime;
  691. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  692. if (!ypcm->running)
  693. return 0;
  694. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  695. }
  696. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  697. {
  698. wait_queue_t wait;
  699. int loops = 4;
  700. while (loops-- > 0) {
  701. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  702. continue;
  703. init_waitqueue_entry(&wait, current);
  704. add_wait_queue(&chip->interrupt_sleep, &wait);
  705. atomic_inc(&chip->interrupt_sleep_count);
  706. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  707. remove_wait_queue(&chip->interrupt_sleep, &wait);
  708. }
  709. }
  710. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
  711. {
  712. struct snd_ymfpci *chip = dev_id;
  713. u32 status, nvoice, mode;
  714. struct snd_ymfpci_voice *voice;
  715. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  716. if (status & 0x80000000) {
  717. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  718. spin_lock(&chip->voice_lock);
  719. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  720. voice = &chip->voices[nvoice];
  721. if (voice->interrupt)
  722. voice->interrupt(chip, voice);
  723. }
  724. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  725. if (chip->capture_substream[nvoice])
  726. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  727. }
  728. #if 0
  729. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  730. if (chip->effect_substream[nvoice])
  731. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  732. }
  733. #endif
  734. spin_unlock(&chip->voice_lock);
  735. spin_lock(&chip->reg_lock);
  736. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  737. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  738. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  739. spin_unlock(&chip->reg_lock);
  740. if (atomic_read(&chip->interrupt_sleep_count)) {
  741. atomic_set(&chip->interrupt_sleep_count, 0);
  742. wake_up(&chip->interrupt_sleep);
  743. }
  744. }
  745. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  746. if (status & 1) {
  747. if (chip->timer)
  748. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  749. }
  750. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  751. if (chip->rawmidi)
  752. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
  753. return IRQ_HANDLED;
  754. }
  755. static struct snd_pcm_hardware snd_ymfpci_playback =
  756. {
  757. .info = (SNDRV_PCM_INFO_MMAP |
  758. SNDRV_PCM_INFO_MMAP_VALID |
  759. SNDRV_PCM_INFO_INTERLEAVED |
  760. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  761. SNDRV_PCM_INFO_PAUSE |
  762. SNDRV_PCM_INFO_RESUME),
  763. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  764. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  765. .rate_min = 8000,
  766. .rate_max = 48000,
  767. .channels_min = 1,
  768. .channels_max = 2,
  769. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  770. .period_bytes_min = 64,
  771. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  772. .periods_min = 3,
  773. .periods_max = 1024,
  774. .fifo_size = 0,
  775. };
  776. static struct snd_pcm_hardware snd_ymfpci_capture =
  777. {
  778. .info = (SNDRV_PCM_INFO_MMAP |
  779. SNDRV_PCM_INFO_MMAP_VALID |
  780. SNDRV_PCM_INFO_INTERLEAVED |
  781. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  782. SNDRV_PCM_INFO_PAUSE |
  783. SNDRV_PCM_INFO_RESUME),
  784. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  785. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  786. .rate_min = 8000,
  787. .rate_max = 48000,
  788. .channels_min = 1,
  789. .channels_max = 2,
  790. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  791. .period_bytes_min = 64,
  792. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  793. .periods_min = 3,
  794. .periods_max = 1024,
  795. .fifo_size = 0,
  796. };
  797. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  798. {
  799. kfree(runtime->private_data);
  800. }
  801. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  802. {
  803. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  804. struct snd_pcm_runtime *runtime = substream->runtime;
  805. struct snd_ymfpci_pcm *ypcm;
  806. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  807. if (ypcm == NULL)
  808. return -ENOMEM;
  809. ypcm->chip = chip;
  810. ypcm->type = PLAYBACK_VOICE;
  811. ypcm->substream = substream;
  812. runtime->hw = snd_ymfpci_playback;
  813. runtime->private_data = ypcm;
  814. runtime->private_free = snd_ymfpci_pcm_free_substream;
  815. /* FIXME? True value is 256/48 = 5.33333 ms */
  816. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  817. return 0;
  818. }
  819. /* call with spinlock held */
  820. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  821. {
  822. if (! chip->rear_opened) {
  823. if (! chip->spdif_opened) /* set AC3 */
  824. snd_ymfpci_writel(chip, YDSXGR_MODE,
  825. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  826. /* enable second codec (4CHEN) */
  827. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  828. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  829. }
  830. }
  831. /* call with spinlock held */
  832. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  833. {
  834. if (! chip->rear_opened) {
  835. if (! chip->spdif_opened)
  836. snd_ymfpci_writel(chip, YDSXGR_MODE,
  837. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  838. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  839. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  840. }
  841. }
  842. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  843. {
  844. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  845. struct snd_pcm_runtime *runtime = substream->runtime;
  846. struct snd_ymfpci_pcm *ypcm;
  847. int err;
  848. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  849. return err;
  850. ypcm = runtime->private_data;
  851. ypcm->output_front = 1;
  852. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  853. ypcm->swap_rear = 0;
  854. spin_lock_irq(&chip->reg_lock);
  855. if (ypcm->output_rear) {
  856. ymfpci_open_extension(chip);
  857. chip->rear_opened++;
  858. }
  859. spin_unlock_irq(&chip->reg_lock);
  860. return 0;
  861. }
  862. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  863. {
  864. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  865. struct snd_pcm_runtime *runtime = substream->runtime;
  866. struct snd_ymfpci_pcm *ypcm;
  867. int err;
  868. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  869. return err;
  870. ypcm = runtime->private_data;
  871. ypcm->output_front = 0;
  872. ypcm->output_rear = 1;
  873. ypcm->swap_rear = 1;
  874. spin_lock_irq(&chip->reg_lock);
  875. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  876. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  877. ymfpci_open_extension(chip);
  878. chip->spdif_pcm_bits = chip->spdif_bits;
  879. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  880. chip->spdif_opened++;
  881. spin_unlock_irq(&chip->reg_lock);
  882. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  883. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  884. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  885. return 0;
  886. }
  887. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  888. {
  889. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  890. struct snd_pcm_runtime *runtime = substream->runtime;
  891. struct snd_ymfpci_pcm *ypcm;
  892. int err;
  893. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  894. return err;
  895. ypcm = runtime->private_data;
  896. ypcm->output_front = 0;
  897. ypcm->output_rear = 1;
  898. ypcm->swap_rear = 0;
  899. spin_lock_irq(&chip->reg_lock);
  900. ymfpci_open_extension(chip);
  901. chip->rear_opened++;
  902. spin_unlock_irq(&chip->reg_lock);
  903. return 0;
  904. }
  905. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  906. u32 capture_bank_number)
  907. {
  908. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  909. struct snd_pcm_runtime *runtime = substream->runtime;
  910. struct snd_ymfpci_pcm *ypcm;
  911. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  912. if (ypcm == NULL)
  913. return -ENOMEM;
  914. ypcm->chip = chip;
  915. ypcm->type = capture_bank_number + CAPTURE_REC;
  916. ypcm->substream = substream;
  917. ypcm->capture_bank_number = capture_bank_number;
  918. chip->capture_substream[capture_bank_number] = substream;
  919. runtime->hw = snd_ymfpci_capture;
  920. /* FIXME? True value is 256/48 = 5.33333 ms */
  921. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  922. runtime->private_data = ypcm;
  923. runtime->private_free = snd_ymfpci_pcm_free_substream;
  924. snd_ymfpci_hw_start(chip);
  925. return 0;
  926. }
  927. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  928. {
  929. return snd_ymfpci_capture_open(substream, 0);
  930. }
  931. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  932. {
  933. return snd_ymfpci_capture_open(substream, 1);
  934. }
  935. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  936. {
  937. return 0;
  938. }
  939. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  940. {
  941. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  942. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  943. spin_lock_irq(&chip->reg_lock);
  944. if (ypcm->output_rear && chip->rear_opened > 0) {
  945. chip->rear_opened--;
  946. ymfpci_close_extension(chip);
  947. }
  948. spin_unlock_irq(&chip->reg_lock);
  949. return snd_ymfpci_playback_close_1(substream);
  950. }
  951. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  952. {
  953. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  954. spin_lock_irq(&chip->reg_lock);
  955. chip->spdif_opened = 0;
  956. ymfpci_close_extension(chip);
  957. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  958. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  959. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  960. spin_unlock_irq(&chip->reg_lock);
  961. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  962. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  963. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  964. return snd_ymfpci_playback_close_1(substream);
  965. }
  966. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  967. {
  968. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  969. spin_lock_irq(&chip->reg_lock);
  970. if (chip->rear_opened > 0) {
  971. chip->rear_opened--;
  972. ymfpci_close_extension(chip);
  973. }
  974. spin_unlock_irq(&chip->reg_lock);
  975. return snd_ymfpci_playback_close_1(substream);
  976. }
  977. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  978. {
  979. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  980. struct snd_pcm_runtime *runtime = substream->runtime;
  981. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  982. if (ypcm != NULL) {
  983. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  984. snd_ymfpci_hw_stop(chip);
  985. }
  986. return 0;
  987. }
  988. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  989. .open = snd_ymfpci_playback_open,
  990. .close = snd_ymfpci_playback_close,
  991. .ioctl = snd_pcm_lib_ioctl,
  992. .hw_params = snd_ymfpci_playback_hw_params,
  993. .hw_free = snd_ymfpci_playback_hw_free,
  994. .prepare = snd_ymfpci_playback_prepare,
  995. .trigger = snd_ymfpci_playback_trigger,
  996. .pointer = snd_ymfpci_playback_pointer,
  997. };
  998. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  999. .open = snd_ymfpci_capture_rec_open,
  1000. .close = snd_ymfpci_capture_close,
  1001. .ioctl = snd_pcm_lib_ioctl,
  1002. .hw_params = snd_ymfpci_capture_hw_params,
  1003. .hw_free = snd_ymfpci_capture_hw_free,
  1004. .prepare = snd_ymfpci_capture_prepare,
  1005. .trigger = snd_ymfpci_capture_trigger,
  1006. .pointer = snd_ymfpci_capture_pointer,
  1007. };
  1008. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1009. {
  1010. struct snd_pcm *pcm;
  1011. int err;
  1012. if (rpcm)
  1013. *rpcm = NULL;
  1014. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  1015. return err;
  1016. pcm->private_data = chip;
  1017. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  1018. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  1019. /* global setup */
  1020. pcm->info_flags = 0;
  1021. strcpy(pcm->name, "YMFPCI");
  1022. chip->pcm = pcm;
  1023. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1024. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1025. if (rpcm)
  1026. *rpcm = pcm;
  1027. return 0;
  1028. }
  1029. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  1030. .open = snd_ymfpci_capture_ac97_open,
  1031. .close = snd_ymfpci_capture_close,
  1032. .ioctl = snd_pcm_lib_ioctl,
  1033. .hw_params = snd_ymfpci_capture_hw_params,
  1034. .hw_free = snd_ymfpci_capture_hw_free,
  1035. .prepare = snd_ymfpci_capture_prepare,
  1036. .trigger = snd_ymfpci_capture_trigger,
  1037. .pointer = snd_ymfpci_capture_pointer,
  1038. };
  1039. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1040. {
  1041. struct snd_pcm *pcm;
  1042. int err;
  1043. if (rpcm)
  1044. *rpcm = NULL;
  1045. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1046. return err;
  1047. pcm->private_data = chip;
  1048. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1049. /* global setup */
  1050. pcm->info_flags = 0;
  1051. sprintf(pcm->name, "YMFPCI - %s",
  1052. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1053. chip->pcm2 = pcm;
  1054. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1055. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1056. if (rpcm)
  1057. *rpcm = pcm;
  1058. return 0;
  1059. }
  1060. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1061. .open = snd_ymfpci_playback_spdif_open,
  1062. .close = snd_ymfpci_playback_spdif_close,
  1063. .ioctl = snd_pcm_lib_ioctl,
  1064. .hw_params = snd_ymfpci_playback_hw_params,
  1065. .hw_free = snd_ymfpci_playback_hw_free,
  1066. .prepare = snd_ymfpci_playback_prepare,
  1067. .trigger = snd_ymfpci_playback_trigger,
  1068. .pointer = snd_ymfpci_playback_pointer,
  1069. };
  1070. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1071. {
  1072. struct snd_pcm *pcm;
  1073. int err;
  1074. if (rpcm)
  1075. *rpcm = NULL;
  1076. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1077. return err;
  1078. pcm->private_data = chip;
  1079. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1080. /* global setup */
  1081. pcm->info_flags = 0;
  1082. strcpy(pcm->name, "YMFPCI - IEC958");
  1083. chip->pcm_spdif = pcm;
  1084. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1085. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1086. if (rpcm)
  1087. *rpcm = pcm;
  1088. return 0;
  1089. }
  1090. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1091. .open = snd_ymfpci_playback_4ch_open,
  1092. .close = snd_ymfpci_playback_4ch_close,
  1093. .ioctl = snd_pcm_lib_ioctl,
  1094. .hw_params = snd_ymfpci_playback_hw_params,
  1095. .hw_free = snd_ymfpci_playback_hw_free,
  1096. .prepare = snd_ymfpci_playback_prepare,
  1097. .trigger = snd_ymfpci_playback_trigger,
  1098. .pointer = snd_ymfpci_playback_pointer,
  1099. };
  1100. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1101. {
  1102. struct snd_pcm *pcm;
  1103. int err;
  1104. if (rpcm)
  1105. *rpcm = NULL;
  1106. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1107. return err;
  1108. pcm->private_data = chip;
  1109. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1110. /* global setup */
  1111. pcm->info_flags = 0;
  1112. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1113. chip->pcm_4ch = pcm;
  1114. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1115. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1116. if (rpcm)
  1117. *rpcm = pcm;
  1118. return 0;
  1119. }
  1120. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1121. {
  1122. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1123. uinfo->count = 1;
  1124. return 0;
  1125. }
  1126. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1130. spin_lock_irq(&chip->reg_lock);
  1131. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1132. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1133. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1134. spin_unlock_irq(&chip->reg_lock);
  1135. return 0;
  1136. }
  1137. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1141. unsigned int val;
  1142. int change;
  1143. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1144. (ucontrol->value.iec958.status[1] << 8);
  1145. spin_lock_irq(&chip->reg_lock);
  1146. change = chip->spdif_bits != val;
  1147. chip->spdif_bits = val;
  1148. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1149. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1150. spin_unlock_irq(&chip->reg_lock);
  1151. return change;
  1152. }
  1153. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1154. {
  1155. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1156. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1157. .info = snd_ymfpci_spdif_default_info,
  1158. .get = snd_ymfpci_spdif_default_get,
  1159. .put = snd_ymfpci_spdif_default_put
  1160. };
  1161. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1162. {
  1163. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1164. uinfo->count = 1;
  1165. return 0;
  1166. }
  1167. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1168. struct snd_ctl_elem_value *ucontrol)
  1169. {
  1170. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1171. spin_lock_irq(&chip->reg_lock);
  1172. ucontrol->value.iec958.status[0] = 0x3e;
  1173. ucontrol->value.iec958.status[1] = 0xff;
  1174. spin_unlock_irq(&chip->reg_lock);
  1175. return 0;
  1176. }
  1177. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1178. {
  1179. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1180. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1181. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1182. .info = snd_ymfpci_spdif_mask_info,
  1183. .get = snd_ymfpci_spdif_mask_get,
  1184. };
  1185. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1186. {
  1187. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1188. uinfo->count = 1;
  1189. return 0;
  1190. }
  1191. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1192. struct snd_ctl_elem_value *ucontrol)
  1193. {
  1194. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1195. spin_lock_irq(&chip->reg_lock);
  1196. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1197. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1198. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1199. spin_unlock_irq(&chip->reg_lock);
  1200. return 0;
  1201. }
  1202. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1203. struct snd_ctl_elem_value *ucontrol)
  1204. {
  1205. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1206. unsigned int val;
  1207. int change;
  1208. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1209. (ucontrol->value.iec958.status[1] << 8);
  1210. spin_lock_irq(&chip->reg_lock);
  1211. change = chip->spdif_pcm_bits != val;
  1212. chip->spdif_pcm_bits = val;
  1213. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1214. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1215. spin_unlock_irq(&chip->reg_lock);
  1216. return change;
  1217. }
  1218. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1219. {
  1220. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1221. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1222. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1223. .info = snd_ymfpci_spdif_stream_info,
  1224. .get = snd_ymfpci_spdif_stream_get,
  1225. .put = snd_ymfpci_spdif_stream_put
  1226. };
  1227. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1228. {
  1229. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1230. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1231. info->count = 1;
  1232. info->value.enumerated.items = 3;
  1233. if (info->value.enumerated.item > 2)
  1234. info->value.enumerated.item = 2;
  1235. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1236. return 0;
  1237. }
  1238. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1239. {
  1240. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1241. u16 reg;
  1242. spin_lock_irq(&chip->reg_lock);
  1243. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1244. spin_unlock_irq(&chip->reg_lock);
  1245. if (!(reg & 0x100))
  1246. value->value.enumerated.item[0] = 0;
  1247. else
  1248. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1249. return 0;
  1250. }
  1251. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1252. {
  1253. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1254. u16 reg, old_reg;
  1255. spin_lock_irq(&chip->reg_lock);
  1256. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1257. if (value->value.enumerated.item[0] == 0)
  1258. reg = old_reg & ~0x100;
  1259. else
  1260. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1261. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1262. spin_unlock_irq(&chip->reg_lock);
  1263. return reg != old_reg;
  1264. }
  1265. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1266. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1267. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1268. .name = "Direct Recording Source",
  1269. .info = snd_ymfpci_drec_source_info,
  1270. .get = snd_ymfpci_drec_source_get,
  1271. .put = snd_ymfpci_drec_source_put
  1272. };
  1273. /*
  1274. * Mixer controls
  1275. */
  1276. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1277. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1278. .info = snd_ymfpci_info_single, \
  1279. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1280. .private_value = ((reg) | ((shift) << 16)) }
  1281. #define snd_ymfpci_info_single snd_ctl_boolean_mono_info
  1282. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1283. struct snd_ctl_elem_value *ucontrol)
  1284. {
  1285. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1286. int reg = kcontrol->private_value & 0xffff;
  1287. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1288. unsigned int mask = 1;
  1289. switch (reg) {
  1290. case YDSXGR_SPDIFOUTCTRL: break;
  1291. case YDSXGR_SPDIFINCTRL: break;
  1292. default: return -EINVAL;
  1293. }
  1294. ucontrol->value.integer.value[0] =
  1295. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1296. return 0;
  1297. }
  1298. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1302. int reg = kcontrol->private_value & 0xffff;
  1303. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1304. unsigned int mask = 1;
  1305. int change;
  1306. unsigned int val, oval;
  1307. switch (reg) {
  1308. case YDSXGR_SPDIFOUTCTRL: break;
  1309. case YDSXGR_SPDIFINCTRL: break;
  1310. default: return -EINVAL;
  1311. }
  1312. val = (ucontrol->value.integer.value[0] & mask);
  1313. val <<= shift;
  1314. spin_lock_irq(&chip->reg_lock);
  1315. oval = snd_ymfpci_readl(chip, reg);
  1316. val = (oval & ~(mask << shift)) | val;
  1317. change = val != oval;
  1318. snd_ymfpci_writel(chip, reg, val);
  1319. spin_unlock_irq(&chip->reg_lock);
  1320. return change;
  1321. }
  1322. static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
  1323. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1324. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1325. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  1326. .info = snd_ymfpci_info_double, \
  1327. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1328. .private_value = reg, \
  1329. .tlv = { .p = db_scale_native } }
  1330. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1331. {
  1332. unsigned int reg = kcontrol->private_value;
  1333. if (reg < 0x80 || reg >= 0xc0)
  1334. return -EINVAL;
  1335. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1336. uinfo->count = 2;
  1337. uinfo->value.integer.min = 0;
  1338. uinfo->value.integer.max = 16383;
  1339. return 0;
  1340. }
  1341. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1342. {
  1343. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1344. unsigned int reg = kcontrol->private_value;
  1345. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1346. unsigned int val;
  1347. if (reg < 0x80 || reg >= 0xc0)
  1348. return -EINVAL;
  1349. spin_lock_irq(&chip->reg_lock);
  1350. val = snd_ymfpci_readl(chip, reg);
  1351. spin_unlock_irq(&chip->reg_lock);
  1352. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1353. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1354. return 0;
  1355. }
  1356. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1357. {
  1358. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1359. unsigned int reg = kcontrol->private_value;
  1360. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1361. int change;
  1362. unsigned int val1, val2, oval;
  1363. if (reg < 0x80 || reg >= 0xc0)
  1364. return -EINVAL;
  1365. val1 = ucontrol->value.integer.value[0] & mask;
  1366. val2 = ucontrol->value.integer.value[1] & mask;
  1367. val1 <<= shift_left;
  1368. val2 <<= shift_right;
  1369. spin_lock_irq(&chip->reg_lock);
  1370. oval = snd_ymfpci_readl(chip, reg);
  1371. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1372. change = val1 != oval;
  1373. snd_ymfpci_writel(chip, reg, val1);
  1374. spin_unlock_irq(&chip->reg_lock);
  1375. return change;
  1376. }
  1377. static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol,
  1378. struct snd_ctl_elem_value *ucontrol)
  1379. {
  1380. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1381. unsigned int reg = YDSXGR_NATIVEDACOUTVOL;
  1382. unsigned int reg2 = YDSXGR_BUF441OUTVOL;
  1383. int change;
  1384. unsigned int value, oval;
  1385. value = ucontrol->value.integer.value[0] & 0x3fff;
  1386. value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16;
  1387. spin_lock_irq(&chip->reg_lock);
  1388. oval = snd_ymfpci_readl(chip, reg);
  1389. change = value != oval;
  1390. snd_ymfpci_writel(chip, reg, value);
  1391. snd_ymfpci_writel(chip, reg2, value);
  1392. spin_unlock_irq(&chip->reg_lock);
  1393. return change;
  1394. }
  1395. /*
  1396. * 4ch duplication
  1397. */
  1398. #define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info
  1399. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1400. {
  1401. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1402. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1403. return 0;
  1404. }
  1405. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1406. {
  1407. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1408. int change;
  1409. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1410. if (change)
  1411. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1412. return change;
  1413. }
  1414. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1415. {
  1416. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1417. .name = "Wave Playback Volume",
  1418. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1419. SNDRV_CTL_ELEM_ACCESS_TLV_READ,
  1420. .info = snd_ymfpci_info_double,
  1421. .get = snd_ymfpci_get_double,
  1422. .put = snd_ymfpci_put_nativedacvol,
  1423. .private_value = YDSXGR_NATIVEDACOUTVOL,
  1424. .tlv = { .p = db_scale_native },
  1425. },
  1426. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1427. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1428. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1429. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1430. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1431. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1432. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1433. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1434. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1435. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1436. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1437. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1438. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1439. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1440. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1441. {
  1442. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1443. .name = "4ch Duplication",
  1444. .info = snd_ymfpci_info_dup4ch,
  1445. .get = snd_ymfpci_get_dup4ch,
  1446. .put = snd_ymfpci_put_dup4ch,
  1447. },
  1448. };
  1449. /*
  1450. * GPIO
  1451. */
  1452. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1453. {
  1454. u16 reg, mode;
  1455. unsigned long flags;
  1456. spin_lock_irqsave(&chip->reg_lock, flags);
  1457. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1458. reg &= ~(1 << (pin + 8));
  1459. reg |= (1 << pin);
  1460. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1461. /* set the level mode for input line */
  1462. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1463. mode &= ~(3 << (pin * 2));
  1464. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1465. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1466. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1467. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1468. return (mode >> pin) & 1;
  1469. }
  1470. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1471. {
  1472. u16 reg;
  1473. unsigned long flags;
  1474. spin_lock_irqsave(&chip->reg_lock, flags);
  1475. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1476. reg &= ~(1 << pin);
  1477. reg &= ~(1 << (pin + 8));
  1478. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1479. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1480. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1481. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1482. return 0;
  1483. }
  1484. #define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info
  1485. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1486. {
  1487. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1488. int pin = (int)kcontrol->private_value;
  1489. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1490. return 0;
  1491. }
  1492. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1495. int pin = (int)kcontrol->private_value;
  1496. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1497. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1498. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1499. return 1;
  1500. }
  1501. return 0;
  1502. }
  1503. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1504. .name = "Shared Rear/Line-In Switch",
  1505. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1506. .info = snd_ymfpci_gpio_sw_info,
  1507. .get = snd_ymfpci_gpio_sw_get,
  1508. .put = snd_ymfpci_gpio_sw_put,
  1509. .private_value = 2,
  1510. };
  1511. /*
  1512. * PCM voice volume
  1513. */
  1514. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1515. struct snd_ctl_elem_info *uinfo)
  1516. {
  1517. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1518. uinfo->count = 2;
  1519. uinfo->value.integer.min = 0;
  1520. uinfo->value.integer.max = 0x8000;
  1521. return 0;
  1522. }
  1523. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1524. struct snd_ctl_elem_value *ucontrol)
  1525. {
  1526. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1527. unsigned int subs = kcontrol->id.subdevice;
  1528. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1529. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1530. return 0;
  1531. }
  1532. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1533. struct snd_ctl_elem_value *ucontrol)
  1534. {
  1535. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1536. unsigned int subs = kcontrol->id.subdevice;
  1537. struct snd_pcm_substream *substream;
  1538. unsigned long flags;
  1539. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1540. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1541. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1542. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1543. if (chip->pcm_mixer[subs].left > 0x8000)
  1544. chip->pcm_mixer[subs].left = 0x8000;
  1545. if (chip->pcm_mixer[subs].right > 0x8000)
  1546. chip->pcm_mixer[subs].right = 0x8000;
  1547. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1548. spin_lock_irqsave(&chip->voice_lock, flags);
  1549. if (substream->runtime && substream->runtime->private_data) {
  1550. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1551. if (!ypcm->use_441_slot)
  1552. ypcm->update_pcm_vol = 2;
  1553. }
  1554. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1555. return 1;
  1556. }
  1557. return 0;
  1558. }
  1559. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1560. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1561. .name = "PCM Playback Volume",
  1562. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1563. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1564. .info = snd_ymfpci_pcm_vol_info,
  1565. .get = snd_ymfpci_pcm_vol_get,
  1566. .put = snd_ymfpci_pcm_vol_put,
  1567. };
  1568. /*
  1569. * Mixer routines
  1570. */
  1571. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1572. {
  1573. struct snd_ymfpci *chip = bus->private_data;
  1574. chip->ac97_bus = NULL;
  1575. }
  1576. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1577. {
  1578. struct snd_ymfpci *chip = ac97->private_data;
  1579. chip->ac97 = NULL;
  1580. }
  1581. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch)
  1582. {
  1583. struct snd_ac97_template ac97;
  1584. struct snd_kcontrol *kctl;
  1585. struct snd_pcm_substream *substream;
  1586. unsigned int idx;
  1587. int err;
  1588. static struct snd_ac97_bus_ops ops = {
  1589. .write = snd_ymfpci_codec_write,
  1590. .read = snd_ymfpci_codec_read,
  1591. };
  1592. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1593. return err;
  1594. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1595. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1596. memset(&ac97, 0, sizeof(ac97));
  1597. ac97.private_data = chip;
  1598. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1599. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1600. return err;
  1601. /* to be sure */
  1602. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1603. AC97_EA_VRA|AC97_EA_VRM, 0);
  1604. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1605. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1606. return err;
  1607. }
  1608. /* add S/PDIF control */
  1609. if (snd_BUG_ON(!chip->pcm_spdif))
  1610. return -ENXIO;
  1611. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1612. return err;
  1613. kctl->id.device = chip->pcm_spdif->device;
  1614. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1615. return err;
  1616. kctl->id.device = chip->pcm_spdif->device;
  1617. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1618. return err;
  1619. kctl->id.device = chip->pcm_spdif->device;
  1620. chip->spdif_pcm_ctl = kctl;
  1621. /* direct recording source */
  1622. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1623. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1624. return err;
  1625. /*
  1626. * shared rear/line-in
  1627. */
  1628. if (rear_switch) {
  1629. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1630. return err;
  1631. }
  1632. /* per-voice volume */
  1633. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1634. for (idx = 0; idx < 32; ++idx) {
  1635. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1636. if (!kctl)
  1637. return -ENOMEM;
  1638. kctl->id.device = chip->pcm->device;
  1639. kctl->id.subdevice = idx;
  1640. kctl->private_value = (unsigned long)substream;
  1641. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1642. return err;
  1643. chip->pcm_mixer[idx].left = 0x8000;
  1644. chip->pcm_mixer[idx].right = 0x8000;
  1645. chip->pcm_mixer[idx].ctl = kctl;
  1646. substream = substream->next;
  1647. }
  1648. return 0;
  1649. }
  1650. /*
  1651. * timer
  1652. */
  1653. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1654. {
  1655. struct snd_ymfpci *chip;
  1656. unsigned long flags;
  1657. unsigned int count;
  1658. chip = snd_timer_chip(timer);
  1659. count = (timer->sticks << 1) - 1;
  1660. spin_lock_irqsave(&chip->reg_lock, flags);
  1661. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1662. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1663. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1664. return 0;
  1665. }
  1666. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1667. {
  1668. struct snd_ymfpci *chip;
  1669. unsigned long flags;
  1670. chip = snd_timer_chip(timer);
  1671. spin_lock_irqsave(&chip->reg_lock, flags);
  1672. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1673. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1674. return 0;
  1675. }
  1676. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1677. unsigned long *num, unsigned long *den)
  1678. {
  1679. *num = 1;
  1680. *den = 48000;
  1681. return 0;
  1682. }
  1683. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1684. .flags = SNDRV_TIMER_HW_AUTO,
  1685. .resolution = 20833, /* 1/fs = 20.8333...us */
  1686. .ticks = 0x8000,
  1687. .start = snd_ymfpci_timer_start,
  1688. .stop = snd_ymfpci_timer_stop,
  1689. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1690. };
  1691. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1692. {
  1693. struct snd_timer *timer = NULL;
  1694. struct snd_timer_id tid;
  1695. int err;
  1696. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1697. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1698. tid.card = chip->card->number;
  1699. tid.device = device;
  1700. tid.subdevice = 0;
  1701. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1702. strcpy(timer->name, "YMFPCI timer");
  1703. timer->private_data = chip;
  1704. timer->hw = snd_ymfpci_timer_hw;
  1705. }
  1706. chip->timer = timer;
  1707. return err;
  1708. }
  1709. /*
  1710. * proc interface
  1711. */
  1712. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1713. struct snd_info_buffer *buffer)
  1714. {
  1715. struct snd_ymfpci *chip = entry->private_data;
  1716. int i;
  1717. snd_iprintf(buffer, "YMFPCI\n\n");
  1718. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1719. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1720. }
  1721. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1722. {
  1723. struct snd_info_entry *entry;
  1724. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1725. snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
  1726. return 0;
  1727. }
  1728. /*
  1729. * initialization routines
  1730. */
  1731. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1732. {
  1733. u8 cmd;
  1734. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1735. #if 0 // force to reset
  1736. if (cmd & 0x03) {
  1737. #endif
  1738. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1739. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1740. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1741. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1742. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1743. #if 0
  1744. }
  1745. #endif
  1746. }
  1747. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1748. {
  1749. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1750. }
  1751. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1752. {
  1753. u32 val;
  1754. int timeout = 1000;
  1755. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1756. if (val)
  1757. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1758. while (timeout-- > 0) {
  1759. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1760. if ((val & 0x00000002) == 0)
  1761. break;
  1762. }
  1763. }
  1764. static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip)
  1765. {
  1766. int err, is_1e;
  1767. const char *name;
  1768. err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw",
  1769. &chip->pci->dev);
  1770. if (err >= 0) {
  1771. if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) {
  1772. snd_printk(KERN_ERR "DSP microcode has wrong size\n");
  1773. err = -EINVAL;
  1774. }
  1775. }
  1776. if (err < 0)
  1777. return err;
  1778. is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F ||
  1779. chip->device_id == PCI_DEVICE_ID_YAMAHA_740C ||
  1780. chip->device_id == PCI_DEVICE_ID_YAMAHA_744 ||
  1781. chip->device_id == PCI_DEVICE_ID_YAMAHA_754;
  1782. name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw";
  1783. err = request_firmware(&chip->controller_microcode, name,
  1784. &chip->pci->dev);
  1785. if (err >= 0) {
  1786. if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) {
  1787. snd_printk(KERN_ERR "controller microcode"
  1788. " has wrong size\n");
  1789. err = -EINVAL;
  1790. }
  1791. }
  1792. if (err < 0)
  1793. return err;
  1794. return 0;
  1795. }
  1796. MODULE_FIRMWARE("yamaha/ds1_dsp.fw");
  1797. MODULE_FIRMWARE("yamaha/ds1_ctrl.fw");
  1798. MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw");
  1799. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1800. {
  1801. int i;
  1802. u16 ctrl;
  1803. const __le32 *inst;
  1804. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1805. snd_ymfpci_disable_dsp(chip);
  1806. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1807. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1808. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1809. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1810. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1811. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1812. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1813. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1814. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1815. /* setup DSP instruction code */
  1816. inst = (const __le32 *)chip->dsp_microcode->data;
  1817. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1818. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2),
  1819. le32_to_cpu(inst[i]));
  1820. /* setup control instruction code */
  1821. inst = (const __le32 *)chip->controller_microcode->data;
  1822. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1823. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2),
  1824. le32_to_cpu(inst[i]));
  1825. snd_ymfpci_enable_dsp(chip);
  1826. }
  1827. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1828. {
  1829. long size, playback_ctrl_size;
  1830. int voice, bank, reg;
  1831. u8 *ptr;
  1832. dma_addr_t ptr_addr;
  1833. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1834. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1835. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1836. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1837. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1838. size = ALIGN(playback_ctrl_size, 0x100) +
  1839. ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) +
  1840. ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) +
  1841. ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) +
  1842. chip->work_size;
  1843. /* work_ptr must be aligned to 256 bytes, but it's already
  1844. covered with the kernel page allocation mechanism */
  1845. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1846. size, &chip->work_ptr) < 0)
  1847. return -ENOMEM;
  1848. ptr = chip->work_ptr.area;
  1849. ptr_addr = chip->work_ptr.addr;
  1850. memset(ptr, 0, size); /* for sure */
  1851. chip->bank_base_playback = ptr;
  1852. chip->bank_base_playback_addr = ptr_addr;
  1853. chip->ctrl_playback = (u32 *)ptr;
  1854. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1855. ptr += ALIGN(playback_ctrl_size, 0x100);
  1856. ptr_addr += ALIGN(playback_ctrl_size, 0x100);
  1857. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1858. chip->voices[voice].number = voice;
  1859. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1860. chip->voices[voice].bank_addr = ptr_addr;
  1861. for (bank = 0; bank < 2; bank++) {
  1862. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1863. ptr += chip->bank_size_playback;
  1864. ptr_addr += chip->bank_size_playback;
  1865. }
  1866. }
  1867. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1868. ptr_addr = ALIGN(ptr_addr, 0x100);
  1869. chip->bank_base_capture = ptr;
  1870. chip->bank_base_capture_addr = ptr_addr;
  1871. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1872. for (bank = 0; bank < 2; bank++) {
  1873. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1874. ptr += chip->bank_size_capture;
  1875. ptr_addr += chip->bank_size_capture;
  1876. }
  1877. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1878. ptr_addr = ALIGN(ptr_addr, 0x100);
  1879. chip->bank_base_effect = ptr;
  1880. chip->bank_base_effect_addr = ptr_addr;
  1881. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1882. for (bank = 0; bank < 2; bank++) {
  1883. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1884. ptr += chip->bank_size_effect;
  1885. ptr_addr += chip->bank_size_effect;
  1886. }
  1887. ptr = (char *)ALIGN((unsigned long)ptr, 0x100);
  1888. ptr_addr = ALIGN(ptr_addr, 0x100);
  1889. chip->work_base = ptr;
  1890. chip->work_base_addr = ptr_addr;
  1891. snd_BUG_ON(ptr + chip->work_size !=
  1892. chip->work_ptr.area + chip->work_ptr.bytes);
  1893. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1894. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1895. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1896. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1897. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1898. /* S/PDIF output initialization */
  1899. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1900. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1901. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1902. /* S/PDIF input initialization */
  1903. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1904. /* digital mixer setup */
  1905. for (reg = 0x80; reg < 0xc0; reg += 4)
  1906. snd_ymfpci_writel(chip, reg, 0);
  1907. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1908. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff);
  1909. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1910. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1911. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1912. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1913. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1914. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1915. return 0;
  1916. }
  1917. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1918. {
  1919. u16 ctrl;
  1920. if (snd_BUG_ON(!chip))
  1921. return -EINVAL;
  1922. if (chip->res_reg_area) { /* don't touch busy hardware */
  1923. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1924. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1925. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1926. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1927. snd_ymfpci_disable_dsp(chip);
  1928. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1929. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1930. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1931. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1932. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1933. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1934. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1935. }
  1936. snd_ymfpci_ac3_done(chip);
  1937. /* Set PCI device to D3 state */
  1938. #if 0
  1939. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1940. * the chip again unless reboot. ACPI bug?
  1941. */
  1942. pci_set_power_state(chip->pci, 3);
  1943. #endif
  1944. #ifdef CONFIG_PM
  1945. vfree(chip->saved_regs);
  1946. #endif
  1947. if (chip->irq >= 0)
  1948. free_irq(chip->irq, chip);
  1949. release_and_free_resource(chip->mpu_res);
  1950. release_and_free_resource(chip->fm_res);
  1951. snd_ymfpci_free_gameport(chip);
  1952. if (chip->reg_area_virt)
  1953. iounmap(chip->reg_area_virt);
  1954. if (chip->work_ptr.area)
  1955. snd_dma_free_pages(&chip->work_ptr);
  1956. release_and_free_resource(chip->res_reg_area);
  1957. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1958. pci_disable_device(chip->pci);
  1959. release_firmware(chip->dsp_microcode);
  1960. release_firmware(chip->controller_microcode);
  1961. kfree(chip);
  1962. return 0;
  1963. }
  1964. static int snd_ymfpci_dev_free(struct snd_device *device)
  1965. {
  1966. struct snd_ymfpci *chip = device->device_data;
  1967. return snd_ymfpci_free(chip);
  1968. }
  1969. #ifdef CONFIG_PM
  1970. static int saved_regs_index[] = {
  1971. /* spdif */
  1972. YDSXGR_SPDIFOUTCTRL,
  1973. YDSXGR_SPDIFOUTSTATUS,
  1974. YDSXGR_SPDIFINCTRL,
  1975. /* volumes */
  1976. YDSXGR_PRIADCLOOPVOL,
  1977. YDSXGR_NATIVEDACINVOL,
  1978. YDSXGR_NATIVEDACOUTVOL,
  1979. YDSXGR_BUF441OUTVOL,
  1980. YDSXGR_NATIVEADCINVOL,
  1981. YDSXGR_SPDIFLOOPVOL,
  1982. YDSXGR_SPDIFOUTVOL,
  1983. YDSXGR_ZVOUTVOL,
  1984. YDSXGR_LEGACYOUTVOL,
  1985. /* address bases */
  1986. YDSXGR_PLAYCTRLBASE,
  1987. YDSXGR_RECCTRLBASE,
  1988. YDSXGR_EFFCTRLBASE,
  1989. YDSXGR_WORKBASE,
  1990. /* capture set up */
  1991. YDSXGR_MAPOFREC,
  1992. YDSXGR_RECFORMAT,
  1993. YDSXGR_RECSLOTSR,
  1994. YDSXGR_ADCFORMAT,
  1995. YDSXGR_ADCSLOTSR,
  1996. };
  1997. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  1998. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  1999. {
  2000. struct snd_card *card = pci_get_drvdata(pci);
  2001. struct snd_ymfpci *chip = card->private_data;
  2002. unsigned int i;
  2003. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2004. snd_pcm_suspend_all(chip->pcm);
  2005. snd_pcm_suspend_all(chip->pcm2);
  2006. snd_pcm_suspend_all(chip->pcm_spdif);
  2007. snd_pcm_suspend_all(chip->pcm_4ch);
  2008. snd_ac97_suspend(chip->ac97);
  2009. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2010. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  2011. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  2012. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  2013. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  2014. snd_ymfpci_disable_dsp(chip);
  2015. pci_disable_device(pci);
  2016. pci_save_state(pci);
  2017. pci_set_power_state(pci, pci_choose_state(pci, state));
  2018. return 0;
  2019. }
  2020. int snd_ymfpci_resume(struct pci_dev *pci)
  2021. {
  2022. struct snd_card *card = pci_get_drvdata(pci);
  2023. struct snd_ymfpci *chip = card->private_data;
  2024. unsigned int i;
  2025. pci_set_power_state(pci, PCI_D0);
  2026. pci_restore_state(pci);
  2027. if (pci_enable_device(pci) < 0) {
  2028. printk(KERN_ERR "ymfpci: pci_enable_device failed, "
  2029. "disabling device\n");
  2030. snd_card_disconnect(card);
  2031. return -EIO;
  2032. }
  2033. pci_set_master(pci);
  2034. snd_ymfpci_aclink_reset(pci);
  2035. snd_ymfpci_codec_ready(chip, 0);
  2036. snd_ymfpci_download_image(chip);
  2037. udelay(100);
  2038. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  2039. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  2040. snd_ac97_resume(chip->ac97);
  2041. /* start hw again */
  2042. if (chip->start_count > 0) {
  2043. spin_lock_irq(&chip->reg_lock);
  2044. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  2045. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  2046. spin_unlock_irq(&chip->reg_lock);
  2047. }
  2048. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2049. return 0;
  2050. }
  2051. #endif /* CONFIG_PM */
  2052. int __devinit snd_ymfpci_create(struct snd_card *card,
  2053. struct pci_dev * pci,
  2054. unsigned short old_legacy_ctrl,
  2055. struct snd_ymfpci ** rchip)
  2056. {
  2057. struct snd_ymfpci *chip;
  2058. int err;
  2059. static struct snd_device_ops ops = {
  2060. .dev_free = snd_ymfpci_dev_free,
  2061. };
  2062. *rchip = NULL;
  2063. /* enable PCI device */
  2064. if ((err = pci_enable_device(pci)) < 0)
  2065. return err;
  2066. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  2067. if (chip == NULL) {
  2068. pci_disable_device(pci);
  2069. return -ENOMEM;
  2070. }
  2071. chip->old_legacy_ctrl = old_legacy_ctrl;
  2072. spin_lock_init(&chip->reg_lock);
  2073. spin_lock_init(&chip->voice_lock);
  2074. init_waitqueue_head(&chip->interrupt_sleep);
  2075. atomic_set(&chip->interrupt_sleep_count, 0);
  2076. chip->card = card;
  2077. chip->pci = pci;
  2078. chip->irq = -1;
  2079. chip->device_id = pci->device;
  2080. chip->rev = pci->revision;
  2081. chip->reg_area_phys = pci_resource_start(pci, 0);
  2082. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  2083. pci_set_master(pci);
  2084. chip->src441_used = -1;
  2085. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  2086. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2087. snd_ymfpci_free(chip);
  2088. return -EBUSY;
  2089. }
  2090. if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED,
  2091. "YMFPCI", chip)) {
  2092. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2093. snd_ymfpci_free(chip);
  2094. return -EBUSY;
  2095. }
  2096. chip->irq = pci->irq;
  2097. snd_ymfpci_aclink_reset(pci);
  2098. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2099. snd_ymfpci_free(chip);
  2100. return -EIO;
  2101. }
  2102. err = snd_ymfpci_request_firmware(chip);
  2103. if (err < 0) {
  2104. snd_printk(KERN_ERR "firmware request failed: %d\n", err);
  2105. snd_ymfpci_free(chip);
  2106. return err;
  2107. }
  2108. snd_ymfpci_download_image(chip);
  2109. udelay(100); /* seems we need a delay after downloading image.. */
  2110. if (snd_ymfpci_memalloc(chip) < 0) {
  2111. snd_ymfpci_free(chip);
  2112. return -EIO;
  2113. }
  2114. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2115. snd_ymfpci_free(chip);
  2116. return err;
  2117. }
  2118. #ifdef CONFIG_PM
  2119. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2120. if (chip->saved_regs == NULL) {
  2121. snd_ymfpci_free(chip);
  2122. return -ENOMEM;
  2123. }
  2124. #endif
  2125. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2126. snd_ymfpci_free(chip);
  2127. return err;
  2128. }
  2129. snd_ymfpci_proc_init(card, chip);
  2130. snd_card_set_dev(card, &pci->dev);
  2131. *rchip = chip;
  2132. return 0;
  2133. }