uda1341.c 28 KB

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  1. /*
  2. * Philips UDA1341 mixer device driver
  3. * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
  4. *
  5. * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License.
  9. *
  10. * History:
  11. *
  12. * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
  13. * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
  14. * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
  15. * features support
  16. * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
  17. * 2002-05-12 Tomas Kasparek another code cleanup
  18. */
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/types.h>
  22. #include <linux/slab.h>
  23. #include <linux/errno.h>
  24. #include <linux/ioctl.h>
  25. #include <asm/uaccess.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/initval.h>
  29. #include <sound/info.h>
  30. #include <linux/l3/l3.h>
  31. #include <sound/uda1341.h>
  32. /* {{{ HW regs definition */
  33. #define STAT0 0x00
  34. #define STAT1 0x80
  35. #define STAT_MASK 0x80
  36. #define DATA0_0 0x00
  37. #define DATA0_1 0x40
  38. #define DATA0_2 0x80
  39. #define DATA_MASK 0xc0
  40. #define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
  41. #define IS_DATA1(x) ((x) == data1)
  42. #define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
  43. #define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
  44. /* }}} */
  45. static const char *peak_names[] = {
  46. "before",
  47. "after",
  48. };
  49. static const char *filter_names[] = {
  50. "flat",
  51. "min",
  52. "min",
  53. "max",
  54. };
  55. static const char *mixer_names[] = {
  56. "double differential",
  57. "input channel 1 (line in)",
  58. "input channel 2 (microphone)",
  59. "digital mixer",
  60. };
  61. static const char *deemp_names[] = {
  62. "none",
  63. "32 kHz",
  64. "44.1 kHz",
  65. "48 kHz",
  66. };
  67. enum uda1341_regs_names {
  68. stat0,
  69. stat1,
  70. data0_0,
  71. data0_1,
  72. data0_2,
  73. data1,
  74. ext0,
  75. ext1,
  76. ext2,
  77. empty,
  78. ext4,
  79. ext5,
  80. ext6,
  81. uda1341_reg_last,
  82. };
  83. static const char *uda1341_reg_names[] = {
  84. "stat 0 ",
  85. "stat 1 ",
  86. "data 00",
  87. "data 01",
  88. "data 02",
  89. "data 1 ",
  90. "ext 0",
  91. "ext 1",
  92. "ext 2",
  93. "empty",
  94. "ext 4",
  95. "ext 5",
  96. "ext 6",
  97. };
  98. static const int uda1341_enum_items[] = {
  99. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  100. 2, //peak - before/after
  101. 4, //deemp - none/32/44.1/48
  102. 0,
  103. 4, //filter - flat/min/min/max
  104. 0, 0, 0,
  105. 4, //mixer - differ/line/mic/mixer
  106. 0, 0, 0, 0, 0,
  107. };
  108. static const char ** uda1341_enum_names[] = {
  109. NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
  110. peak_names, //peak - before/after
  111. deemp_names, //deemp - none/32/44.1/48
  112. NULL,
  113. filter_names, //filter - flat/min/min/max
  114. NULL, NULL, NULL,
  115. mixer_names, //mixer - differ/line/mic/mixer
  116. NULL, NULL, NULL, NULL, NULL,
  117. };
  118. typedef int uda1341_cfg[CMD_LAST];
  119. struct uda1341 {
  120. int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
  121. int (*read) (struct l3_client *uda1341, unsigned short reg);
  122. unsigned char regs[uda1341_reg_last];
  123. int active;
  124. spinlock_t reg_lock;
  125. struct snd_card *card;
  126. uda1341_cfg cfg;
  127. #ifdef CONFIG_PM
  128. unsigned char suspend_regs[uda1341_reg_last];
  129. uda1341_cfg suspend_cfg;
  130. #endif
  131. };
  132. /* transfer 8bit integer into string with binary representation */
  133. static void int2str_bin8(uint8_t val, char *buf)
  134. {
  135. const int size = sizeof(val) * 8;
  136. int i;
  137. for (i= 0; i < size; i++){
  138. *(buf++) = (val >> (size - 1)) ? '1' : '0';
  139. val <<= 1;
  140. }
  141. *buf = '\0'; //end the string with zero
  142. }
  143. /* {{{ HW manipulation routines */
  144. static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
  145. {
  146. struct uda1341 *uda = clnt->driver_data;
  147. unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
  148. int err = 0;
  149. uda->regs[reg] = val;
  150. if (uda->active) {
  151. if (IS_DATA0(reg)) {
  152. err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
  153. } else if (IS_DATA1(reg)) {
  154. err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
  155. } else if (IS_STATUS(reg)) {
  156. err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
  157. } else if (IS_EXTEND(reg)) {
  158. buf[0] |= (reg - ext0) & 0x7; //EXT address
  159. buf[1] |= val; //EXT data
  160. err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
  161. }
  162. } else
  163. printk(KERN_ERR "UDA1341 codec not active!\n");
  164. return err;
  165. }
  166. static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
  167. {
  168. unsigned char val;
  169. int err;
  170. err = l3_read(clnt, reg, &val, 1);
  171. if (err == 1)
  172. // use just 6bits - the rest is address of the reg
  173. return val & 63;
  174. return err < 0 ? err : -EIO;
  175. }
  176. static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
  177. {
  178. return reg < uda1341_reg_last;
  179. }
  180. static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
  181. unsigned short mask, unsigned short shift,
  182. unsigned short value, int flush)
  183. {
  184. int change;
  185. unsigned short old, new;
  186. struct uda1341 *uda = clnt->driver_data;
  187. #if 0
  188. printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
  189. uda1341_reg_names[reg], mask, shift, value);
  190. #endif
  191. if (!snd_uda1341_valid_reg(clnt, reg))
  192. return -EINVAL;
  193. spin_lock(&uda->reg_lock);
  194. old = uda->regs[reg];
  195. new = (old & ~(mask << shift)) | (value << shift);
  196. change = old != new;
  197. if (change) {
  198. if (flush) uda->write(clnt, reg, new);
  199. uda->regs[reg] = new;
  200. }
  201. spin_unlock(&uda->reg_lock);
  202. return change;
  203. }
  204. static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
  205. unsigned short value, int flush)
  206. {
  207. struct uda1341 *uda = clnt->driver_data;
  208. int ret = 0;
  209. #ifdef CONFIG_PM
  210. int reg;
  211. #endif
  212. #if 0
  213. printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
  214. #endif
  215. uda->cfg[what] = value;
  216. switch(what) {
  217. case CMD_RESET:
  218. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
  219. ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
  220. ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
  221. uda->cfg[CMD_RESET]=0;
  222. break;
  223. case CMD_FS:
  224. ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
  225. break;
  226. case CMD_FORMAT:
  227. ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
  228. break;
  229. case CMD_OGAIN:
  230. ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
  231. break;
  232. case CMD_IGAIN:
  233. ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
  234. break;
  235. case CMD_DAC:
  236. ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
  237. break;
  238. case CMD_ADC:
  239. ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
  240. break;
  241. case CMD_VOLUME:
  242. ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
  243. break;
  244. case CMD_BASS:
  245. ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
  246. break;
  247. case CMD_TREBBLE:
  248. ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
  249. break;
  250. case CMD_PEAK:
  251. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
  252. break;
  253. case CMD_DEEMP:
  254. ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
  255. break;
  256. case CMD_MUTE:
  257. ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
  258. break;
  259. case CMD_FILTER:
  260. ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
  261. break;
  262. case CMD_CH1:
  263. ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
  264. break;
  265. case CMD_CH2:
  266. ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
  267. break;
  268. case CMD_MIC:
  269. ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
  270. break;
  271. case CMD_MIXER:
  272. ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
  273. break;
  274. case CMD_AGC:
  275. ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
  276. break;
  277. case CMD_IG:
  278. ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
  279. ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
  280. break;
  281. case CMD_AGC_TIME:
  282. ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
  283. break;
  284. case CMD_AGC_LEVEL:
  285. ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
  286. break;
  287. #ifdef CONFIG_PM
  288. case CMD_SUSPEND:
  289. for (reg = stat0; reg < uda1341_reg_last; reg++)
  290. uda->suspend_regs[reg] = uda->regs[reg];
  291. for (reg = 0; reg < CMD_LAST; reg++)
  292. uda->suspend_cfg[reg] = uda->cfg[reg];
  293. break;
  294. case CMD_RESUME:
  295. for (reg = stat0; reg < uda1341_reg_last; reg++)
  296. snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
  297. for (reg = 0; reg < CMD_LAST; reg++)
  298. uda->cfg[reg] = uda->suspend_cfg[reg];
  299. break;
  300. #endif
  301. default:
  302. ret = -EINVAL;
  303. break;
  304. }
  305. if (!uda->active)
  306. printk(KERN_ERR "UDA1341 codec not active!\n");
  307. return ret;
  308. }
  309. /* }}} */
  310. /* {{{ Proc interface */
  311. #ifdef CONFIG_PROC_FS
  312. static const char *format_names[] = {
  313. "I2S-bus",
  314. "LSB 16bits",
  315. "LSB 18bits",
  316. "LSB 20bits",
  317. "MSB",
  318. "in LSB 16bits/out MSB",
  319. "in LSB 18bits/out MSB",
  320. "in LSB 20bits/out MSB",
  321. };
  322. static const char *fs_names[] = {
  323. "512*fs",
  324. "384*fs",
  325. "256*fs",
  326. "Unused - bad value!",
  327. };
  328. static const char* bass_values[][16] = {
  329. {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
  330. "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
  331. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
  332. "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
  333. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
  334. "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
  335. {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
  336. "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
  337. };
  338. static const char *mic_sens_value[] = {
  339. "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
  340. };
  341. static const unsigned short AGC_atime[] = {
  342. 11, 16, 11, 16, 21, 11, 16, 21,
  343. };
  344. static const unsigned short AGC_dtime[] = {
  345. 100, 100, 200, 200, 200, 400, 400, 400,
  346. };
  347. static const char *AGC_level[] = {
  348. "-9.0", "-11.5", "-15.0", "-17.5",
  349. };
  350. static const char *ig_small_value[] = {
  351. "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
  352. };
  353. /*
  354. * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
  355. *
  356. * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
  357. * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
  358. * [61]=-2.78, [62] = -1.48, [63] = 0.0
  359. * I tried to compute it, but using but even using logarithm with base either 10 or 2
  360. * i was'n able to get values in the table from the formula. So I constructed another
  361. * formula (see above) to interpolate the values as good as possible. If there is some
  362. * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
  363. * UDA1341TS datasheet is available at:
  364. * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
  365. */
  366. static const char *peak_value[] = {
  367. "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
  368. "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
  369. "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
  370. "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
  371. "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
  372. "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
  373. "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
  374. "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
  375. "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
  376. };
  377. static void snd_uda1341_proc_read(struct snd_info_entry *entry,
  378. struct snd_info_buffer *buffer)
  379. {
  380. struct l3_client *clnt = entry->private_data;
  381. struct uda1341 *uda = clnt->driver_data;
  382. int peak;
  383. peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
  384. if (peak < 0)
  385. peak = 0;
  386. snd_iprintf(buffer, "%s\n\n", uda->card->longname);
  387. // for information about computed values see UDA1341TS datasheet pages 15 - 21
  388. snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
  389. snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
  390. snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
  391. snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
  392. snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
  393. snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
  394. snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
  395. snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
  396. snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
  397. snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
  398. snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
  399. snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
  400. snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
  401. snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
  402. if (uda->cfg[CMD_VOLUME] == 0)
  403. snd_iprintf(buffer, "Volume : 0 dB\n");
  404. else if (uda->cfg[CMD_VOLUME] < 62)
  405. snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
  406. else
  407. snd_iprintf(buffer, "Volume : -INF dB\n");
  408. snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
  409. snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
  410. snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
  411. snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
  412. snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
  413. if(uda->cfg[CMD_CH1] < 31)
  414. snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
  415. ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
  416. uda->cfg[CMD_CH1] & 1 ? '5' : '0');
  417. else
  418. snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
  419. if(uda->cfg[CMD_CH2] < 31)
  420. snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
  421. ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
  422. uda->cfg[CMD_CH2] & 1 ? '5' : '0');
  423. else
  424. snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
  425. if(uda->cfg[CMD_IG] > 5)
  426. snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
  427. (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
  428. else
  429. snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
  430. }
  431. static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
  432. struct snd_info_buffer *buffer)
  433. {
  434. struct l3_client *clnt = entry->private_data;
  435. struct uda1341 *uda = clnt->driver_data;
  436. int reg;
  437. char buf[12];
  438. for (reg = 0; reg < uda1341_reg_last; reg ++) {
  439. if (reg == empty)
  440. continue;
  441. int2str_bin8(uda->regs[reg], buf);
  442. snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
  443. }
  444. int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
  445. snd_iprintf(buffer, "DATA1 = %s\n", buf);
  446. }
  447. #endif /* CONFIG_PROC_FS */
  448. static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
  449. {
  450. struct snd_info_entry *entry;
  451. if (! snd_card_proc_new(card, "uda1341", &entry))
  452. snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read);
  453. if (! snd_card_proc_new(card, "uda1341-regs", &entry))
  454. snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read);
  455. }
  456. /* }}} */
  457. /* {{{ Mixer controls setting */
  458. /* {{{ UDA1341 single functions */
  459. #define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
  460. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
  461. .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
  462. .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
  463. }
  464. static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
  465. struct snd_ctl_elem_info *uinfo)
  466. {
  467. int mask = (kcontrol->private_value >> 12) & 63;
  468. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  469. uinfo->count = 1;
  470. uinfo->value.integer.min = 0;
  471. uinfo->value.integer.max = mask;
  472. return 0;
  473. }
  474. static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
  475. struct snd_ctl_elem_value *ucontrol)
  476. {
  477. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  478. struct uda1341 *uda = clnt->driver_data;
  479. int where = kcontrol->private_value & 31;
  480. int mask = (kcontrol->private_value >> 12) & 63;
  481. int invert = (kcontrol->private_value >> 18) & 1;
  482. ucontrol->value.integer.value[0] = uda->cfg[where];
  483. if (invert)
  484. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  485. return 0;
  486. }
  487. static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
  488. struct snd_ctl_elem_value *ucontrol)
  489. {
  490. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  491. struct uda1341 *uda = clnt->driver_data;
  492. int where = kcontrol->private_value & 31;
  493. int reg = (kcontrol->private_value >> 5) & 15;
  494. int shift = (kcontrol->private_value >> 9) & 7;
  495. int mask = (kcontrol->private_value >> 12) & 63;
  496. int invert = (kcontrol->private_value >> 18) & 1;
  497. unsigned short val;
  498. val = (ucontrol->value.integer.value[0] & mask);
  499. if (invert)
  500. val = mask - val;
  501. uda->cfg[where] = val;
  502. return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
  503. }
  504. /* }}} */
  505. /* {{{ UDA1341 enum functions */
  506. #define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
  507. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
  508. .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
  509. .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
  510. }
  511. static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
  512. struct snd_ctl_elem_info *uinfo)
  513. {
  514. int where = kcontrol->private_value & 31;
  515. const char **texts;
  516. // this register we don't handle this way
  517. if (!uda1341_enum_items[where])
  518. return -EINVAL;
  519. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  520. uinfo->count = 1;
  521. uinfo->value.enumerated.items = uda1341_enum_items[where];
  522. if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
  523. uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
  524. texts = uda1341_enum_names[where];
  525. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  526. return 0;
  527. }
  528. static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
  529. struct snd_ctl_elem_value *ucontrol)
  530. {
  531. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  532. struct uda1341 *uda = clnt->driver_data;
  533. int where = kcontrol->private_value & 31;
  534. ucontrol->value.enumerated.item[0] = uda->cfg[where];
  535. return 0;
  536. }
  537. static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
  538. struct snd_ctl_elem_value *ucontrol)
  539. {
  540. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  541. struct uda1341 *uda = clnt->driver_data;
  542. int where = kcontrol->private_value & 31;
  543. int reg = (kcontrol->private_value >> 5) & 15;
  544. int shift = (kcontrol->private_value >> 9) & 7;
  545. int mask = (kcontrol->private_value >> 12) & 63;
  546. uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
  547. return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
  548. }
  549. /* }}} */
  550. /* {{{ UDA1341 2regs functions */
  551. #define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
  552. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
  553. .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
  554. .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
  555. (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
  556. }
  557. static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
  558. struct snd_ctl_elem_info *uinfo)
  559. {
  560. int mask_1 = (kcontrol->private_value >> 19) & 63;
  561. int mask_2 = (kcontrol->private_value >> 25) & 63;
  562. int mask;
  563. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  564. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  565. uinfo->count = 1;
  566. uinfo->value.integer.min = 0;
  567. uinfo->value.integer.max = mask;
  568. return 0;
  569. }
  570. static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
  571. struct snd_ctl_elem_value *ucontrol)
  572. {
  573. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  574. struct uda1341 *uda = clnt->driver_data;
  575. int where = kcontrol->private_value & 31;
  576. int mask_1 = (kcontrol->private_value >> 19) & 63;
  577. int mask_2 = (kcontrol->private_value >> 25) & 63;
  578. int invert = (kcontrol->private_value >> 31) & 1;
  579. int mask;
  580. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  581. ucontrol->value.integer.value[0] = uda->cfg[where];
  582. if (invert)
  583. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  584. return 0;
  585. }
  586. static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
  587. struct snd_ctl_elem_value *ucontrol)
  588. {
  589. struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
  590. struct uda1341 *uda = clnt->driver_data;
  591. int where = kcontrol->private_value & 31;
  592. int reg_1 = (kcontrol->private_value >> 5) & 15;
  593. int reg_2 = (kcontrol->private_value >> 9) & 15;
  594. int shift_1 = (kcontrol->private_value >> 13) & 7;
  595. int shift_2 = (kcontrol->private_value >> 16) & 7;
  596. int mask_1 = (kcontrol->private_value >> 19) & 63;
  597. int mask_2 = (kcontrol->private_value >> 25) & 63;
  598. int invert = (kcontrol->private_value >> 31) & 1;
  599. int mask;
  600. unsigned short val1, val2, val;
  601. val = ucontrol->value.integer.value[0];
  602. mask = (mask_2 + 1) * (mask_1 + 1) - 1;
  603. val1 = val & mask_1;
  604. val2 = (val / (mask_1 + 1)) & mask_2;
  605. if (invert) {
  606. val1 = mask_1 - val1;
  607. val2 = mask_2 - val2;
  608. }
  609. uda->cfg[where] = invert ? mask - val : val;
  610. //FIXME - return value
  611. snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
  612. return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
  613. }
  614. /* }}} */
  615. static struct snd_kcontrol_new snd_uda1341_controls[] = {
  616. UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
  617. UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
  618. UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
  619. UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
  620. UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
  621. UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
  622. UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
  623. UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
  624. UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
  625. UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
  626. UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
  627. UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
  628. UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
  629. UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
  630. UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
  631. UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
  632. UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
  633. UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
  634. UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
  635. };
  636. static void uda1341_free(struct l3_client *clnt)
  637. {
  638. l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
  639. kfree(clnt);
  640. }
  641. static int uda1341_dev_free(struct snd_device *device)
  642. {
  643. struct l3_client *clnt = device->device_data;
  644. uda1341_free(clnt);
  645. return 0;
  646. }
  647. int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
  648. {
  649. static struct snd_device_ops ops = {
  650. .dev_free = uda1341_dev_free,
  651. };
  652. struct l3_client *clnt;
  653. int idx, err;
  654. if (snd_BUG_ON(!card))
  655. return -EINVAL;
  656. clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
  657. if (clnt == NULL)
  658. return -ENOMEM;
  659. if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
  660. kfree(clnt);
  661. return err;
  662. }
  663. for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
  664. if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
  665. uda1341_free(clnt);
  666. return err;
  667. }
  668. }
  669. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
  670. uda1341_free(clnt);
  671. return err;
  672. }
  673. *clntp = clnt;
  674. strcpy(card->mixername, "UDA1341TS Mixer");
  675. ((struct uda1341 *)clnt->driver_data)->card = card;
  676. snd_uda1341_proc_init(card, clnt);
  677. return 0;
  678. }
  679. /* }}} */
  680. /* {{{ L3 operations */
  681. static int uda1341_attach(struct l3_client *clnt)
  682. {
  683. struct uda1341 *uda;
  684. uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
  685. if (!uda)
  686. return -ENOMEM;
  687. /* init fixed parts of my copy of registers */
  688. uda->regs[stat0] = STAT0;
  689. uda->regs[stat1] = STAT1;
  690. uda->regs[data0_0] = DATA0_0;
  691. uda->regs[data0_1] = DATA0_1;
  692. uda->regs[data0_2] = DATA0_2;
  693. uda->write = snd_uda1341_codec_write;
  694. uda->read = snd_uda1341_codec_read;
  695. spin_lock_init(&uda->reg_lock);
  696. clnt->driver_data = uda;
  697. return 0;
  698. }
  699. static void uda1341_detach(struct l3_client *clnt)
  700. {
  701. kfree(clnt->driver_data);
  702. }
  703. static int
  704. uda1341_command(struct l3_client *clnt, int cmd, void *arg)
  705. {
  706. if (cmd != CMD_READ_REG)
  707. return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
  708. return snd_uda1341_codec_read(clnt, (int) arg);
  709. }
  710. static int uda1341_open(struct l3_client *clnt)
  711. {
  712. struct uda1341 *uda = clnt->driver_data;
  713. uda->active = 1;
  714. /* init default configuration */
  715. snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
  716. snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
  717. snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
  718. snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
  719. snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
  720. snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
  721. snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
  722. snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
  723. snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
  724. snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
  725. snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
  726. snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
  727. //at this moment should be QMUTED by h3600_audio_init
  728. snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
  729. snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
  730. snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
  731. snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
  732. snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
  733. snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
  734. snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
  735. snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
  736. snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
  737. snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
  738. return 0;
  739. }
  740. static void uda1341_close(struct l3_client *clnt)
  741. {
  742. struct uda1341 *uda = clnt->driver_data;
  743. uda->active = 0;
  744. }
  745. /* }}} */
  746. /* {{{ Module and L3 initialization */
  747. static struct l3_ops uda1341_ops = {
  748. .open = uda1341_open,
  749. .command = uda1341_command,
  750. .close = uda1341_close,
  751. };
  752. static struct l3_driver uda1341_driver = {
  753. .name = UDA1341_ALSA_NAME,
  754. .attach_client = uda1341_attach,
  755. .detach_client = uda1341_detach,
  756. .ops = &uda1341_ops,
  757. .owner = THIS_MODULE,
  758. };
  759. static int __init uda1341_init(void)
  760. {
  761. return l3_add_driver(&uda1341_driver);
  762. }
  763. static void __exit uda1341_exit(void)
  764. {
  765. l3_del_driver(&uda1341_driver);
  766. }
  767. module_init(uda1341_init);
  768. module_exit(uda1341_exit);
  769. MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
  770. MODULE_LICENSE("GPL");
  771. MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
  772. MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
  773. EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
  774. /* }}} */
  775. /*
  776. * Local variables:
  777. * indent-tabs-mode: t
  778. * End:
  779. */