opl3_lib.c 14 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
  3. * Hannu Savolainen 1993-1996,
  4. * Rob Hooft
  5. *
  6. * Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)
  7. *
  8. * Most if code is ported from OSS/Lite.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <sound/opl3.h>
  26. #include <asm/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/ioport.h>
  31. #include <sound/minors.h>
  32. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>, Hannu Savolainen 1993-1996, Rob Hooft");
  33. MODULE_DESCRIPTION("Routines for control of AdLib FM cards (OPL2/OPL3/OPL4 chips)");
  34. MODULE_LICENSE("GPL");
  35. extern char snd_opl3_regmap[MAX_OPL2_VOICES][4];
  36. static void snd_opl2_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  37. {
  38. unsigned long flags;
  39. unsigned long port;
  40. /*
  41. * The original 2-OP synth requires a quite long delay
  42. * after writing to a register.
  43. */
  44. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  45. spin_lock_irqsave(&opl3->reg_lock, flags);
  46. outb((unsigned char) cmd, port);
  47. udelay(10);
  48. outb((unsigned char) val, port + 1);
  49. udelay(30);
  50. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  51. }
  52. static void snd_opl3_command(struct snd_opl3 * opl3, unsigned short cmd, unsigned char val)
  53. {
  54. unsigned long flags;
  55. unsigned long port;
  56. /*
  57. * The OPL-3 survives with just two INBs
  58. * after writing to a register.
  59. */
  60. port = (cmd & OPL3_RIGHT) ? opl3->r_port : opl3->l_port;
  61. spin_lock_irqsave(&opl3->reg_lock, flags);
  62. outb((unsigned char) cmd, port);
  63. inb(opl3->l_port);
  64. inb(opl3->l_port);
  65. outb((unsigned char) val, port + 1);
  66. inb(opl3->l_port);
  67. inb(opl3->l_port);
  68. spin_unlock_irqrestore(&opl3->reg_lock, flags);
  69. }
  70. static int snd_opl3_detect(struct snd_opl3 * opl3)
  71. {
  72. /*
  73. * This function returns 1 if the FM chip is present at the given I/O port
  74. * The detection algorithm plays with the timer built in the FM chip and
  75. * looks for a change in the status register.
  76. *
  77. * Note! The timers of the FM chip are not connected to AdLib (and compatible)
  78. * boards.
  79. *
  80. * Note2! The chip is initialized if detected.
  81. */
  82. unsigned char stat1, stat2, signature;
  83. /* Reset timers 1 and 2 */
  84. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  85. /* Reset the IRQ of the FM chip */
  86. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  87. signature = stat1 = inb(opl3->l_port); /* Status register */
  88. if ((stat1 & 0xe0) != 0x00) { /* Should be 0x00 */
  89. snd_printd("OPL3: stat1 = 0x%x\n", stat1);
  90. return -ENODEV;
  91. }
  92. /* Set timer1 to 0xff */
  93. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 0xff);
  94. /* Unmask and start timer 1 */
  95. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER2_MASK | OPL3_TIMER1_START);
  96. /* Now we have to delay at least 80us */
  97. udelay(200);
  98. /* Read status after timers have expired */
  99. stat2 = inb(opl3->l_port);
  100. /* Stop the timers */
  101. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_TIMER1_MASK | OPL3_TIMER2_MASK);
  102. /* Reset the IRQ of the FM chip */
  103. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, OPL3_IRQ_RESET);
  104. if ((stat2 & 0xe0) != 0xc0) { /* There is no YM3812 */
  105. snd_printd("OPL3: stat2 = 0x%x\n", stat2);
  106. return -ENODEV;
  107. }
  108. /* If the toplevel code knows exactly the type of chip, don't try
  109. to detect it. */
  110. if (opl3->hardware != OPL3_HW_AUTO)
  111. return 0;
  112. /* There is a FM chip on this address. Detect the type (OPL2 to OPL4) */
  113. if (signature == 0x06) { /* OPL2 */
  114. opl3->hardware = OPL3_HW_OPL2;
  115. } else {
  116. /*
  117. * If we had an OPL4 chip, opl3->hardware would have been set
  118. * by the OPL4 driver; so we can assume OPL3 here.
  119. */
  120. if (snd_BUG_ON(!opl3->r_port))
  121. return -ENODEV;
  122. opl3->hardware = OPL3_HW_OPL3;
  123. }
  124. return 0;
  125. }
  126. /*
  127. * AdLib timers
  128. */
  129. /*
  130. * Timer 1 - 80us
  131. */
  132. static int snd_opl3_timer1_start(struct snd_timer * timer)
  133. {
  134. unsigned long flags;
  135. unsigned char tmp;
  136. unsigned int ticks;
  137. struct snd_opl3 *opl3;
  138. opl3 = snd_timer_chip(timer);
  139. spin_lock_irqsave(&opl3->timer_lock, flags);
  140. ticks = timer->sticks;
  141. tmp = (opl3->timer_enable | OPL3_TIMER1_START) & ~OPL3_TIMER1_MASK;
  142. opl3->timer_enable = tmp;
  143. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER1, 256 - ticks); /* timer 1 count */
  144. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  145. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  146. return 0;
  147. }
  148. static int snd_opl3_timer1_stop(struct snd_timer * timer)
  149. {
  150. unsigned long flags;
  151. unsigned char tmp;
  152. struct snd_opl3 *opl3;
  153. opl3 = snd_timer_chip(timer);
  154. spin_lock_irqsave(&opl3->timer_lock, flags);
  155. tmp = (opl3->timer_enable | OPL3_TIMER1_MASK) & ~OPL3_TIMER1_START;
  156. opl3->timer_enable = tmp;
  157. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  158. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  159. return 0;
  160. }
  161. /*
  162. * Timer 2 - 320us
  163. */
  164. static int snd_opl3_timer2_start(struct snd_timer * timer)
  165. {
  166. unsigned long flags;
  167. unsigned char tmp;
  168. unsigned int ticks;
  169. struct snd_opl3 *opl3;
  170. opl3 = snd_timer_chip(timer);
  171. spin_lock_irqsave(&opl3->timer_lock, flags);
  172. ticks = timer->sticks;
  173. tmp = (opl3->timer_enable | OPL3_TIMER2_START) & ~OPL3_TIMER2_MASK;
  174. opl3->timer_enable = tmp;
  175. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER2, 256 - ticks); /* timer 1 count */
  176. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* enable timer 1 IRQ */
  177. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  178. return 0;
  179. }
  180. static int snd_opl3_timer2_stop(struct snd_timer * timer)
  181. {
  182. unsigned long flags;
  183. unsigned char tmp;
  184. struct snd_opl3 *opl3;
  185. opl3 = snd_timer_chip(timer);
  186. spin_lock_irqsave(&opl3->timer_lock, flags);
  187. tmp = (opl3->timer_enable | OPL3_TIMER2_MASK) & ~OPL3_TIMER2_START;
  188. opl3->timer_enable = tmp;
  189. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TIMER_CONTROL, tmp); /* disable timer #1 */
  190. spin_unlock_irqrestore(&opl3->timer_lock, flags);
  191. return 0;
  192. }
  193. /*
  194. */
  195. static struct snd_timer_hardware snd_opl3_timer1 =
  196. {
  197. .flags = SNDRV_TIMER_HW_STOP,
  198. .resolution = 80000,
  199. .ticks = 256,
  200. .start = snd_opl3_timer1_start,
  201. .stop = snd_opl3_timer1_stop,
  202. };
  203. static struct snd_timer_hardware snd_opl3_timer2 =
  204. {
  205. .flags = SNDRV_TIMER_HW_STOP,
  206. .resolution = 320000,
  207. .ticks = 256,
  208. .start = snd_opl3_timer2_start,
  209. .stop = snd_opl3_timer2_stop,
  210. };
  211. static int snd_opl3_timer1_init(struct snd_opl3 * opl3, int timer_no)
  212. {
  213. struct snd_timer *timer = NULL;
  214. struct snd_timer_id tid;
  215. int err;
  216. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  217. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  218. tid.card = opl3->card->number;
  219. tid.device = timer_no;
  220. tid.subdevice = 0;
  221. if ((err = snd_timer_new(opl3->card, "AdLib timer #1", &tid, &timer)) >= 0) {
  222. strcpy(timer->name, "AdLib timer #1");
  223. timer->private_data = opl3;
  224. timer->hw = snd_opl3_timer1;
  225. }
  226. opl3->timer1 = timer;
  227. return err;
  228. }
  229. static int snd_opl3_timer2_init(struct snd_opl3 * opl3, int timer_no)
  230. {
  231. struct snd_timer *timer = NULL;
  232. struct snd_timer_id tid;
  233. int err;
  234. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  235. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  236. tid.card = opl3->card->number;
  237. tid.device = timer_no;
  238. tid.subdevice = 0;
  239. if ((err = snd_timer_new(opl3->card, "AdLib timer #2", &tid, &timer)) >= 0) {
  240. strcpy(timer->name, "AdLib timer #2");
  241. timer->private_data = opl3;
  242. timer->hw = snd_opl3_timer2;
  243. }
  244. opl3->timer2 = timer;
  245. return err;
  246. }
  247. /*
  248. */
  249. void snd_opl3_interrupt(struct snd_hwdep * hw)
  250. {
  251. unsigned char status;
  252. struct snd_opl3 *opl3;
  253. struct snd_timer *timer;
  254. if (hw == NULL)
  255. return;
  256. opl3 = hw->private_data;
  257. status = inb(opl3->l_port);
  258. #if 0
  259. snd_printk("AdLib IRQ status = 0x%x\n", status);
  260. #endif
  261. if (!(status & 0x80))
  262. return;
  263. if (status & 0x40) {
  264. timer = opl3->timer1;
  265. snd_timer_interrupt(timer, timer->sticks);
  266. }
  267. if (status & 0x20) {
  268. timer = opl3->timer2;
  269. snd_timer_interrupt(timer, timer->sticks);
  270. }
  271. }
  272. EXPORT_SYMBOL(snd_opl3_interrupt);
  273. /*
  274. */
  275. static int snd_opl3_free(struct snd_opl3 *opl3)
  276. {
  277. if (snd_BUG_ON(!opl3))
  278. return -ENXIO;
  279. if (opl3->private_free)
  280. opl3->private_free(opl3);
  281. snd_opl3_clear_patches(opl3);
  282. release_and_free_resource(opl3->res_l_port);
  283. release_and_free_resource(opl3->res_r_port);
  284. kfree(opl3);
  285. return 0;
  286. }
  287. static int snd_opl3_dev_free(struct snd_device *device)
  288. {
  289. struct snd_opl3 *opl3 = device->device_data;
  290. return snd_opl3_free(opl3);
  291. }
  292. int snd_opl3_new(struct snd_card *card,
  293. unsigned short hardware,
  294. struct snd_opl3 **ropl3)
  295. {
  296. static struct snd_device_ops ops = {
  297. .dev_free = snd_opl3_dev_free,
  298. };
  299. struct snd_opl3 *opl3;
  300. int err;
  301. *ropl3 = NULL;
  302. opl3 = kzalloc(sizeof(*opl3), GFP_KERNEL);
  303. if (opl3 == NULL) {
  304. snd_printk(KERN_ERR "opl3: cannot allocate\n");
  305. return -ENOMEM;
  306. }
  307. opl3->card = card;
  308. opl3->hardware = hardware;
  309. spin_lock_init(&opl3->reg_lock);
  310. spin_lock_init(&opl3->timer_lock);
  311. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, opl3, &ops)) < 0) {
  312. snd_opl3_free(opl3);
  313. return err;
  314. }
  315. *ropl3 = opl3;
  316. return 0;
  317. }
  318. EXPORT_SYMBOL(snd_opl3_new);
  319. int snd_opl3_init(struct snd_opl3 *opl3)
  320. {
  321. if (! opl3->command) {
  322. printk(KERN_ERR "snd_opl3_init: command not defined!\n");
  323. return -EINVAL;
  324. }
  325. opl3->command(opl3, OPL3_LEFT | OPL3_REG_TEST, OPL3_ENABLE_WAVE_SELECT);
  326. /* Melodic mode */
  327. opl3->command(opl3, OPL3_LEFT | OPL3_REG_PERCUSSION, 0x00);
  328. switch (opl3->hardware & OPL3_HW_MASK) {
  329. case OPL3_HW_OPL2:
  330. opl3->max_voices = MAX_OPL2_VOICES;
  331. break;
  332. case OPL3_HW_OPL3:
  333. case OPL3_HW_OPL4:
  334. opl3->max_voices = MAX_OPL3_VOICES;
  335. /* Enter OPL3 mode */
  336. opl3->command(opl3, OPL3_RIGHT | OPL3_REG_MODE, OPL3_OPL3_ENABLE);
  337. }
  338. return 0;
  339. }
  340. EXPORT_SYMBOL(snd_opl3_init);
  341. int snd_opl3_create(struct snd_card *card,
  342. unsigned long l_port,
  343. unsigned long r_port,
  344. unsigned short hardware,
  345. int integrated,
  346. struct snd_opl3 ** ropl3)
  347. {
  348. struct snd_opl3 *opl3;
  349. int err;
  350. *ropl3 = NULL;
  351. if ((err = snd_opl3_new(card, hardware, &opl3)) < 0)
  352. return err;
  353. if (! integrated) {
  354. if ((opl3->res_l_port = request_region(l_port, 2, "OPL2/3 (left)")) == NULL) {
  355. snd_printk(KERN_ERR "opl3: can't grab left port 0x%lx\n", l_port);
  356. snd_device_free(card, opl3);
  357. return -EBUSY;
  358. }
  359. if (r_port != 0 &&
  360. (opl3->res_r_port = request_region(r_port, 2, "OPL2/3 (right)")) == NULL) {
  361. snd_printk(KERN_ERR "opl3: can't grab right port 0x%lx\n", r_port);
  362. snd_device_free(card, opl3);
  363. return -EBUSY;
  364. }
  365. }
  366. opl3->l_port = l_port;
  367. opl3->r_port = r_port;
  368. switch (opl3->hardware) {
  369. /* some hardware doesn't support timers */
  370. case OPL3_HW_OPL3_SV:
  371. case OPL3_HW_OPL3_CS:
  372. case OPL3_HW_OPL3_FM801:
  373. opl3->command = &snd_opl3_command;
  374. break;
  375. default:
  376. opl3->command = &snd_opl2_command;
  377. if ((err = snd_opl3_detect(opl3)) < 0) {
  378. snd_printd("OPL2/3 chip not detected at 0x%lx/0x%lx\n",
  379. opl3->l_port, opl3->r_port);
  380. snd_device_free(card, opl3);
  381. return err;
  382. }
  383. /* detect routine returns correct hardware type */
  384. switch (opl3->hardware & OPL3_HW_MASK) {
  385. case OPL3_HW_OPL3:
  386. case OPL3_HW_OPL4:
  387. opl3->command = &snd_opl3_command;
  388. }
  389. }
  390. snd_opl3_init(opl3);
  391. *ropl3 = opl3;
  392. return 0;
  393. }
  394. EXPORT_SYMBOL(snd_opl3_create);
  395. int snd_opl3_timer_new(struct snd_opl3 * opl3, int timer1_dev, int timer2_dev)
  396. {
  397. int err;
  398. if (timer1_dev >= 0)
  399. if ((err = snd_opl3_timer1_init(opl3, timer1_dev)) < 0)
  400. return err;
  401. if (timer2_dev >= 0) {
  402. if ((err = snd_opl3_timer2_init(opl3, timer2_dev)) < 0) {
  403. snd_device_free(opl3->card, opl3->timer1);
  404. opl3->timer1 = NULL;
  405. return err;
  406. }
  407. }
  408. return 0;
  409. }
  410. EXPORT_SYMBOL(snd_opl3_timer_new);
  411. int snd_opl3_hwdep_new(struct snd_opl3 * opl3,
  412. int device, int seq_device,
  413. struct snd_hwdep ** rhwdep)
  414. {
  415. struct snd_hwdep *hw;
  416. struct snd_card *card = opl3->card;
  417. int err;
  418. if (rhwdep)
  419. *rhwdep = NULL;
  420. /* create hardware dependent device (direct FM) */
  421. if ((err = snd_hwdep_new(card, "OPL2/OPL3", device, &hw)) < 0) {
  422. snd_device_free(card, opl3);
  423. return err;
  424. }
  425. hw->private_data = opl3;
  426. hw->exclusive = 1;
  427. #ifdef CONFIG_SND_OSSEMUL
  428. if (device == 0) {
  429. hw->oss_type = SNDRV_OSS_DEVICE_TYPE_DMFM;
  430. sprintf(hw->oss_dev, "dmfm%i", card->number);
  431. }
  432. #endif
  433. strcpy(hw->name, hw->id);
  434. switch (opl3->hardware & OPL3_HW_MASK) {
  435. case OPL3_HW_OPL2:
  436. strcpy(hw->name, "OPL2 FM");
  437. hw->iface = SNDRV_HWDEP_IFACE_OPL2;
  438. break;
  439. case OPL3_HW_OPL3:
  440. strcpy(hw->name, "OPL3 FM");
  441. hw->iface = SNDRV_HWDEP_IFACE_OPL3;
  442. break;
  443. case OPL3_HW_OPL4:
  444. strcpy(hw->name, "OPL4 FM");
  445. hw->iface = SNDRV_HWDEP_IFACE_OPL4;
  446. break;
  447. }
  448. /* operators - only ioctl */
  449. hw->ops.open = snd_opl3_open;
  450. hw->ops.ioctl = snd_opl3_ioctl;
  451. hw->ops.write = snd_opl3_write;
  452. hw->ops.release = snd_opl3_release;
  453. opl3->hwdep = hw;
  454. opl3->seq_dev_num = seq_device;
  455. #if defined(CONFIG_SND_SEQUENCER) || (defined(MODULE) && defined(CONFIG_SND_SEQUENCER_MODULE))
  456. if (snd_seq_device_new(card, seq_device, SNDRV_SEQ_DEV_ID_OPL3,
  457. sizeof(struct snd_opl3 *), &opl3->seq_dev) >= 0) {
  458. strcpy(opl3->seq_dev->name, hw->name);
  459. *(struct snd_opl3 **)SNDRV_SEQ_DEVICE_ARGPTR(opl3->seq_dev) = opl3;
  460. }
  461. #endif
  462. if (rhwdep)
  463. *rhwdep = hw;
  464. return 0;
  465. }
  466. EXPORT_SYMBOL(snd_opl3_hwdep_new);
  467. /*
  468. * INIT part
  469. */
  470. static int __init alsa_opl3_init(void)
  471. {
  472. return 0;
  473. }
  474. static void __exit alsa_opl3_exit(void)
  475. {
  476. }
  477. module_init(alsa_opl3_init)
  478. module_exit(alsa_opl3_exit)