sa11xx-uda1341.c 27 KB

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  1. /*
  2. * Driver for Philips UDA1341TS on Compaq iPAQ H3600 soundcard
  3. * Copyright (C) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License.
  7. *
  8. * History:
  9. *
  10. * 2002-03-13 Tomas Kasparek initial release - based on h3600-uda1341.c from OSS
  11. * 2002-03-20 Tomas Kasparek playback over ALSA is working
  12. * 2002-03-28 Tomas Kasparek playback over OSS emulation is working
  13. * 2002-03-29 Tomas Kasparek basic capture is working (native ALSA)
  14. * 2002-03-29 Tomas Kasparek capture is working (OSS emulation)
  15. * 2002-04-04 Tomas Kasparek better rates handling (allow non-standard rates)
  16. * 2003-02-14 Brian Avery fixed full duplex mode, other updates
  17. * 2003-02-20 Tomas Kasparek merged updates by Brian (except HAL)
  18. * 2003-04-19 Jaroslav Kysela recoded DMA stuff to follow 2.4.18rmk3-hh24 kernel
  19. * working suspend and resume
  20. * 2003-04-28 Tomas Kasparek updated work by Jaroslav to compile it under 2.5.x again
  21. * merged HAL layer (patches from Brian)
  22. */
  23. /***************************************************************************************************
  24. *
  25. * To understand what Alsa Drivers should be doing look at "Writing an Alsa Driver" by Takashi Iwai
  26. * available in the Alsa doc section on the website
  27. *
  28. * A few notes to make things clearer. The UDA1341 is hooked up to Serial port 4 on the SA1100.
  29. * We are using SSP mode to talk to the UDA1341. The UDA1341 bit & wordselect clocks are generated
  30. * by this UART. Unfortunately, the clock only runs if the transmit buffer has something in it.
  31. * So, if we are just recording, we feed the transmit DMA stream a bunch of 0x0000 so that the
  32. * transmit buffer is full and the clock keeps going. The zeroes come from FLUSH_BASE_PHYS which
  33. * is a mem loc that always decodes to 0's w/ no off chip access.
  34. *
  35. * Some alsa terminology:
  36. * frame => num_channels * sample_size e.g stereo 16 bit is 2 * 16 = 32 bytes
  37. * period => the least number of bytes that will generate an interrupt e.g. we have a 1024 byte
  38. * buffer and 4 periods in the runtime structure this means we'll get an int every 256
  39. * bytes or 4 times per buffer.
  40. * A number of the sizes are in frames rather than bytes, use frames_to_bytes and
  41. * bytes_to_frames to convert. The easiest way to tell the units is to look at the
  42. * type i.e. runtime-> buffer_size is in frames and its type is snd_pcm_uframes_t
  43. *
  44. * Notes about the pointer fxn:
  45. * The pointer fxn needs to return the offset into the dma buffer in frames.
  46. * Interrupts must be blocked before calling the dma_get_pos fxn to avoid race with interrupts.
  47. *
  48. * Notes about pause/resume
  49. * Implementing this would be complicated so it's skipped. The problem case is:
  50. * A full duplex connection is going, then play is paused. At this point you need to start xmitting
  51. * 0's to keep the record active which means you cant just freeze the dma and resume it later you'd
  52. * need to save off the dma info, and restore it properly on a resume. Yeach!
  53. *
  54. * Notes about transfer methods:
  55. * The async write calls fail. I probably need to implement something else to support them?
  56. *
  57. ***************************************************************************************************/
  58. #include <linux/module.h>
  59. #include <linux/moduleparam.h>
  60. #include <linux/init.h>
  61. #include <linux/err.h>
  62. #include <linux/platform_device.h>
  63. #include <linux/errno.h>
  64. #include <linux/ioctl.h>
  65. #include <linux/delay.h>
  66. #include <linux/slab.h>
  67. #ifdef CONFIG_PM
  68. #include <linux/pm.h>
  69. #endif
  70. #include <mach/hardware.h>
  71. #include <mach/h3600.h>
  72. #include <asm/mach-types.h>
  73. #include <asm/dma.h>
  74. #include <sound/core.h>
  75. #include <sound/pcm.h>
  76. #include <sound/initval.h>
  77. #include <linux/l3/l3.h>
  78. #undef DEBUG_MODE
  79. #undef DEBUG_FUNCTION_NAMES
  80. #include <sound/uda1341.h>
  81. /*
  82. * FIXME: Is this enough as autodetection of 2.4.X-rmkY-hhZ kernels?
  83. * We use DMA stuff from 2.4.18-rmk3-hh24 here to be able to compile this
  84. * module for Familiar 0.6.1
  85. */
  86. /* {{{ Type definitions */
  87. MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
  88. MODULE_LICENSE("GPL");
  89. MODULE_DESCRIPTION("SA1100/SA1111 + UDA1341TS driver for ALSA");
  90. MODULE_SUPPORTED_DEVICE("{{UDA1341,iPAQ H3600 UDA1341TS}}");
  91. static char *id; /* ID for this card */
  92. module_param(id, charp, 0444);
  93. MODULE_PARM_DESC(id, "ID string for SA1100/SA1111 + UDA1341TS soundcard.");
  94. struct audio_stream {
  95. char *id; /* identification string */
  96. int stream_id; /* numeric identification */
  97. dma_device_t dma_dev; /* device identifier for DMA */
  98. #ifdef HH_VERSION
  99. dmach_t dmach; /* dma channel identification */
  100. #else
  101. dma_regs_t *dma_regs; /* points to our DMA registers */
  102. #endif
  103. unsigned int active:1; /* we are using this stream for transfer now */
  104. int period; /* current transfer period */
  105. int periods; /* current count of periods registerd in the DMA engine */
  106. int tx_spin; /* are we recoding - flag used to do DMA trans. for sync */
  107. unsigned int old_offset;
  108. spinlock_t dma_lock; /* for locking in DMA operations (see dma-sa1100.c in the kernel) */
  109. struct snd_pcm_substream *stream;
  110. };
  111. struct sa11xx_uda1341 {
  112. struct snd_card *card;
  113. struct l3_client *uda1341;
  114. struct snd_pcm *pcm;
  115. long samplerate;
  116. struct audio_stream s[2]; /* playback & capture */
  117. };
  118. static unsigned int rates[] = {
  119. 8000, 10666, 10985, 14647,
  120. 16000, 21970, 22050, 24000,
  121. 29400, 32000, 44100, 48000,
  122. };
  123. static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  124. .count = ARRAY_SIZE(rates),
  125. .list = rates,
  126. .mask = 0,
  127. };
  128. static struct platform_device *device;
  129. /* }}} */
  130. /* {{{ Clock and sample rate stuff */
  131. /*
  132. * Stop-gap solution until rest of hh.org HAL stuff is merged.
  133. */
  134. #define GPIO_H3600_CLK_SET0 GPIO_GPIO (12)
  135. #define GPIO_H3600_CLK_SET1 GPIO_GPIO (13)
  136. #ifdef CONFIG_SA1100_H3XXX
  137. #define clr_sa11xx_uda1341_egpio(x) clr_h3600_egpio(x)
  138. #define set_sa11xx_uda1341_egpio(x) set_h3600_egpio(x)
  139. #else
  140. #error This driver could serve H3x00 handhelds only!
  141. #endif
  142. static void sa11xx_uda1341_set_audio_clock(long val)
  143. {
  144. switch (val) {
  145. case 24000: case 32000: case 48000: /* 00: 12.288 MHz */
  146. GPCR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
  147. break;
  148. case 22050: case 29400: case 44100: /* 01: 11.2896 MHz */
  149. GPSR = GPIO_H3600_CLK_SET0;
  150. GPCR = GPIO_H3600_CLK_SET1;
  151. break;
  152. case 8000: case 10666: case 16000: /* 10: 4.096 MHz */
  153. GPCR = GPIO_H3600_CLK_SET0;
  154. GPSR = GPIO_H3600_CLK_SET1;
  155. break;
  156. case 10985: case 14647: case 21970: /* 11: 5.6245 MHz */
  157. GPSR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
  158. break;
  159. }
  160. }
  161. static void sa11xx_uda1341_set_samplerate(struct sa11xx_uda1341 *sa11xx_uda1341, long rate)
  162. {
  163. int clk_div = 0;
  164. int clk=0;
  165. /* We don't want to mess with clocks when frames are in flight */
  166. Ser4SSCR0 &= ~SSCR0_SSE;
  167. /* wait for any frame to complete */
  168. udelay(125);
  169. /*
  170. * We have the following clock sources:
  171. * 4.096 MHz, 5.6245 MHz, 11.2896 MHz, 12.288 MHz
  172. * Those can be divided either by 256, 384 or 512.
  173. * This makes up 12 combinations for the following samplerates...
  174. */
  175. if (rate >= 48000)
  176. rate = 48000;
  177. else if (rate >= 44100)
  178. rate = 44100;
  179. else if (rate >= 32000)
  180. rate = 32000;
  181. else if (rate >= 29400)
  182. rate = 29400;
  183. else if (rate >= 24000)
  184. rate = 24000;
  185. else if (rate >= 22050)
  186. rate = 22050;
  187. else if (rate >= 21970)
  188. rate = 21970;
  189. else if (rate >= 16000)
  190. rate = 16000;
  191. else if (rate >= 14647)
  192. rate = 14647;
  193. else if (rate >= 10985)
  194. rate = 10985;
  195. else if (rate >= 10666)
  196. rate = 10666;
  197. else
  198. rate = 8000;
  199. /* Set the external clock generator */
  200. sa11xx_uda1341_set_audio_clock(rate);
  201. /* Select the clock divisor */
  202. switch (rate) {
  203. case 8000:
  204. case 10985:
  205. case 22050:
  206. case 24000:
  207. clk = F512;
  208. clk_div = SSCR0_SerClkDiv(16);
  209. break;
  210. case 16000:
  211. case 21970:
  212. case 44100:
  213. case 48000:
  214. clk = F256;
  215. clk_div = SSCR0_SerClkDiv(8);
  216. break;
  217. case 10666:
  218. case 14647:
  219. case 29400:
  220. case 32000:
  221. clk = F384;
  222. clk_div = SSCR0_SerClkDiv(12);
  223. break;
  224. }
  225. /* FMT setting should be moved away when other FMTs are added (FIXME) */
  226. l3_command(sa11xx_uda1341->uda1341, CMD_FORMAT, (void *)LSB16);
  227. l3_command(sa11xx_uda1341->uda1341, CMD_FS, (void *)clk);
  228. Ser4SSCR0 = (Ser4SSCR0 & ~0xff00) + clk_div + SSCR0_SSE;
  229. sa11xx_uda1341->samplerate = rate;
  230. }
  231. /* }}} */
  232. /* {{{ HW init and shutdown */
  233. static void sa11xx_uda1341_audio_init(struct sa11xx_uda1341 *sa11xx_uda1341)
  234. {
  235. unsigned long flags;
  236. /* Setup DMA stuff */
  237. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].id = "UDA1341 out";
  238. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = SNDRV_PCM_STREAM_PLAYBACK;
  239. sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].dma_dev = DMA_Ser4SSPWr;
  240. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].id = "UDA1341 in";
  241. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = SNDRV_PCM_STREAM_CAPTURE;
  242. sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].dma_dev = DMA_Ser4SSPRd;
  243. /* Initialize the UDA1341 internal state */
  244. /* Setup the uarts */
  245. local_irq_save(flags);
  246. GAFR |= (GPIO_SSP_CLK);
  247. GPDR &= ~(GPIO_SSP_CLK);
  248. Ser4SSCR0 = 0;
  249. Ser4SSCR0 = SSCR0_DataSize(16) + SSCR0_TI + SSCR0_SerClkDiv(8);
  250. Ser4SSCR1 = SSCR1_SClkIactL + SSCR1_SClk1P + SSCR1_ExtClk;
  251. Ser4SSCR0 |= SSCR0_SSE;
  252. local_irq_restore(flags);
  253. /* Enable the audio power */
  254. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  255. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
  256. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  257. /* Wait for the UDA1341 to wake up */
  258. mdelay(1); //FIXME - was removed by Perex - Why?
  259. /* Initialize the UDA1341 internal state */
  260. l3_open(sa11xx_uda1341->uda1341);
  261. /* external clock configuration (after l3_open - regs must be initialized */
  262. sa11xx_uda1341_set_samplerate(sa11xx_uda1341, sa11xx_uda1341->samplerate);
  263. /* Wait for the UDA1341 to wake up */
  264. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  265. mdelay(1);
  266. /* make the left and right channels unswapped (flip the WS latch) */
  267. Ser4SSDR = 0;
  268. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  269. }
  270. static void sa11xx_uda1341_audio_shutdown(struct sa11xx_uda1341 *sa11xx_uda1341)
  271. {
  272. /* mute on */
  273. set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  274. /* disable the audio power and all signals leading to the audio chip */
  275. l3_close(sa11xx_uda1341->uda1341);
  276. Ser4SSCR0 = 0;
  277. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
  278. /* power off and mute off */
  279. /* FIXME - is muting off necesary??? */
  280. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
  281. clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
  282. }
  283. /* }}} */
  284. /* {{{ DMA staff */
  285. /*
  286. * these are the address and sizes used to fill the xmit buffer
  287. * so we can get a clock in record only mode
  288. */
  289. #define FORCE_CLOCK_ADDR (dma_addr_t)FLUSH_BASE_PHYS
  290. #define FORCE_CLOCK_SIZE 4096 // was 2048
  291. // FIXME Why this value exactly - wrote comment
  292. #define DMA_BUF_SIZE 8176 /* <= MAX_DMA_SIZE from asm/arch-sa1100/dma.h */
  293. #ifdef HH_VERSION
  294. static int audio_dma_request(struct audio_stream *s, void (*callback)(void *, int))
  295. {
  296. int ret;
  297. ret = sa1100_request_dma(&s->dmach, s->id, s->dma_dev);
  298. if (ret < 0) {
  299. printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
  300. return ret;
  301. }
  302. sa1100_dma_set_callback(s->dmach, callback);
  303. return 0;
  304. }
  305. static inline void audio_dma_free(struct audio_stream *s)
  306. {
  307. sa1100_free_dma(s->dmach);
  308. s->dmach = -1;
  309. }
  310. #else
  311. static int audio_dma_request(struct audio_stream *s, void (*callback)(void *))
  312. {
  313. int ret;
  314. ret = sa1100_request_dma(s->dma_dev, s->id, callback, s, &s->dma_regs);
  315. if (ret < 0)
  316. printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
  317. return ret;
  318. }
  319. static void audio_dma_free(struct audio_stream *s)
  320. {
  321. sa1100_free_dma(s->dma_regs);
  322. s->dma_regs = 0;
  323. }
  324. #endif
  325. static u_int audio_get_dma_pos(struct audio_stream *s)
  326. {
  327. struct snd_pcm_substream *substream = s->stream;
  328. struct snd_pcm_runtime *runtime = substream->runtime;
  329. unsigned int offset;
  330. unsigned long flags;
  331. dma_addr_t addr;
  332. // this must be called w/ interrupts locked out see dma-sa1100.c in the kernel
  333. spin_lock_irqsave(&s->dma_lock, flags);
  334. #ifdef HH_VERSION
  335. sa1100_dma_get_current(s->dmach, NULL, &addr);
  336. #else
  337. addr = sa1100_get_dma_pos((s)->dma_regs);
  338. #endif
  339. offset = addr - runtime->dma_addr;
  340. spin_unlock_irqrestore(&s->dma_lock, flags);
  341. offset = bytes_to_frames(runtime,offset);
  342. if (offset >= runtime->buffer_size)
  343. offset = 0;
  344. return offset;
  345. }
  346. /*
  347. * this stops the dma and clears the dma ptrs
  348. */
  349. static void audio_stop_dma(struct audio_stream *s)
  350. {
  351. unsigned long flags;
  352. spin_lock_irqsave(&s->dma_lock, flags);
  353. s->active = 0;
  354. s->period = 0;
  355. /* this stops the dma channel and clears the buffer ptrs */
  356. #ifdef HH_VERSION
  357. sa1100_dma_flush_all(s->dmach);
  358. #else
  359. sa1100_clear_dma(s->dma_regs);
  360. #endif
  361. spin_unlock_irqrestore(&s->dma_lock, flags);
  362. }
  363. static void audio_process_dma(struct audio_stream *s)
  364. {
  365. struct snd_pcm_substream *substream = s->stream;
  366. struct snd_pcm_runtime *runtime;
  367. unsigned int dma_size;
  368. unsigned int offset;
  369. int ret;
  370. /* we are requested to process synchronization DMA transfer */
  371. if (s->tx_spin) {
  372. if (snd_BUG_ON(s->stream_id != SNDRV_PCM_STREAM_PLAYBACK))
  373. return;
  374. /* fill the xmit dma buffers and return */
  375. #ifdef HH_VERSION
  376. sa1100_dma_set_spin(s->dmach, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
  377. #else
  378. while (1) {
  379. ret = sa1100_start_dma(s->dma_regs, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
  380. if (ret)
  381. return;
  382. }
  383. #endif
  384. return;
  385. }
  386. /* must be set here - only valid for running streams, not for forced_clock dma fills */
  387. runtime = substream->runtime;
  388. while (s->active && s->periods < runtime->periods) {
  389. dma_size = frames_to_bytes(runtime, runtime->period_size);
  390. if (s->old_offset) {
  391. /* a little trick, we need resume from old position */
  392. offset = frames_to_bytes(runtime, s->old_offset - 1);
  393. s->old_offset = 0;
  394. s->periods = 0;
  395. s->period = offset / dma_size;
  396. offset %= dma_size;
  397. dma_size = dma_size - offset;
  398. if (!dma_size)
  399. continue; /* special case */
  400. } else {
  401. offset = dma_size * s->period;
  402. snd_BUG_ON(dma_size > DMA_BUF_SIZE);
  403. }
  404. #ifdef HH_VERSION
  405. ret = sa1100_dma_queue_buffer(s->dmach, s, runtime->dma_addr + offset, dma_size);
  406. if (ret)
  407. return; //FIXME
  408. #else
  409. ret = sa1100_start_dma((s)->dma_regs, runtime->dma_addr + offset, dma_size);
  410. if (ret) {
  411. printk(KERN_ERR "audio_process_dma: cannot queue DMA buffer (%i)\n", ret);
  412. return;
  413. }
  414. #endif
  415. s->period++;
  416. s->period %= runtime->periods;
  417. s->periods++;
  418. }
  419. }
  420. #ifdef HH_VERSION
  421. static void audio_dma_callback(void *data, int size)
  422. #else
  423. static void audio_dma_callback(void *data)
  424. #endif
  425. {
  426. struct audio_stream *s = data;
  427. /*
  428. * If we are getting a callback for an active stream then we inform
  429. * the PCM middle layer we've finished a period
  430. */
  431. if (s->active)
  432. snd_pcm_period_elapsed(s->stream);
  433. spin_lock(&s->dma_lock);
  434. if (!s->tx_spin && s->periods > 0)
  435. s->periods--;
  436. audio_process_dma(s);
  437. spin_unlock(&s->dma_lock);
  438. }
  439. /* }}} */
  440. /* {{{ PCM setting */
  441. /* {{{ trigger & timer */
  442. static int snd_sa11xx_uda1341_trigger(struct snd_pcm_substream *substream, int cmd)
  443. {
  444. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  445. int stream_id = substream->pstr->stream;
  446. struct audio_stream *s = &chip->s[stream_id];
  447. struct audio_stream *s1 = &chip->s[stream_id ^ 1];
  448. int err = 0;
  449. /* note local interrupts are already disabled in the midlevel code */
  450. spin_lock(&s->dma_lock);
  451. switch (cmd) {
  452. case SNDRV_PCM_TRIGGER_START:
  453. /* now we need to make sure a record only stream has a clock */
  454. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  455. /* we need to force fill the xmit DMA with zeros */
  456. s1->tx_spin = 1;
  457. audio_process_dma(s1);
  458. }
  459. /* this case is when you were recording then you turn on a
  460. * playback stream so we stop (also clears it) the dma first,
  461. * clear the sync flag and then we let it turned on
  462. */
  463. else {
  464. s->tx_spin = 0;
  465. }
  466. /* requested stream startup */
  467. s->active = 1;
  468. audio_process_dma(s);
  469. break;
  470. case SNDRV_PCM_TRIGGER_STOP:
  471. /* requested stream shutdown */
  472. audio_stop_dma(s);
  473. /*
  474. * now we need to make sure a record only stream has a clock
  475. * so if we're stopping a playback with an active capture
  476. * we need to turn the 0 fill dma on for the xmit side
  477. */
  478. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK && s1->active) {
  479. /* we need to force fill the xmit DMA with zeros */
  480. s->tx_spin = 1;
  481. audio_process_dma(s);
  482. }
  483. /*
  484. * we killed a capture only stream, so we should also kill
  485. * the zero fill transmit
  486. */
  487. else {
  488. if (s1->tx_spin) {
  489. s1->tx_spin = 0;
  490. audio_stop_dma(s1);
  491. }
  492. }
  493. break;
  494. case SNDRV_PCM_TRIGGER_SUSPEND:
  495. s->active = 0;
  496. #ifdef HH_VERSION
  497. sa1100_dma_stop(s->dmach);
  498. #else
  499. //FIXME - DMA API
  500. #endif
  501. s->old_offset = audio_get_dma_pos(s) + 1;
  502. #ifdef HH_VERSION
  503. sa1100_dma_flush_all(s->dmach);
  504. #else
  505. //FIXME - DMA API
  506. #endif
  507. s->periods = 0;
  508. break;
  509. case SNDRV_PCM_TRIGGER_RESUME:
  510. s->active = 1;
  511. s->tx_spin = 0;
  512. audio_process_dma(s);
  513. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  514. s1->tx_spin = 1;
  515. audio_process_dma(s1);
  516. }
  517. break;
  518. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  519. #ifdef HH_VERSION
  520. sa1100_dma_stop(s->dmach);
  521. #else
  522. //FIXME - DMA API
  523. #endif
  524. s->active = 0;
  525. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
  526. if (s1->active) {
  527. s->tx_spin = 1;
  528. s->old_offset = audio_get_dma_pos(s) + 1;
  529. #ifdef HH_VERSION
  530. sa1100_dma_flush_all(s->dmach);
  531. #else
  532. //FIXME - DMA API
  533. #endif
  534. audio_process_dma(s);
  535. }
  536. } else {
  537. if (s1->tx_spin) {
  538. s1->tx_spin = 0;
  539. #ifdef HH_VERSION
  540. sa1100_dma_flush_all(s1->dmach);
  541. #else
  542. //FIXME - DMA API
  543. #endif
  544. }
  545. }
  546. break;
  547. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  548. s->active = 1;
  549. if (s->old_offset) {
  550. s->tx_spin = 0;
  551. audio_process_dma(s);
  552. break;
  553. }
  554. if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
  555. s1->tx_spin = 1;
  556. audio_process_dma(s1);
  557. }
  558. #ifdef HH_VERSION
  559. sa1100_dma_resume(s->dmach);
  560. #else
  561. //FIXME - DMA API
  562. #endif
  563. break;
  564. default:
  565. err = -EINVAL;
  566. break;
  567. }
  568. spin_unlock(&s->dma_lock);
  569. return err;
  570. }
  571. static int snd_sa11xx_uda1341_prepare(struct snd_pcm_substream *substream)
  572. {
  573. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  574. struct snd_pcm_runtime *runtime = substream->runtime;
  575. struct audio_stream *s = &chip->s[substream->pstr->stream];
  576. /* set requested samplerate */
  577. sa11xx_uda1341_set_samplerate(chip, runtime->rate);
  578. /* set requestd format when available */
  579. /* set FMT here !!! FIXME */
  580. s->period = 0;
  581. s->periods = 0;
  582. return 0;
  583. }
  584. static snd_pcm_uframes_t snd_sa11xx_uda1341_pointer(struct snd_pcm_substream *substream)
  585. {
  586. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  587. return audio_get_dma_pos(&chip->s[substream->pstr->stream]);
  588. }
  589. /* }}} */
  590. static struct snd_pcm_hardware snd_sa11xx_uda1341_capture =
  591. {
  592. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  593. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  594. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  595. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  596. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  597. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  598. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
  599. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  600. SNDRV_PCM_RATE_KNOT),
  601. .rate_min = 8000,
  602. .rate_max = 48000,
  603. .channels_min = 2,
  604. .channels_max = 2,
  605. .buffer_bytes_max = 64*1024,
  606. .period_bytes_min = 64,
  607. .period_bytes_max = DMA_BUF_SIZE,
  608. .periods_min = 2,
  609. .periods_max = 255,
  610. .fifo_size = 0,
  611. };
  612. static struct snd_pcm_hardware snd_sa11xx_uda1341_playback =
  613. {
  614. .info = (SNDRV_PCM_INFO_INTERLEAVED |
  615. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  616. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  617. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  618. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  619. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  620. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
  621. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  622. SNDRV_PCM_RATE_KNOT),
  623. .rate_min = 8000,
  624. .rate_max = 48000,
  625. .channels_min = 2,
  626. .channels_max = 2,
  627. .buffer_bytes_max = 64*1024,
  628. .period_bytes_min = 64,
  629. .period_bytes_max = DMA_BUF_SIZE,
  630. .periods_min = 2,
  631. .periods_max = 255,
  632. .fifo_size = 0,
  633. };
  634. static int snd_card_sa11xx_uda1341_open(struct snd_pcm_substream *substream)
  635. {
  636. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  637. struct snd_pcm_runtime *runtime = substream->runtime;
  638. int stream_id = substream->pstr->stream;
  639. int err;
  640. chip->s[stream_id].stream = substream;
  641. if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
  642. runtime->hw = snd_sa11xx_uda1341_playback;
  643. else
  644. runtime->hw = snd_sa11xx_uda1341_capture;
  645. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  646. return err;
  647. if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
  648. return err;
  649. return 0;
  650. }
  651. static int snd_card_sa11xx_uda1341_close(struct snd_pcm_substream *substream)
  652. {
  653. struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
  654. chip->s[substream->pstr->stream].stream = NULL;
  655. return 0;
  656. }
  657. /* {{{ HW params & free */
  658. static int snd_sa11xx_uda1341_hw_params(struct snd_pcm_substream *substream,
  659. struct snd_pcm_hw_params *hw_params)
  660. {
  661. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  662. }
  663. static int snd_sa11xx_uda1341_hw_free(struct snd_pcm_substream *substream)
  664. {
  665. return snd_pcm_lib_free_pages(substream);
  666. }
  667. /* }}} */
  668. static struct snd_pcm_ops snd_card_sa11xx_uda1341_playback_ops = {
  669. .open = snd_card_sa11xx_uda1341_open,
  670. .close = snd_card_sa11xx_uda1341_close,
  671. .ioctl = snd_pcm_lib_ioctl,
  672. .hw_params = snd_sa11xx_uda1341_hw_params,
  673. .hw_free = snd_sa11xx_uda1341_hw_free,
  674. .prepare = snd_sa11xx_uda1341_prepare,
  675. .trigger = snd_sa11xx_uda1341_trigger,
  676. .pointer = snd_sa11xx_uda1341_pointer,
  677. };
  678. static struct snd_pcm_ops snd_card_sa11xx_uda1341_capture_ops = {
  679. .open = snd_card_sa11xx_uda1341_open,
  680. .close = snd_card_sa11xx_uda1341_close,
  681. .ioctl = snd_pcm_lib_ioctl,
  682. .hw_params = snd_sa11xx_uda1341_hw_params,
  683. .hw_free = snd_sa11xx_uda1341_hw_free,
  684. .prepare = snd_sa11xx_uda1341_prepare,
  685. .trigger = snd_sa11xx_uda1341_trigger,
  686. .pointer = snd_sa11xx_uda1341_pointer,
  687. };
  688. static int __init snd_card_sa11xx_uda1341_pcm(struct sa11xx_uda1341 *sa11xx_uda1341, int device)
  689. {
  690. struct snd_pcm *pcm;
  691. int err;
  692. if ((err = snd_pcm_new(sa11xx_uda1341->card, "UDA1341 PCM", device, 1, 1, &pcm)) < 0)
  693. return err;
  694. /*
  695. * this sets up our initial buffers and sets the dma_type to isa.
  696. * isa works but I'm not sure why (or if) it's the right choice
  697. * this may be too large, trying it for now
  698. */
  699. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  700. snd_dma_isa_data(),
  701. 64*1024, 64*1024);
  702. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_card_sa11xx_uda1341_playback_ops);
  703. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_sa11xx_uda1341_capture_ops);
  704. pcm->private_data = sa11xx_uda1341;
  705. pcm->info_flags = 0;
  706. strcpy(pcm->name, "UDA1341 PCM");
  707. sa11xx_uda1341_audio_init(sa11xx_uda1341);
  708. /* setup DMA controller */
  709. audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK], audio_dma_callback);
  710. audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE], audio_dma_callback);
  711. sa11xx_uda1341->pcm = pcm;
  712. return 0;
  713. }
  714. /* }}} */
  715. /* {{{ module init & exit */
  716. #ifdef CONFIG_PM
  717. static int snd_sa11xx_uda1341_suspend(struct platform_device *devptr,
  718. pm_message_t state)
  719. {
  720. struct snd_card *card = platform_get_drvdata(devptr);
  721. struct sa11xx_uda1341 *chip = card->private_data;
  722. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  723. snd_pcm_suspend_all(chip->pcm);
  724. #ifdef HH_VERSION
  725. sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
  726. sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
  727. #else
  728. //FIXME
  729. #endif
  730. l3_command(chip->uda1341, CMD_SUSPEND, NULL);
  731. sa11xx_uda1341_audio_shutdown(chip);
  732. return 0;
  733. }
  734. static int snd_sa11xx_uda1341_resume(struct platform_device *devptr)
  735. {
  736. struct snd_card *card = platform_get_drvdata(devptr);
  737. struct sa11xx_uda1341 *chip = card->private_data;
  738. sa11xx_uda1341_audio_init(chip);
  739. l3_command(chip->uda1341, CMD_RESUME, NULL);
  740. #ifdef HH_VERSION
  741. sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
  742. sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
  743. #else
  744. //FIXME
  745. #endif
  746. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  747. return 0;
  748. }
  749. #endif /* COMFIG_PM */
  750. void snd_sa11xx_uda1341_free(struct snd_card *card)
  751. {
  752. struct sa11xx_uda1341 *chip = card->private_data;
  753. audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]);
  754. audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]);
  755. }
  756. static int __devinit sa11xx_uda1341_probe(struct platform_device *devptr)
  757. {
  758. int err;
  759. struct snd_card *card;
  760. struct sa11xx_uda1341 *chip;
  761. /* register the soundcard */
  762. card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct sa11xx_uda1341));
  763. if (card == NULL)
  764. return -ENOMEM;
  765. chip = card->private_data;
  766. spin_lock_init(&chip->s[0].dma_lock);
  767. spin_lock_init(&chip->s[1].dma_lock);
  768. card->private_free = snd_sa11xx_uda1341_free;
  769. chip->card = card;
  770. chip->samplerate = AUDIO_RATE_DEFAULT;
  771. // mixer
  772. if ((err = snd_chip_uda1341_mixer_new(card, &chip->uda1341)))
  773. goto nodev;
  774. // PCM
  775. if ((err = snd_card_sa11xx_uda1341_pcm(chip, 0)) < 0)
  776. goto nodev;
  777. strcpy(card->driver, "UDA1341");
  778. strcpy(card->shortname, "H3600 UDA1341TS");
  779. sprintf(card->longname, "Compaq iPAQ H3600 with Philips UDA1341TS");
  780. snd_card_set_dev(card, &devptr->dev);
  781. if ((err = snd_card_register(card)) == 0) {
  782. printk( KERN_INFO "iPAQ audio support initialized\n" );
  783. platform_set_drvdata(devptr, card);
  784. return 0;
  785. }
  786. nodev:
  787. snd_card_free(card);
  788. return err;
  789. }
  790. static int __devexit sa11xx_uda1341_remove(struct platform_device *devptr)
  791. {
  792. snd_card_free(platform_get_drvdata(devptr));
  793. platform_set_drvdata(devptr, NULL);
  794. return 0;
  795. }
  796. #define SA11XX_UDA1341_DRIVER "sa11xx_uda1341"
  797. static struct platform_driver sa11xx_uda1341_driver = {
  798. .probe = sa11xx_uda1341_probe,
  799. .remove = __devexit_p(sa11xx_uda1341_remove),
  800. #ifdef CONFIG_PM
  801. .suspend = snd_sa11xx_uda1341_suspend,
  802. .resume = snd_sa11xx_uda1341_resume,
  803. #endif
  804. .driver = {
  805. .name = SA11XX_UDA1341_DRIVER,
  806. },
  807. };
  808. static int __init sa11xx_uda1341_init(void)
  809. {
  810. int err;
  811. if (!machine_is_h3xxx())
  812. return -ENODEV;
  813. if ((err = platform_driver_register(&sa11xx_uda1341_driver)) < 0)
  814. return err;
  815. device = platform_device_register_simple(SA11XX_UDA1341_DRIVER, -1, NULL, 0);
  816. if (!IS_ERR(device)) {
  817. if (platform_get_drvdata(device))
  818. return 0;
  819. platform_device_unregister(device);
  820. err = -ENODEV;
  821. } else
  822. err = PTR_ERR(device);
  823. platform_driver_unregister(&sa11xx_uda1341_driver);
  824. return err;
  825. }
  826. static void __exit sa11xx_uda1341_exit(void)
  827. {
  828. platform_device_unregister(device);
  829. platform_driver_unregister(&sa11xx_uda1341_driver);
  830. }
  831. module_init(sa11xx_uda1341_init);
  832. module_exit(sa11xx_uda1341_exit);
  833. /* }}} */
  834. /*
  835. * Local variables:
  836. * indent-tabs-mode: t
  837. * End:
  838. */