drm.h 21 KB

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  1. /**
  2. * \file drm.h
  3. * Header for the Direct Rendering Manager
  4. *
  5. * \author Rickard E. (Rik) Faith <faith@valinux.com>
  6. *
  7. * \par Acknowledgments:
  8. * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
  9. */
  10. /*
  11. * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  12. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  13. * All rights reserved.
  14. *
  15. * Permission is hereby granted, free of charge, to any person obtaining a
  16. * copy of this software and associated documentation files (the "Software"),
  17. * to deal in the Software without restriction, including without limitation
  18. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  19. * and/or sell copies of the Software, and to permit persons to whom the
  20. * Software is furnished to do so, subject to the following conditions:
  21. *
  22. * The above copyright notice and this permission notice (including the next
  23. * paragraph) shall be included in all copies or substantial portions of the
  24. * Software.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  27. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  28. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  29. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  30. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  31. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  32. * OTHER DEALINGS IN THE SOFTWARE.
  33. */
  34. #ifndef _DRM_H_
  35. #define _DRM_H_
  36. #if defined(__linux__)
  37. #if defined(__KERNEL__)
  38. #endif
  39. #include <asm/ioctl.h> /* For _IO* macros */
  40. #define DRM_IOCTL_NR(n) _IOC_NR(n)
  41. #define DRM_IOC_VOID _IOC_NONE
  42. #define DRM_IOC_READ _IOC_READ
  43. #define DRM_IOC_WRITE _IOC_WRITE
  44. #define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
  45. #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  46. #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
  47. #if defined(__FreeBSD__) && defined(IN_MODULE)
  48. /* Prevent name collision when including sys/ioccom.h */
  49. #undef ioctl
  50. #include <sys/ioccom.h>
  51. #define ioctl(a,b,c) xf86ioctl(a,b,c)
  52. #else
  53. #include <sys/ioccom.h>
  54. #endif /* __FreeBSD__ && xf86ioctl */
  55. #define DRM_IOCTL_NR(n) ((n) & 0xff)
  56. #define DRM_IOC_VOID IOC_VOID
  57. #define DRM_IOC_READ IOC_OUT
  58. #define DRM_IOC_WRITE IOC_IN
  59. #define DRM_IOC_READWRITE IOC_INOUT
  60. #define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  61. #endif
  62. #define DRM_MAJOR 226
  63. #define DRM_MAX_MINOR 15
  64. #define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
  65. #define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
  66. #define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
  67. #define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
  68. #define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
  69. #define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
  70. #define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
  71. #define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
  72. #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  73. typedef unsigned int drm_handle_t;
  74. typedef unsigned int drm_context_t;
  75. typedef unsigned int drm_drawable_t;
  76. typedef unsigned int drm_magic_t;
  77. /**
  78. * Cliprect.
  79. *
  80. * \warning: If you change this structure, make sure you change
  81. * XF86DRIClipRectRec in the server as well
  82. *
  83. * \note KW: Actually it's illegal to change either for
  84. * backwards-compatibility reasons.
  85. */
  86. struct drm_clip_rect {
  87. unsigned short x1;
  88. unsigned short y1;
  89. unsigned short x2;
  90. unsigned short y2;
  91. };
  92. /**
  93. * Drawable information.
  94. */
  95. struct drm_drawable_info {
  96. unsigned int num_rects;
  97. struct drm_clip_rect *rects;
  98. };
  99. /**
  100. * Texture region,
  101. */
  102. struct drm_tex_region {
  103. unsigned char next;
  104. unsigned char prev;
  105. unsigned char in_use;
  106. unsigned char padding;
  107. unsigned int age;
  108. };
  109. /**
  110. * Hardware lock.
  111. *
  112. * The lock structure is a simple cache-line aligned integer. To avoid
  113. * processor bus contention on a multiprocessor system, there should not be any
  114. * other data stored in the same cache line.
  115. */
  116. struct drm_hw_lock {
  117. __volatile__ unsigned int lock; /**< lock variable */
  118. char padding[60]; /**< Pad to cache line */
  119. };
  120. /**
  121. * DRM_IOCTL_VERSION ioctl argument type.
  122. *
  123. * \sa drmGetVersion().
  124. */
  125. struct drm_version {
  126. int version_major; /**< Major version */
  127. int version_minor; /**< Minor version */
  128. int version_patchlevel; /**< Patch level */
  129. size_t name_len; /**< Length of name buffer */
  130. char __user *name; /**< Name of driver */
  131. size_t date_len; /**< Length of date buffer */
  132. char __user *date; /**< User-space buffer to hold date */
  133. size_t desc_len; /**< Length of desc buffer */
  134. char __user *desc; /**< User-space buffer to hold desc */
  135. };
  136. /**
  137. * DRM_IOCTL_GET_UNIQUE ioctl argument type.
  138. *
  139. * \sa drmGetBusid() and drmSetBusId().
  140. */
  141. struct drm_unique {
  142. size_t unique_len; /**< Length of unique */
  143. char __user *unique; /**< Unique name for driver instantiation */
  144. };
  145. struct drm_list {
  146. int count; /**< Length of user-space structures */
  147. struct drm_version __user *version;
  148. };
  149. struct drm_block {
  150. int unused;
  151. };
  152. /**
  153. * DRM_IOCTL_CONTROL ioctl argument type.
  154. *
  155. * \sa drmCtlInstHandler() and drmCtlUninstHandler().
  156. */
  157. struct drm_control {
  158. enum {
  159. DRM_ADD_COMMAND,
  160. DRM_RM_COMMAND,
  161. DRM_INST_HANDLER,
  162. DRM_UNINST_HANDLER
  163. } func;
  164. int irq;
  165. };
  166. /**
  167. * Type of memory to map.
  168. */
  169. enum drm_map_type {
  170. _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
  171. _DRM_REGISTERS = 1, /**< no caching, no core dump */
  172. _DRM_SHM = 2, /**< shared, cached */
  173. _DRM_AGP = 3, /**< AGP/GART */
  174. _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
  175. _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */
  176. };
  177. /**
  178. * Memory mapping flags.
  179. */
  180. enum drm_map_flags {
  181. _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
  182. _DRM_READ_ONLY = 0x02,
  183. _DRM_LOCKED = 0x04, /**< shared, cached, locked */
  184. _DRM_KERNEL = 0x08, /**< kernel requires access */
  185. _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
  186. _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
  187. _DRM_REMOVABLE = 0x40, /**< Removable mapping */
  188. _DRM_DRIVER = 0x80 /**< Managed by driver */
  189. };
  190. struct drm_ctx_priv_map {
  191. unsigned int ctx_id; /**< Context requesting private mapping */
  192. void *handle; /**< Handle of map */
  193. };
  194. /**
  195. * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
  196. * argument type.
  197. *
  198. * \sa drmAddMap().
  199. */
  200. struct drm_map {
  201. unsigned long offset; /**< Requested physical address (0 for SAREA)*/
  202. unsigned long size; /**< Requested physical size (bytes) */
  203. enum drm_map_type type; /**< Type of memory to map */
  204. enum drm_map_flags flags; /**< Flags */
  205. void *handle; /**< User-space: "Handle" to pass to mmap() */
  206. /**< Kernel-space: kernel-virtual address */
  207. int mtrr; /**< MTRR slot used */
  208. /* Private data */
  209. };
  210. /**
  211. * DRM_IOCTL_GET_CLIENT ioctl argument type.
  212. */
  213. struct drm_client {
  214. int idx; /**< Which client desired? */
  215. int auth; /**< Is client authenticated? */
  216. unsigned long pid; /**< Process ID */
  217. unsigned long uid; /**< User ID */
  218. unsigned long magic; /**< Magic */
  219. unsigned long iocs; /**< Ioctl count */
  220. };
  221. enum drm_stat_type {
  222. _DRM_STAT_LOCK,
  223. _DRM_STAT_OPENS,
  224. _DRM_STAT_CLOSES,
  225. _DRM_STAT_IOCTLS,
  226. _DRM_STAT_LOCKS,
  227. _DRM_STAT_UNLOCKS,
  228. _DRM_STAT_VALUE, /**< Generic value */
  229. _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
  230. _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
  231. _DRM_STAT_IRQ, /**< IRQ */
  232. _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
  233. _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
  234. _DRM_STAT_DMA, /**< DMA */
  235. _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
  236. _DRM_STAT_MISSED /**< Missed DMA opportunity */
  237. /* Add to the *END* of the list */
  238. };
  239. /**
  240. * DRM_IOCTL_GET_STATS ioctl argument type.
  241. */
  242. struct drm_stats {
  243. unsigned long count;
  244. struct {
  245. unsigned long value;
  246. enum drm_stat_type type;
  247. } data[15];
  248. };
  249. /**
  250. * Hardware locking flags.
  251. */
  252. enum drm_lock_flags {
  253. _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
  254. _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
  255. _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
  256. _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
  257. /* These *HALT* flags aren't supported yet
  258. -- they will be used to support the
  259. full-screen DGA-like mode. */
  260. _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
  261. _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
  262. };
  263. /**
  264. * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
  265. *
  266. * \sa drmGetLock() and drmUnlock().
  267. */
  268. struct drm_lock {
  269. int context;
  270. enum drm_lock_flags flags;
  271. };
  272. /**
  273. * DMA flags
  274. *
  275. * \warning
  276. * These values \e must match xf86drm.h.
  277. *
  278. * \sa drm_dma.
  279. */
  280. enum drm_dma_flags {
  281. /* Flags for DMA buffer dispatch */
  282. _DRM_DMA_BLOCK = 0x01, /**<
  283. * Block until buffer dispatched.
  284. *
  285. * \note The buffer may not yet have
  286. * been processed by the hardware --
  287. * getting a hardware lock with the
  288. * hardware quiescent will ensure
  289. * that the buffer has been
  290. * processed.
  291. */
  292. _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
  293. _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
  294. /* Flags for DMA buffer request */
  295. _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
  296. _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
  297. _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
  298. };
  299. /**
  300. * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
  301. *
  302. * \sa drmAddBufs().
  303. */
  304. struct drm_buf_desc {
  305. int count; /**< Number of buffers of this size */
  306. int size; /**< Size in bytes */
  307. int low_mark; /**< Low water mark */
  308. int high_mark; /**< High water mark */
  309. enum {
  310. _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
  311. _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
  312. _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
  313. _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
  314. _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
  315. } flags;
  316. unsigned long agp_start; /**<
  317. * Start address of where the AGP buffers are
  318. * in the AGP aperture
  319. */
  320. };
  321. /**
  322. * DRM_IOCTL_INFO_BUFS ioctl argument type.
  323. */
  324. struct drm_buf_info {
  325. int count; /**< Entries in list */
  326. struct drm_buf_desc __user *list;
  327. };
  328. /**
  329. * DRM_IOCTL_FREE_BUFS ioctl argument type.
  330. */
  331. struct drm_buf_free {
  332. int count;
  333. int __user *list;
  334. };
  335. /**
  336. * Buffer information
  337. *
  338. * \sa drm_buf_map.
  339. */
  340. struct drm_buf_pub {
  341. int idx; /**< Index into the master buffer list */
  342. int total; /**< Buffer size */
  343. int used; /**< Amount of buffer in use (for DMA) */
  344. void __user *address; /**< Address of buffer */
  345. };
  346. /**
  347. * DRM_IOCTL_MAP_BUFS ioctl argument type.
  348. */
  349. struct drm_buf_map {
  350. int count; /**< Length of the buffer list */
  351. void __user *virtual; /**< Mmap'd area in user-virtual */
  352. struct drm_buf_pub __user *list; /**< Buffer information */
  353. };
  354. /**
  355. * DRM_IOCTL_DMA ioctl argument type.
  356. *
  357. * Indices here refer to the offset into the buffer list in drm_buf_get.
  358. *
  359. * \sa drmDMA().
  360. */
  361. struct drm_dma {
  362. int context; /**< Context handle */
  363. int send_count; /**< Number of buffers to send */
  364. int __user *send_indices; /**< List of handles to buffers */
  365. int __user *send_sizes; /**< Lengths of data to send */
  366. enum drm_dma_flags flags; /**< Flags */
  367. int request_count; /**< Number of buffers requested */
  368. int request_size; /**< Desired size for buffers */
  369. int __user *request_indices; /**< Buffer information */
  370. int __user *request_sizes;
  371. int granted_count; /**< Number of buffers granted */
  372. };
  373. enum drm_ctx_flags {
  374. _DRM_CONTEXT_PRESERVED = 0x01,
  375. _DRM_CONTEXT_2DONLY = 0x02
  376. };
  377. /**
  378. * DRM_IOCTL_ADD_CTX ioctl argument type.
  379. *
  380. * \sa drmCreateContext() and drmDestroyContext().
  381. */
  382. struct drm_ctx {
  383. drm_context_t handle;
  384. enum drm_ctx_flags flags;
  385. };
  386. /**
  387. * DRM_IOCTL_RES_CTX ioctl argument type.
  388. */
  389. struct drm_ctx_res {
  390. int count;
  391. struct drm_ctx __user *contexts;
  392. };
  393. /**
  394. * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
  395. */
  396. struct drm_draw {
  397. drm_drawable_t handle;
  398. };
  399. /**
  400. * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
  401. */
  402. typedef enum {
  403. DRM_DRAWABLE_CLIPRECTS,
  404. } drm_drawable_info_type_t;
  405. struct drm_update_draw {
  406. drm_drawable_t handle;
  407. unsigned int type;
  408. unsigned int num;
  409. unsigned long long data;
  410. };
  411. /**
  412. * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
  413. */
  414. struct drm_auth {
  415. drm_magic_t magic;
  416. };
  417. /**
  418. * DRM_IOCTL_IRQ_BUSID ioctl argument type.
  419. *
  420. * \sa drmGetInterruptFromBusID().
  421. */
  422. struct drm_irq_busid {
  423. int irq; /**< IRQ number */
  424. int busnum; /**< bus number */
  425. int devnum; /**< device number */
  426. int funcnum; /**< function number */
  427. };
  428. enum drm_vblank_seq_type {
  429. _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
  430. _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
  431. _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
  432. _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
  433. _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
  434. };
  435. #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
  436. #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
  437. _DRM_VBLANK_NEXTONMISS)
  438. struct drm_wait_vblank_request {
  439. enum drm_vblank_seq_type type;
  440. unsigned int sequence;
  441. unsigned long signal;
  442. };
  443. struct drm_wait_vblank_reply {
  444. enum drm_vblank_seq_type type;
  445. unsigned int sequence;
  446. long tval_sec;
  447. long tval_usec;
  448. };
  449. /**
  450. * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
  451. *
  452. * \sa drmWaitVBlank().
  453. */
  454. union drm_wait_vblank {
  455. struct drm_wait_vblank_request request;
  456. struct drm_wait_vblank_reply reply;
  457. };
  458. /**
  459. * DRM_IOCTL_AGP_ENABLE ioctl argument type.
  460. *
  461. * \sa drmAgpEnable().
  462. */
  463. struct drm_agp_mode {
  464. unsigned long mode; /**< AGP mode */
  465. };
  466. /**
  467. * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
  468. *
  469. * \sa drmAgpAlloc() and drmAgpFree().
  470. */
  471. struct drm_agp_buffer {
  472. unsigned long size; /**< In bytes -- will round to page boundary */
  473. unsigned long handle; /**< Used for binding / unbinding */
  474. unsigned long type; /**< Type of memory to allocate */
  475. unsigned long physical; /**< Physical used by i810 */
  476. };
  477. /**
  478. * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
  479. *
  480. * \sa drmAgpBind() and drmAgpUnbind().
  481. */
  482. struct drm_agp_binding {
  483. unsigned long handle; /**< From drm_agp_buffer */
  484. unsigned long offset; /**< In bytes -- will round to page boundary */
  485. };
  486. /**
  487. * DRM_IOCTL_AGP_INFO ioctl argument type.
  488. *
  489. * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
  490. * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
  491. * drmAgpVendorId() and drmAgpDeviceId().
  492. */
  493. struct drm_agp_info {
  494. int agp_version_major;
  495. int agp_version_minor;
  496. unsigned long mode;
  497. unsigned long aperture_base; /* physical address */
  498. unsigned long aperture_size; /* bytes */
  499. unsigned long memory_allowed; /* bytes */
  500. unsigned long memory_used;
  501. /* PCI information */
  502. unsigned short id_vendor;
  503. unsigned short id_device;
  504. };
  505. /**
  506. * DRM_IOCTL_SG_ALLOC ioctl argument type.
  507. */
  508. struct drm_scatter_gather {
  509. unsigned long size; /**< In bytes -- will round to page boundary */
  510. unsigned long handle; /**< Used for mapping / unmapping */
  511. };
  512. /**
  513. * DRM_IOCTL_SET_VERSION ioctl argument type.
  514. */
  515. struct drm_set_version {
  516. int drm_di_major;
  517. int drm_di_minor;
  518. int drm_dd_major;
  519. int drm_dd_minor;
  520. };
  521. #define DRM_IOCTL_BASE 'd'
  522. #define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
  523. #define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
  524. #define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
  525. #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
  526. #define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
  527. #define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
  528. #define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
  529. #define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
  530. #define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
  531. #define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
  532. #define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
  533. #define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
  534. #define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
  535. #define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
  536. #define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
  537. #define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
  538. #define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
  539. #define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
  540. #define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
  541. #define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
  542. #define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
  543. #define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
  544. #define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
  545. #define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
  546. #define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
  547. #define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
  548. #define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
  549. #define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
  550. #define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
  551. #define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
  552. #define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
  553. #define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
  554. #define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
  555. #define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
  556. #define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
  557. #define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
  558. #define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
  559. #define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
  560. #define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
  561. #define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
  562. #define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
  563. #define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
  564. #define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
  565. #define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
  566. #define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
  567. #define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
  568. #define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
  569. #define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
  570. #define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
  571. #define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
  572. #define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
  573. /**
  574. * Device specific ioctls should only be in their respective headers
  575. * The device specific ioctl range is from 0x40 to 0x99.
  576. * Generic IOCTLS restart at 0xA0.
  577. *
  578. * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
  579. * drmCommandReadWrite().
  580. */
  581. #define DRM_COMMAND_BASE 0x40
  582. #define DRM_COMMAND_END 0xA0
  583. /* typedef area */
  584. #ifndef __KERNEL__
  585. typedef struct drm_clip_rect drm_clip_rect_t;
  586. typedef struct drm_drawable_info drm_drawable_info_t;
  587. typedef struct drm_tex_region drm_tex_region_t;
  588. typedef struct drm_hw_lock drm_hw_lock_t;
  589. typedef struct drm_version drm_version_t;
  590. typedef struct drm_unique drm_unique_t;
  591. typedef struct drm_list drm_list_t;
  592. typedef struct drm_block drm_block_t;
  593. typedef struct drm_control drm_control_t;
  594. typedef enum drm_map_type drm_map_type_t;
  595. typedef enum drm_map_flags drm_map_flags_t;
  596. typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
  597. typedef struct drm_map drm_map_t;
  598. typedef struct drm_client drm_client_t;
  599. typedef enum drm_stat_type drm_stat_type_t;
  600. typedef struct drm_stats drm_stats_t;
  601. typedef enum drm_lock_flags drm_lock_flags_t;
  602. typedef struct drm_lock drm_lock_t;
  603. typedef enum drm_dma_flags drm_dma_flags_t;
  604. typedef struct drm_buf_desc drm_buf_desc_t;
  605. typedef struct drm_buf_info drm_buf_info_t;
  606. typedef struct drm_buf_free drm_buf_free_t;
  607. typedef struct drm_buf_pub drm_buf_pub_t;
  608. typedef struct drm_buf_map drm_buf_map_t;
  609. typedef struct drm_dma drm_dma_t;
  610. typedef union drm_wait_vblank drm_wait_vblank_t;
  611. typedef struct drm_agp_mode drm_agp_mode_t;
  612. typedef enum drm_ctx_flags drm_ctx_flags_t;
  613. typedef struct drm_ctx drm_ctx_t;
  614. typedef struct drm_ctx_res drm_ctx_res_t;
  615. typedef struct drm_draw drm_draw_t;
  616. typedef struct drm_update_draw drm_update_draw_t;
  617. typedef struct drm_auth drm_auth_t;
  618. typedef struct drm_irq_busid drm_irq_busid_t;
  619. typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
  620. typedef struct drm_agp_buffer drm_agp_buffer_t;
  621. typedef struct drm_agp_binding drm_agp_binding_t;
  622. typedef struct drm_agp_info drm_agp_info_t;
  623. typedef struct drm_scatter_gather drm_scatter_gather_t;
  624. typedef struct drm_set_version drm_set_version_t;
  625. #endif
  626. #endif