mmu_context_64.h 1.3 KB

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  1. #ifndef ASM_X86__MMU_CONTEXT_64_H
  2. #define ASM_X86__MMU_CONTEXT_64_H
  3. #include <asm/pda.h>
  4. static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  5. {
  6. #ifdef CONFIG_SMP
  7. if (read_pda(mmu_state) == TLBSTATE_OK)
  8. write_pda(mmu_state, TLBSTATE_LAZY);
  9. #endif
  10. }
  11. static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  12. struct task_struct *tsk)
  13. {
  14. unsigned cpu = smp_processor_id();
  15. if (likely(prev != next)) {
  16. /* stop flush ipis for the previous mm */
  17. cpu_clear(cpu, prev->cpu_vm_mask);
  18. #ifdef CONFIG_SMP
  19. write_pda(mmu_state, TLBSTATE_OK);
  20. write_pda(active_mm, next);
  21. #endif
  22. cpu_set(cpu, next->cpu_vm_mask);
  23. load_cr3(next->pgd);
  24. if (unlikely(next->context.ldt != prev->context.ldt))
  25. load_LDT_nolock(&next->context);
  26. }
  27. #ifdef CONFIG_SMP
  28. else {
  29. write_pda(mmu_state, TLBSTATE_OK);
  30. if (read_pda(active_mm) != next)
  31. BUG();
  32. if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
  33. /* We were in lazy tlb mode and leave_mm disabled
  34. * tlb flush IPI delivery. We must reload CR3
  35. * to make sure to use no freed page tables.
  36. */
  37. load_cr3(next->pgd);
  38. load_LDT_nolock(&next->context);
  39. }
  40. }
  41. #endif
  42. }
  43. #define deactivate_mm(tsk, mm) \
  44. do { \
  45. load_gs_index(0); \
  46. asm volatile("movl %0,%%fs"::"r"(0)); \
  47. } while (0)
  48. #endif /* ASM_X86__MMU_CONTEXT_64_H */