dma-mapping.h 4.8 KB

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  1. #ifndef _ASM_DMA_MAPPING_H
  2. #define _ASM_DMA_MAPPING_H
  3. #include <linux/device.h>
  4. #include <asm/cache.h>
  5. #include <asm/cacheflush.h>
  6. #include <asm/scatterlist.h>
  7. #include <asm/io.h>
  8. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  9. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  10. extern unsigned long __nongprelbss dma_coherent_mem_start;
  11. extern unsigned long __nongprelbss dma_coherent_mem_end;
  12. void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
  13. void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
  14. /*
  15. * Map a single buffer of the indicated size for DMA in streaming mode.
  16. * The 32-bit bus address to use is returned.
  17. *
  18. * Once the device is given the dma address, the device owns this memory
  19. * until either pci_unmap_single or pci_dma_sync_single is performed.
  20. */
  21. extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
  22. enum dma_data_direction direction);
  23. /*
  24. * Unmap a single streaming mode DMA translation. The dma_addr and size
  25. * must match what was provided for in a previous pci_map_single call. All
  26. * other usages are undefined.
  27. *
  28. * After this call, reads by the cpu to the buffer are guarenteed to see
  29. * whatever the device wrote there.
  30. */
  31. static inline
  32. void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  33. enum dma_data_direction direction)
  34. {
  35. BUG_ON(direction == DMA_NONE);
  36. }
  37. /*
  38. * Map a set of buffers described by scatterlist in streaming
  39. * mode for DMA. This is the scather-gather version of the
  40. * above pci_map_single interface. Here the scatter gather list
  41. * elements are each tagged with the appropriate dma address
  42. * and length. They are obtained via sg_dma_{address,length}(SG).
  43. *
  44. * NOTE: An implementation may be able to use a smaller number of
  45. * DMA address/length pairs than there are SG table elements.
  46. * (for example via virtual mapping capabilities)
  47. * The routine returns the number of addr/length pairs actually
  48. * used, at most nents.
  49. *
  50. * Device ownership issues as mentioned above for pci_map_single are
  51. * the same here.
  52. */
  53. extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  54. enum dma_data_direction direction);
  55. /*
  56. * Unmap a set of streaming mode DMA translations.
  57. * Again, cpu read rules concerning calls here are the same as for
  58. * pci_unmap_single() above.
  59. */
  60. static inline
  61. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  62. enum dma_data_direction direction)
  63. {
  64. BUG_ON(direction == DMA_NONE);
  65. }
  66. extern
  67. dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
  68. size_t size, enum dma_data_direction direction);
  69. static inline
  70. void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  71. enum dma_data_direction direction)
  72. {
  73. BUG_ON(direction == DMA_NONE);
  74. }
  75. static inline
  76. void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
  77. enum dma_data_direction direction)
  78. {
  79. }
  80. static inline
  81. void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
  82. enum dma_data_direction direction)
  83. {
  84. flush_write_buffers();
  85. }
  86. static inline
  87. void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  88. unsigned long offset, size_t size,
  89. enum dma_data_direction direction)
  90. {
  91. }
  92. static inline
  93. void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  94. unsigned long offset, size_t size,
  95. enum dma_data_direction direction)
  96. {
  97. flush_write_buffers();
  98. }
  99. static inline
  100. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  101. enum dma_data_direction direction)
  102. {
  103. }
  104. static inline
  105. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  106. enum dma_data_direction direction)
  107. {
  108. flush_write_buffers();
  109. }
  110. static inline
  111. int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  112. {
  113. return 0;
  114. }
  115. static inline
  116. int dma_supported(struct device *dev, u64 mask)
  117. {
  118. /*
  119. * we fall back to GFP_DMA when the mask isn't all 1s,
  120. * so we can't guarantee allocations that must be
  121. * within a tighter range than GFP_DMA..
  122. */
  123. if (mask < 0x00ffffff)
  124. return 0;
  125. return 1;
  126. }
  127. static inline
  128. int dma_set_mask(struct device *dev, u64 mask)
  129. {
  130. if (!dev->dma_mask || !dma_supported(dev, mask))
  131. return -EIO;
  132. *dev->dma_mask = mask;
  133. return 0;
  134. }
  135. static inline
  136. int dma_get_cache_alignment(void)
  137. {
  138. return 1 << L1_CACHE_SHIFT;
  139. }
  140. #define dma_is_consistent(d, h) (1)
  141. static inline
  142. void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  143. enum dma_data_direction direction)
  144. {
  145. flush_write_buffers();
  146. }
  147. #endif /* _ASM_DMA_MAPPING_H */