events.c 19 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <asm/ptrace.h>
  29. #include <asm/irq.h>
  30. #include <asm/sync_bitops.h>
  31. #include <asm/xen/hypercall.h>
  32. #include <asm/xen/hypervisor.h>
  33. #include <xen/xen-ops.h>
  34. #include <xen/events.h>
  35. #include <xen/interface/xen.h>
  36. #include <xen/interface/event_channel.h>
  37. /*
  38. * This lock protects updates to the following mapping and reference-count
  39. * arrays. The lock does not need to be acquired to read the mapping tables.
  40. */
  41. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  42. /* IRQ <-> VIRQ mapping. */
  43. static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
  44. /* IRQ <-> IPI mapping */
  45. static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
  46. /* Packed IRQ information: binding type, sub-type index, and event channel. */
  47. struct packed_irq
  48. {
  49. unsigned short evtchn;
  50. unsigned char index;
  51. unsigned char type;
  52. };
  53. static struct packed_irq irq_info[NR_IRQS];
  54. /* Binding types. */
  55. enum {
  56. IRQT_UNBOUND,
  57. IRQT_PIRQ,
  58. IRQT_VIRQ,
  59. IRQT_IPI,
  60. IRQT_EVTCHN
  61. };
  62. /* Convenient shorthand for packed representation of an unbound IRQ. */
  63. #define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
  64. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  65. [0 ... NR_EVENT_CHANNELS-1] = -1
  66. };
  67. static unsigned long cpu_evtchn_mask[NR_CPUS][NR_EVENT_CHANNELS/BITS_PER_LONG];
  68. static u8 cpu_evtchn[NR_EVENT_CHANNELS];
  69. /* Reference counts for bindings to IRQs. */
  70. static int irq_bindcount[NR_IRQS];
  71. /* Xen will never allocate port zero for any purpose. */
  72. #define VALID_EVTCHN(chn) ((chn) != 0)
  73. /*
  74. * Force a proper event-channel callback from Xen after clearing the
  75. * callback mask. We do this in a very simple manner, by making a call
  76. * down into Xen. The pending flag will be checked by Xen on return.
  77. */
  78. void force_evtchn_callback(void)
  79. {
  80. (void)HYPERVISOR_xen_version(0, NULL);
  81. }
  82. EXPORT_SYMBOL_GPL(force_evtchn_callback);
  83. static struct irq_chip xen_dynamic_chip;
  84. /* Constructor for packed IRQ information. */
  85. static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
  86. {
  87. return (struct packed_irq) { evtchn, index, type };
  88. }
  89. /*
  90. * Accessors for packed IRQ information.
  91. */
  92. static inline unsigned int evtchn_from_irq(int irq)
  93. {
  94. return irq_info[irq].evtchn;
  95. }
  96. static inline unsigned int index_from_irq(int irq)
  97. {
  98. return irq_info[irq].index;
  99. }
  100. static inline unsigned int type_from_irq(int irq)
  101. {
  102. return irq_info[irq].type;
  103. }
  104. static inline unsigned long active_evtchns(unsigned int cpu,
  105. struct shared_info *sh,
  106. unsigned int idx)
  107. {
  108. return (sh->evtchn_pending[idx] &
  109. cpu_evtchn_mask[cpu][idx] &
  110. ~sh->evtchn_mask[idx]);
  111. }
  112. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  113. {
  114. int irq = evtchn_to_irq[chn];
  115. BUG_ON(irq == -1);
  116. #ifdef CONFIG_SMP
  117. irq_desc[irq].affinity = cpumask_of_cpu(cpu);
  118. #endif
  119. __clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]);
  120. __set_bit(chn, cpu_evtchn_mask[cpu]);
  121. cpu_evtchn[chn] = cpu;
  122. }
  123. static void init_evtchn_cpu_bindings(void)
  124. {
  125. #ifdef CONFIG_SMP
  126. int i;
  127. /* By default all event channels notify CPU#0. */
  128. for (i = 0; i < NR_IRQS; i++)
  129. irq_desc[i].affinity = cpumask_of_cpu(0);
  130. #endif
  131. memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
  132. memset(cpu_evtchn_mask[0], ~0, sizeof(cpu_evtchn_mask[0]));
  133. }
  134. static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
  135. {
  136. return cpu_evtchn[evtchn];
  137. }
  138. static inline void clear_evtchn(int port)
  139. {
  140. struct shared_info *s = HYPERVISOR_shared_info;
  141. sync_clear_bit(port, &s->evtchn_pending[0]);
  142. }
  143. static inline void set_evtchn(int port)
  144. {
  145. struct shared_info *s = HYPERVISOR_shared_info;
  146. sync_set_bit(port, &s->evtchn_pending[0]);
  147. }
  148. /**
  149. * notify_remote_via_irq - send event to remote end of event channel via irq
  150. * @irq: irq of event channel to send event to
  151. *
  152. * Unlike notify_remote_via_evtchn(), this is safe to use across
  153. * save/restore. Notifications on a broken connection are silently
  154. * dropped.
  155. */
  156. void notify_remote_via_irq(int irq)
  157. {
  158. int evtchn = evtchn_from_irq(irq);
  159. if (VALID_EVTCHN(evtchn))
  160. notify_remote_via_evtchn(evtchn);
  161. }
  162. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  163. static void mask_evtchn(int port)
  164. {
  165. struct shared_info *s = HYPERVISOR_shared_info;
  166. sync_set_bit(port, &s->evtchn_mask[0]);
  167. }
  168. static void unmask_evtchn(int port)
  169. {
  170. struct shared_info *s = HYPERVISOR_shared_info;
  171. unsigned int cpu = get_cpu();
  172. BUG_ON(!irqs_disabled());
  173. /* Slow path (hypercall) if this is a non-local port. */
  174. if (unlikely(cpu != cpu_from_evtchn(port))) {
  175. struct evtchn_unmask unmask = { .port = port };
  176. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  177. } else {
  178. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  179. sync_clear_bit(port, &s->evtchn_mask[0]);
  180. /*
  181. * The following is basically the equivalent of
  182. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  183. * the interrupt edge' if the channel is masked.
  184. */
  185. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  186. !sync_test_and_set_bit(port / BITS_PER_LONG,
  187. &vcpu_info->evtchn_pending_sel))
  188. vcpu_info->evtchn_upcall_pending = 1;
  189. }
  190. put_cpu();
  191. }
  192. static int find_unbound_irq(void)
  193. {
  194. int irq;
  195. /* Only allocate from dynirq range */
  196. for (irq = 0; irq < NR_IRQS; irq++)
  197. if (irq_bindcount[irq] == 0)
  198. break;
  199. if (irq == NR_IRQS)
  200. panic("No available IRQ to bind to: increase NR_IRQS!\n");
  201. return irq;
  202. }
  203. int bind_evtchn_to_irq(unsigned int evtchn)
  204. {
  205. int irq;
  206. spin_lock(&irq_mapping_update_lock);
  207. irq = evtchn_to_irq[evtchn];
  208. if (irq == -1) {
  209. irq = find_unbound_irq();
  210. dynamic_irq_init(irq);
  211. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  212. handle_level_irq, "event");
  213. evtchn_to_irq[evtchn] = irq;
  214. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  215. }
  216. irq_bindcount[irq]++;
  217. spin_unlock(&irq_mapping_update_lock);
  218. return irq;
  219. }
  220. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  221. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  222. {
  223. struct evtchn_bind_ipi bind_ipi;
  224. int evtchn, irq;
  225. spin_lock(&irq_mapping_update_lock);
  226. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  227. if (irq == -1) {
  228. irq = find_unbound_irq();
  229. if (irq < 0)
  230. goto out;
  231. dynamic_irq_init(irq);
  232. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  233. handle_level_irq, "ipi");
  234. bind_ipi.vcpu = cpu;
  235. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  236. &bind_ipi) != 0)
  237. BUG();
  238. evtchn = bind_ipi.port;
  239. evtchn_to_irq[evtchn] = irq;
  240. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  241. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  242. bind_evtchn_to_cpu(evtchn, cpu);
  243. }
  244. irq_bindcount[irq]++;
  245. out:
  246. spin_unlock(&irq_mapping_update_lock);
  247. return irq;
  248. }
  249. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  250. {
  251. struct evtchn_bind_virq bind_virq;
  252. int evtchn, irq;
  253. spin_lock(&irq_mapping_update_lock);
  254. irq = per_cpu(virq_to_irq, cpu)[virq];
  255. if (irq == -1) {
  256. bind_virq.virq = virq;
  257. bind_virq.vcpu = cpu;
  258. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  259. &bind_virq) != 0)
  260. BUG();
  261. evtchn = bind_virq.port;
  262. irq = find_unbound_irq();
  263. dynamic_irq_init(irq);
  264. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  265. handle_level_irq, "virq");
  266. evtchn_to_irq[evtchn] = irq;
  267. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  268. per_cpu(virq_to_irq, cpu)[virq] = irq;
  269. bind_evtchn_to_cpu(evtchn, cpu);
  270. }
  271. irq_bindcount[irq]++;
  272. spin_unlock(&irq_mapping_update_lock);
  273. return irq;
  274. }
  275. static void unbind_from_irq(unsigned int irq)
  276. {
  277. struct evtchn_close close;
  278. int evtchn = evtchn_from_irq(irq);
  279. spin_lock(&irq_mapping_update_lock);
  280. if ((--irq_bindcount[irq] == 0) && VALID_EVTCHN(evtchn)) {
  281. close.port = evtchn;
  282. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  283. BUG();
  284. switch (type_from_irq(irq)) {
  285. case IRQT_VIRQ:
  286. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  287. [index_from_irq(irq)] = -1;
  288. break;
  289. default:
  290. break;
  291. }
  292. /* Closed ports are implicitly re-bound to VCPU0. */
  293. bind_evtchn_to_cpu(evtchn, 0);
  294. evtchn_to_irq[evtchn] = -1;
  295. irq_info[irq] = IRQ_UNBOUND;
  296. dynamic_irq_cleanup(irq);
  297. }
  298. spin_unlock(&irq_mapping_update_lock);
  299. }
  300. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  301. irq_handler_t handler,
  302. unsigned long irqflags,
  303. const char *devname, void *dev_id)
  304. {
  305. unsigned int irq;
  306. int retval;
  307. irq = bind_evtchn_to_irq(evtchn);
  308. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  309. if (retval != 0) {
  310. unbind_from_irq(irq);
  311. return retval;
  312. }
  313. return irq;
  314. }
  315. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  316. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  317. irq_handler_t handler,
  318. unsigned long irqflags, const char *devname, void *dev_id)
  319. {
  320. unsigned int irq;
  321. int retval;
  322. irq = bind_virq_to_irq(virq, cpu);
  323. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  324. if (retval != 0) {
  325. unbind_from_irq(irq);
  326. return retval;
  327. }
  328. return irq;
  329. }
  330. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  331. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  332. unsigned int cpu,
  333. irq_handler_t handler,
  334. unsigned long irqflags,
  335. const char *devname,
  336. void *dev_id)
  337. {
  338. int irq, retval;
  339. irq = bind_ipi_to_irq(ipi, cpu);
  340. if (irq < 0)
  341. return irq;
  342. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  343. if (retval != 0) {
  344. unbind_from_irq(irq);
  345. return retval;
  346. }
  347. return irq;
  348. }
  349. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  350. {
  351. free_irq(irq, dev_id);
  352. unbind_from_irq(irq);
  353. }
  354. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  355. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  356. {
  357. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  358. BUG_ON(irq < 0);
  359. notify_remote_via_irq(irq);
  360. }
  361. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  362. {
  363. struct shared_info *sh = HYPERVISOR_shared_info;
  364. int cpu = smp_processor_id();
  365. int i;
  366. unsigned long flags;
  367. static DEFINE_SPINLOCK(debug_lock);
  368. spin_lock_irqsave(&debug_lock, flags);
  369. printk("vcpu %d\n ", cpu);
  370. for_each_online_cpu(i) {
  371. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  372. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  373. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  374. v->evtchn_upcall_pending,
  375. v->evtchn_pending_sel);
  376. }
  377. printk("pending:\n ");
  378. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  379. printk("%08lx%s", sh->evtchn_pending[i],
  380. i % 8 == 0 ? "\n " : " ");
  381. printk("\nmasks:\n ");
  382. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  383. printk("%08lx%s", sh->evtchn_mask[i],
  384. i % 8 == 0 ? "\n " : " ");
  385. printk("\nunmasked:\n ");
  386. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  387. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  388. i % 8 == 0 ? "\n " : " ");
  389. printk("\npending list:\n");
  390. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  391. if (sync_test_bit(i, sh->evtchn_pending)) {
  392. printk(" %d: event %d -> irq %d\n",
  393. cpu_evtchn[i], i,
  394. evtchn_to_irq[i]);
  395. }
  396. }
  397. spin_unlock_irqrestore(&debug_lock, flags);
  398. return IRQ_HANDLED;
  399. }
  400. /*
  401. * Search the CPUs pending events bitmasks. For each one found, map
  402. * the event number to an irq, and feed it into do_IRQ() for
  403. * handling.
  404. *
  405. * Xen uses a two-level bitmap to speed searching. The first level is
  406. * a bitset of words which contain pending event bits. The second
  407. * level is a bitset of pending events themselves.
  408. */
  409. void xen_evtchn_do_upcall(struct pt_regs *regs)
  410. {
  411. int cpu = get_cpu();
  412. struct shared_info *s = HYPERVISOR_shared_info;
  413. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  414. static DEFINE_PER_CPU(unsigned, nesting_count);
  415. unsigned count;
  416. do {
  417. unsigned long pending_words;
  418. vcpu_info->evtchn_upcall_pending = 0;
  419. if (__get_cpu_var(nesting_count)++)
  420. goto out;
  421. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  422. /* Clear master flag /before/ clearing selector flag. */
  423. wmb();
  424. #endif
  425. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  426. while (pending_words != 0) {
  427. unsigned long pending_bits;
  428. int word_idx = __ffs(pending_words);
  429. pending_words &= ~(1UL << word_idx);
  430. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  431. int bit_idx = __ffs(pending_bits);
  432. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  433. int irq = evtchn_to_irq[port];
  434. if (irq != -1)
  435. xen_do_IRQ(irq, regs);
  436. }
  437. }
  438. BUG_ON(!irqs_disabled());
  439. count = __get_cpu_var(nesting_count);
  440. __get_cpu_var(nesting_count) = 0;
  441. } while(count != 1);
  442. out:
  443. put_cpu();
  444. }
  445. /* Rebind a new event channel to an existing irq. */
  446. void rebind_evtchn_irq(int evtchn, int irq)
  447. {
  448. /* Make sure the irq is masked, since the new event channel
  449. will also be masked. */
  450. disable_irq(irq);
  451. spin_lock(&irq_mapping_update_lock);
  452. /* After resume the irq<->evtchn mappings are all cleared out */
  453. BUG_ON(evtchn_to_irq[evtchn] != -1);
  454. /* Expect irq to have been bound before,
  455. so the bindcount should be non-0 */
  456. BUG_ON(irq_bindcount[irq] == 0);
  457. evtchn_to_irq[evtchn] = irq;
  458. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  459. spin_unlock(&irq_mapping_update_lock);
  460. /* new event channels are always bound to cpu 0 */
  461. irq_set_affinity(irq, cpumask_of_cpu(0));
  462. /* Unmask the event channel. */
  463. enable_irq(irq);
  464. }
  465. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  466. static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  467. {
  468. struct evtchn_bind_vcpu bind_vcpu;
  469. int evtchn = evtchn_from_irq(irq);
  470. if (!VALID_EVTCHN(evtchn))
  471. return;
  472. /* Send future instances of this interrupt to other vcpu. */
  473. bind_vcpu.port = evtchn;
  474. bind_vcpu.vcpu = tcpu;
  475. /*
  476. * If this fails, it usually just indicates that we're dealing with a
  477. * virq or IPI channel, which don't actually need to be rebound. Ignore
  478. * it, but don't do the xenlinux-level rebind in that case.
  479. */
  480. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  481. bind_evtchn_to_cpu(evtchn, tcpu);
  482. }
  483. static void set_affinity_irq(unsigned irq, cpumask_t dest)
  484. {
  485. unsigned tcpu = first_cpu(dest);
  486. rebind_irq_to_cpu(irq, tcpu);
  487. }
  488. int resend_irq_on_evtchn(unsigned int irq)
  489. {
  490. int masked, evtchn = evtchn_from_irq(irq);
  491. struct shared_info *s = HYPERVISOR_shared_info;
  492. if (!VALID_EVTCHN(evtchn))
  493. return 1;
  494. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  495. sync_set_bit(evtchn, s->evtchn_pending);
  496. if (!masked)
  497. unmask_evtchn(evtchn);
  498. return 1;
  499. }
  500. static void enable_dynirq(unsigned int irq)
  501. {
  502. int evtchn = evtchn_from_irq(irq);
  503. if (VALID_EVTCHN(evtchn))
  504. unmask_evtchn(evtchn);
  505. }
  506. static void disable_dynirq(unsigned int irq)
  507. {
  508. int evtchn = evtchn_from_irq(irq);
  509. if (VALID_EVTCHN(evtchn))
  510. mask_evtchn(evtchn);
  511. }
  512. static void ack_dynirq(unsigned int irq)
  513. {
  514. int evtchn = evtchn_from_irq(irq);
  515. move_native_irq(irq);
  516. if (VALID_EVTCHN(evtchn))
  517. clear_evtchn(evtchn);
  518. }
  519. static int retrigger_dynirq(unsigned int irq)
  520. {
  521. int evtchn = evtchn_from_irq(irq);
  522. struct shared_info *sh = HYPERVISOR_shared_info;
  523. int ret = 0;
  524. if (VALID_EVTCHN(evtchn)) {
  525. int masked;
  526. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  527. sync_set_bit(evtchn, sh->evtchn_pending);
  528. if (!masked)
  529. unmask_evtchn(evtchn);
  530. ret = 1;
  531. }
  532. return ret;
  533. }
  534. static void restore_cpu_virqs(unsigned int cpu)
  535. {
  536. struct evtchn_bind_virq bind_virq;
  537. int virq, irq, evtchn;
  538. for (virq = 0; virq < NR_VIRQS; virq++) {
  539. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  540. continue;
  541. BUG_ON(irq_info[irq].type != IRQT_VIRQ);
  542. BUG_ON(irq_info[irq].index != virq);
  543. /* Get a new binding from Xen. */
  544. bind_virq.virq = virq;
  545. bind_virq.vcpu = cpu;
  546. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  547. &bind_virq) != 0)
  548. BUG();
  549. evtchn = bind_virq.port;
  550. /* Record the new mapping. */
  551. evtchn_to_irq[evtchn] = irq;
  552. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  553. bind_evtchn_to_cpu(evtchn, cpu);
  554. /* Ready for use. */
  555. unmask_evtchn(evtchn);
  556. }
  557. }
  558. static void restore_cpu_ipis(unsigned int cpu)
  559. {
  560. struct evtchn_bind_ipi bind_ipi;
  561. int ipi, irq, evtchn;
  562. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  563. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  564. continue;
  565. BUG_ON(irq_info[irq].type != IRQT_IPI);
  566. BUG_ON(irq_info[irq].index != ipi);
  567. /* Get a new binding from Xen. */
  568. bind_ipi.vcpu = cpu;
  569. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  570. &bind_ipi) != 0)
  571. BUG();
  572. evtchn = bind_ipi.port;
  573. /* Record the new mapping. */
  574. evtchn_to_irq[evtchn] = irq;
  575. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  576. bind_evtchn_to_cpu(evtchn, cpu);
  577. /* Ready for use. */
  578. unmask_evtchn(evtchn);
  579. }
  580. }
  581. /* Clear an irq's pending state, in preparation for polling on it */
  582. void xen_clear_irq_pending(int irq)
  583. {
  584. int evtchn = evtchn_from_irq(irq);
  585. if (VALID_EVTCHN(evtchn))
  586. clear_evtchn(evtchn);
  587. }
  588. /* Poll waiting for an irq to become pending. In the usual case, the
  589. irq will be disabled so it won't deliver an interrupt. */
  590. void xen_poll_irq(int irq)
  591. {
  592. evtchn_port_t evtchn = evtchn_from_irq(irq);
  593. if (VALID_EVTCHN(evtchn)) {
  594. struct sched_poll poll;
  595. poll.nr_ports = 1;
  596. poll.timeout = 0;
  597. poll.ports = &evtchn;
  598. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  599. BUG();
  600. }
  601. }
  602. void xen_irq_resume(void)
  603. {
  604. unsigned int cpu, irq, evtchn;
  605. init_evtchn_cpu_bindings();
  606. /* New event-channel space is not 'live' yet. */
  607. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  608. mask_evtchn(evtchn);
  609. /* No IRQ <-> event-channel mappings. */
  610. for (irq = 0; irq < NR_IRQS; irq++)
  611. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  612. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  613. evtchn_to_irq[evtchn] = -1;
  614. for_each_possible_cpu(cpu) {
  615. restore_cpu_virqs(cpu);
  616. restore_cpu_ipis(cpu);
  617. }
  618. }
  619. static struct irq_chip xen_dynamic_chip __read_mostly = {
  620. .name = "xen-dyn",
  621. .mask = disable_dynirq,
  622. .unmask = enable_dynirq,
  623. .ack = ack_dynirq,
  624. .set_affinity = set_affinity_irq,
  625. .retrigger = retrigger_dynirq,
  626. };
  627. void __init xen_init_IRQ(void)
  628. {
  629. int i;
  630. init_evtchn_cpu_bindings();
  631. /* No event channels are 'live' right now. */
  632. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  633. mask_evtchn(i);
  634. /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  635. for (i = 0; i < NR_IRQS; i++)
  636. irq_bindcount[i] = 0;
  637. irq_ctx_init(smp_processor_id());
  638. }