hpwdt.c 18 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/kernel.h>
  22. #include <linux/miscdevice.h>
  23. #include <linux/mm.h>
  24. #include <linux/module.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/notifier.h>
  28. #include <linux/pci.h>
  29. #include <linux/pci_ids.h>
  30. #include <linux/reboot.h>
  31. #include <linux/sched.h>
  32. #include <linux/timer.h>
  33. #include <linux/types.h>
  34. #include <linux/uaccess.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/dmi.h>
  37. #include <linux/efi.h>
  38. #include <linux/string.h>
  39. #include <linux/bootmem.h>
  40. #include <linux/slab.h>
  41. #include <asm/desc.h>
  42. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  43. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  44. #define PCI_BIOS32_PARAGRAPH_LEN 16
  45. #define PCI_ROM_BASE1 0x000F0000
  46. #define ROM_SIZE 0x10000
  47. struct bios32_service_dir {
  48. u32 signature;
  49. u32 entry_point;
  50. u8 revision;
  51. u8 length;
  52. u8 checksum;
  53. u8 reserved[5];
  54. };
  55. /* type 212 */
  56. struct smbios_cru64_info {
  57. u8 type;
  58. u8 byte_length;
  59. u16 handle;
  60. u32 signature;
  61. u64 physical_address;
  62. u32 double_length;
  63. u32 double_offset;
  64. };
  65. #define SMBIOS_CRU64_INFORMATION 212
  66. struct cmn_registers {
  67. union {
  68. struct {
  69. u8 ral;
  70. u8 rah;
  71. u16 rea2;
  72. };
  73. u32 reax;
  74. } u1;
  75. union {
  76. struct {
  77. u8 rbl;
  78. u8 rbh;
  79. u8 reb2l;
  80. u8 reb2h;
  81. };
  82. u32 rebx;
  83. } u2;
  84. union {
  85. struct {
  86. u8 rcl;
  87. u8 rch;
  88. u16 rec2;
  89. };
  90. u32 recx;
  91. } u3;
  92. union {
  93. struct {
  94. u8 rdl;
  95. u8 rdh;
  96. u16 red2;
  97. };
  98. u32 redx;
  99. } u4;
  100. u32 resi;
  101. u32 redi;
  102. u16 rds;
  103. u16 res;
  104. u32 reflags;
  105. } __attribute__((packed));
  106. #define DEFAULT_MARGIN 30
  107. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  108. static unsigned int reload; /* the computed soft_margin */
  109. static int nowayout = WATCHDOG_NOWAYOUT;
  110. static char expect_release;
  111. static unsigned long hpwdt_is_open;
  112. static unsigned int allow_kdump;
  113. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  114. static unsigned long __iomem *hpwdt_timer_reg;
  115. static unsigned long __iomem *hpwdt_timer_con;
  116. static DEFINE_SPINLOCK(rom_lock);
  117. static void *cru_rom_addr;
  118. static struct cmn_registers cmn_regs;
  119. static struct pci_device_id hpwdt_devices[] = {
  120. {
  121. .vendor = PCI_VENDOR_ID_COMPAQ,
  122. .device = 0xB203,
  123. .subvendor = PCI_ANY_ID,
  124. .subdevice = PCI_ANY_ID,
  125. },
  126. {0}, /* terminate list */
  127. };
  128. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  129. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, unsigned long *pRomEntry);
  130. #ifndef CONFIG_X86_64
  131. /* --32 Bit Bios------------------------------------------------------------ */
  132. #define HPWDT_ARCH 32
  133. asm(".text \n\t"
  134. ".align 4 \n"
  135. "asminline_call: \n\t"
  136. "pushl %ebp \n\t"
  137. "movl %esp, %ebp \n\t"
  138. "pusha \n\t"
  139. "pushf \n\t"
  140. "push %es \n\t"
  141. "push %ds \n\t"
  142. "pop %es \n\t"
  143. "movl 8(%ebp),%eax \n\t"
  144. "movl 4(%eax),%ebx \n\t"
  145. "movl 8(%eax),%ecx \n\t"
  146. "movl 12(%eax),%edx \n\t"
  147. "movl 16(%eax),%esi \n\t"
  148. "movl 20(%eax),%edi \n\t"
  149. "movl (%eax),%eax \n\t"
  150. "push %cs \n\t"
  151. "call *12(%ebp) \n\t"
  152. "pushf \n\t"
  153. "pushl %eax \n\t"
  154. "movl 8(%ebp),%eax \n\t"
  155. "movl %ebx,4(%eax) \n\t"
  156. "movl %ecx,8(%eax) \n\t"
  157. "movl %edx,12(%eax) \n\t"
  158. "movl %esi,16(%eax) \n\t"
  159. "movl %edi,20(%eax) \n\t"
  160. "movw %ds,24(%eax) \n\t"
  161. "movw %es,26(%eax) \n\t"
  162. "popl %ebx \n\t"
  163. "movl %ebx,(%eax) \n\t"
  164. "popl %ebx \n\t"
  165. "movl %ebx,28(%eax) \n\t"
  166. "pop %es \n\t"
  167. "popf \n\t"
  168. "popa \n\t"
  169. "leave \n\t"
  170. "ret \n\t"
  171. ".previous");
  172. /*
  173. * cru_detect
  174. *
  175. * Routine Description:
  176. * This function uses the 32-bit BIOS Service Directory record to
  177. * search for a $CRU record.
  178. *
  179. * Return Value:
  180. * 0 : SUCCESS
  181. * <0 : FAILURE
  182. */
  183. static int __devinit cru_detect(unsigned long map_entry,
  184. unsigned long map_offset)
  185. {
  186. void *bios32_map;
  187. unsigned long *bios32_entrypoint;
  188. unsigned long cru_physical_address;
  189. unsigned long cru_length;
  190. unsigned long physical_bios_base = 0;
  191. unsigned long physical_bios_offset = 0;
  192. int retval = -ENODEV;
  193. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  194. if (bios32_map == NULL)
  195. return -ENODEV;
  196. bios32_entrypoint = bios32_map + map_offset;
  197. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  198. asminline_call(&cmn_regs, bios32_entrypoint);
  199. if (cmn_regs.u1.ral != 0) {
  200. printk(KERN_WARNING
  201. "hpwdt: Call succeeded but with an error: 0x%x\n",
  202. cmn_regs.u1.ral);
  203. } else {
  204. physical_bios_base = cmn_regs.u2.rebx;
  205. physical_bios_offset = cmn_regs.u4.redx;
  206. cru_length = cmn_regs.u3.recx;
  207. cru_physical_address =
  208. physical_bios_base + physical_bios_offset;
  209. /* If the values look OK, then map it in. */
  210. if ((physical_bios_base + physical_bios_offset)) {
  211. cru_rom_addr =
  212. ioremap(cru_physical_address, cru_length);
  213. if (cru_rom_addr)
  214. retval = 0;
  215. }
  216. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  217. physical_bios_base);
  218. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  219. physical_bios_offset);
  220. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  221. cru_length);
  222. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
  223. (unsigned int)&cru_rom_addr);
  224. }
  225. iounmap(bios32_map);
  226. return retval;
  227. }
  228. /*
  229. * bios_checksum
  230. */
  231. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  232. {
  233. char sum = 0;
  234. int i;
  235. /*
  236. * calculate checksum of size bytes. This should add up
  237. * to zero if we have a valid header.
  238. */
  239. for (i = 0; i < len; i++)
  240. sum += ptr[i];
  241. return ((sum == 0) && (len > 0));
  242. }
  243. /*
  244. * bios32_present
  245. *
  246. * Routine Description:
  247. * This function finds the 32-bit BIOS Service Directory
  248. *
  249. * Return Value:
  250. * 0 : SUCCESS
  251. * <0 : FAILURE
  252. */
  253. static int __devinit bios32_present(const char __iomem *p)
  254. {
  255. struct bios32_service_dir *bios_32_ptr;
  256. int length;
  257. unsigned long map_entry, map_offset;
  258. bios_32_ptr = (struct bios32_service_dir *) p;
  259. /*
  260. * Search for signature by checking equal to the swizzled value
  261. * instead of calling another routine to perform a strcmp.
  262. */
  263. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  264. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  265. if (bios_checksum(p, length)) {
  266. /*
  267. * According to the spec, we're looking for the
  268. * first 4KB-aligned address below the entrypoint
  269. * listed in the header. The Service Directory code
  270. * is guaranteed to occupy no more than 2 4KB pages.
  271. */
  272. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  273. map_offset = bios_32_ptr->entry_point - map_entry;
  274. return cru_detect(map_entry, map_offset);
  275. }
  276. }
  277. return -ENODEV;
  278. }
  279. static int __devinit detect_cru_service(void)
  280. {
  281. char __iomem *p, *q;
  282. int rc = -1;
  283. /*
  284. * Search from 0x0f0000 through 0x0fffff, inclusive.
  285. */
  286. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  287. if (p == NULL)
  288. return -ENOMEM;
  289. for (q = p; q < p + ROM_SIZE; q += 16) {
  290. rc = bios32_present(q);
  291. if (!rc)
  292. break;
  293. }
  294. iounmap(p);
  295. return rc;
  296. }
  297. #else
  298. /* --64 Bit Bios------------------------------------------------------------ */
  299. #define HPWDT_ARCH 64
  300. asm(".text \n\t"
  301. ".align 4 \n"
  302. "asminline_call: \n\t"
  303. "pushq %rbp \n\t"
  304. "movq %rsp, %rbp \n\t"
  305. "pushq %rax \n\t"
  306. "pushq %rbx \n\t"
  307. "pushq %rdx \n\t"
  308. "pushq %r12 \n\t"
  309. "pushq %r9 \n\t"
  310. "movq %rsi, %r12 \n\t"
  311. "movq %rdi, %r9 \n\t"
  312. "movl 4(%r9),%ebx \n\t"
  313. "movl 8(%r9),%ecx \n\t"
  314. "movl 12(%r9),%edx \n\t"
  315. "movl 16(%r9),%esi \n\t"
  316. "movl 20(%r9),%edi \n\t"
  317. "movl (%r9),%eax \n\t"
  318. "call *%r12 \n\t"
  319. "pushfq \n\t"
  320. "popq %r12 \n\t"
  321. "movl %eax, (%r9) \n\t"
  322. "movl %ebx, 4(%r9) \n\t"
  323. "movl %ecx, 8(%r9) \n\t"
  324. "movl %edx, 12(%r9) \n\t"
  325. "movl %esi, 16(%r9) \n\t"
  326. "movl %edi, 20(%r9) \n\t"
  327. "movq %r12, %rax \n\t"
  328. "movl %eax, 28(%r9) \n\t"
  329. "popq %r9 \n\t"
  330. "popq %r12 \n\t"
  331. "popq %rdx \n\t"
  332. "popq %rbx \n\t"
  333. "popq %rax \n\t"
  334. "leave \n\t"
  335. "ret \n\t"
  336. ".previous");
  337. /*
  338. * dmi_find_cru
  339. *
  340. * Routine Description:
  341. * This function checks whether or not a SMBIOS/DMI record is
  342. * the 64bit CRU info or not
  343. */
  344. static void __devinit dmi_find_cru(const struct dmi_header *dm)
  345. {
  346. struct smbios_cru64_info *smbios_cru64_ptr;
  347. unsigned long cru_physical_address;
  348. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  349. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  350. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  351. cru_physical_address =
  352. smbios_cru64_ptr->physical_address +
  353. smbios_cru64_ptr->double_offset;
  354. cru_rom_addr = ioremap(cru_physical_address,
  355. smbios_cru64_ptr->double_length);
  356. }
  357. }
  358. }
  359. static int __devinit detect_cru_service(void)
  360. {
  361. cru_rom_addr = NULL;
  362. dmi_walk(dmi_find_cru);
  363. /* if cru_rom_addr has been set then we found a CRU service */
  364. return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
  365. }
  366. /* ------------------------------------------------------------------------- */
  367. #endif
  368. /*
  369. * Watchdog operations
  370. */
  371. static void hpwdt_start(void)
  372. {
  373. reload = (soft_margin * 1000) / 128;
  374. iowrite16(reload, hpwdt_timer_reg);
  375. iowrite16(0x85, hpwdt_timer_con);
  376. }
  377. static void hpwdt_stop(void)
  378. {
  379. unsigned long data;
  380. data = ioread16(hpwdt_timer_con);
  381. data &= 0xFE;
  382. iowrite16(data, hpwdt_timer_con);
  383. }
  384. static void hpwdt_ping(void)
  385. {
  386. iowrite16(reload, hpwdt_timer_reg);
  387. }
  388. static int hpwdt_change_timer(int new_margin)
  389. {
  390. /* Arbitrary, can't find the card's limits */
  391. if (new_margin < 30 || new_margin > 600) {
  392. printk(KERN_WARNING
  393. "hpwdt: New value passed in is invalid: %d seconds.\n",
  394. new_margin);
  395. return -EINVAL;
  396. }
  397. soft_margin = new_margin;
  398. printk(KERN_DEBUG
  399. "hpwdt: New timer passed in is %d seconds.\n",
  400. new_margin);
  401. reload = (soft_margin * 1000) / 128;
  402. return 0;
  403. }
  404. /*
  405. * NMI Handler
  406. */
  407. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  408. void *data)
  409. {
  410. unsigned long rom_pl;
  411. static int die_nmi_called;
  412. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  413. return NOTIFY_OK;
  414. spin_lock_irqsave(&rom_lock, rom_pl);
  415. if (!die_nmi_called)
  416. asminline_call(&cmn_regs, cru_rom_addr);
  417. die_nmi_called = 1;
  418. spin_unlock_irqrestore(&rom_lock, rom_pl);
  419. if (cmn_regs.u1.ral == 0) {
  420. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  421. "but unable to determine source.\n");
  422. } else {
  423. if (allow_kdump)
  424. hpwdt_stop();
  425. panic("An NMI occurred, please see the Integrated "
  426. "Management Log for details.\n");
  427. }
  428. return NOTIFY_STOP;
  429. }
  430. /*
  431. * /dev/watchdog handling
  432. */
  433. static int hpwdt_open(struct inode *inode, struct file *file)
  434. {
  435. /* /dev/watchdog can only be opened once */
  436. if (test_and_set_bit(0, &hpwdt_is_open))
  437. return -EBUSY;
  438. /* Start the watchdog */
  439. hpwdt_start();
  440. hpwdt_ping();
  441. return nonseekable_open(inode, file);
  442. }
  443. static int hpwdt_release(struct inode *inode, struct file *file)
  444. {
  445. /* Stop the watchdog */
  446. if (expect_release == 42) {
  447. hpwdt_stop();
  448. } else {
  449. printk(KERN_CRIT
  450. "hpwdt: Unexpected close, not stopping watchdog!\n");
  451. hpwdt_ping();
  452. }
  453. expect_release = 0;
  454. /* /dev/watchdog is being closed, make sure it can be re-opened */
  455. clear_bit(0, &hpwdt_is_open);
  456. return 0;
  457. }
  458. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  459. size_t len, loff_t *ppos)
  460. {
  461. /* See if we got the magic character 'V' and reload the timer */
  462. if (len) {
  463. if (!nowayout) {
  464. size_t i;
  465. /* note: just in case someone wrote the magic character
  466. * five months ago... */
  467. expect_release = 0;
  468. /* scan to see whether or not we got the magic char. */
  469. for (i = 0; i != len; i++) {
  470. char c;
  471. if (get_user(c, data + i))
  472. return -EFAULT;
  473. if (c == 'V')
  474. expect_release = 42;
  475. }
  476. }
  477. /* someone wrote to us, we should reload the timer */
  478. hpwdt_ping();
  479. }
  480. return len;
  481. }
  482. static struct watchdog_info ident = {
  483. .options = WDIOF_SETTIMEOUT |
  484. WDIOF_KEEPALIVEPING |
  485. WDIOF_MAGICCLOSE,
  486. .identity = "HP iLO2 HW Watchdog Timer",
  487. };
  488. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  489. unsigned long arg)
  490. {
  491. void __user *argp = (void __user *)arg;
  492. int __user *p = argp;
  493. int new_margin;
  494. int ret = -ENOTTY;
  495. switch (cmd) {
  496. case WDIOC_GETSUPPORT:
  497. ret = 0;
  498. if (copy_to_user(argp, &ident, sizeof(ident)))
  499. ret = -EFAULT;
  500. break;
  501. case WDIOC_GETSTATUS:
  502. case WDIOC_GETBOOTSTATUS:
  503. ret = put_user(0, p);
  504. break;
  505. case WDIOC_KEEPALIVE:
  506. hpwdt_ping();
  507. ret = 0;
  508. break;
  509. case WDIOC_SETTIMEOUT:
  510. ret = get_user(new_margin, p);
  511. if (ret)
  512. break;
  513. ret = hpwdt_change_timer(new_margin);
  514. if (ret)
  515. break;
  516. hpwdt_ping();
  517. /* Fall */
  518. case WDIOC_GETTIMEOUT:
  519. ret = put_user(soft_margin, p);
  520. break;
  521. }
  522. return ret;
  523. }
  524. /*
  525. * Kernel interfaces
  526. */
  527. static struct file_operations hpwdt_fops = {
  528. .owner = THIS_MODULE,
  529. .llseek = no_llseek,
  530. .write = hpwdt_write,
  531. .unlocked_ioctl = hpwdt_ioctl,
  532. .open = hpwdt_open,
  533. .release = hpwdt_release,
  534. };
  535. static struct miscdevice hpwdt_miscdev = {
  536. .minor = WATCHDOG_MINOR,
  537. .name = "watchdog",
  538. .fops = &hpwdt_fops,
  539. };
  540. static struct notifier_block die_notifier = {
  541. .notifier_call = hpwdt_pretimeout,
  542. .priority = 0x7FFFFFFF,
  543. };
  544. /*
  545. * Init & Exit
  546. */
  547. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  548. const struct pci_device_id *ent)
  549. {
  550. int retval;
  551. /*
  552. * First let's find out if we are on an iLO2 server. We will
  553. * not run on a legacy ASM box.
  554. * So we only support the G5 ProLiant servers and higher.
  555. */
  556. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  557. dev_warn(&dev->dev,
  558. "This server does not have an iLO2 ASIC.\n");
  559. return -ENODEV;
  560. }
  561. if (pci_enable_device(dev)) {
  562. dev_warn(&dev->dev,
  563. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  564. ent->vendor, ent->device);
  565. return -ENODEV;
  566. }
  567. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  568. if (!pci_mem_addr) {
  569. dev_warn(&dev->dev,
  570. "Unable to detect the iLO2 server memory.\n");
  571. retval = -ENOMEM;
  572. goto error_pci_iomap;
  573. }
  574. hpwdt_timer_reg = pci_mem_addr + 0x70;
  575. hpwdt_timer_con = pci_mem_addr + 0x72;
  576. /* Make sure that we have a valid soft_margin */
  577. if (hpwdt_change_timer(soft_margin))
  578. hpwdt_change_timer(DEFAULT_MARGIN);
  579. /*
  580. * We need to map the ROM to get the CRU service.
  581. * For 32 bit Operating Systems we need to go through the 32 Bit
  582. * BIOS Service Directory
  583. * For 64 bit Operating Systems we get that service through SMBIOS.
  584. */
  585. retval = detect_cru_service();
  586. if (retval < 0) {
  587. dev_warn(&dev->dev,
  588. "Unable to detect the %d Bit CRU Service.\n",
  589. HPWDT_ARCH);
  590. goto error_get_cru;
  591. }
  592. /*
  593. * We know this is the only CRU call we need to make so lets keep as
  594. * few instructions as possible once the NMI comes in.
  595. */
  596. cmn_regs.u1.rah = 0x0D;
  597. cmn_regs.u1.ral = 0x02;
  598. retval = register_die_notifier(&die_notifier);
  599. if (retval != 0) {
  600. dev_warn(&dev->dev,
  601. "Unable to register a die notifier (err=%d).\n",
  602. retval);
  603. goto error_die_notifier;
  604. }
  605. retval = misc_register(&hpwdt_miscdev);
  606. if (retval < 0) {
  607. dev_warn(&dev->dev,
  608. "Unable to register miscdev on minor=%d (err=%d).\n",
  609. WATCHDOG_MINOR, retval);
  610. goto error_misc_register;
  611. }
  612. printk(KERN_INFO
  613. "hp Watchdog Timer Driver: 1.00"
  614. ", timer margin: %d seconds (nowayout=%d)"
  615. ", allow kernel dump: %s (default = 0/OFF).\n",
  616. soft_margin, nowayout, (allow_kdump == 0) ? "OFF" : "ON");
  617. return 0;
  618. error_misc_register:
  619. unregister_die_notifier(&die_notifier);
  620. error_die_notifier:
  621. if (cru_rom_addr)
  622. iounmap(cru_rom_addr);
  623. error_get_cru:
  624. pci_iounmap(dev, pci_mem_addr);
  625. error_pci_iomap:
  626. pci_disable_device(dev);
  627. return retval;
  628. }
  629. static void __devexit hpwdt_exit(struct pci_dev *dev)
  630. {
  631. if (!nowayout)
  632. hpwdt_stop();
  633. misc_deregister(&hpwdt_miscdev);
  634. unregister_die_notifier(&die_notifier);
  635. if (cru_rom_addr)
  636. iounmap(cru_rom_addr);
  637. pci_iounmap(dev, pci_mem_addr);
  638. pci_disable_device(dev);
  639. }
  640. static struct pci_driver hpwdt_driver = {
  641. .name = "hpwdt",
  642. .id_table = hpwdt_devices,
  643. .probe = hpwdt_init_one,
  644. .remove = __devexit_p(hpwdt_exit),
  645. };
  646. static void __exit hpwdt_cleanup(void)
  647. {
  648. pci_unregister_driver(&hpwdt_driver);
  649. }
  650. static int __init hpwdt_init(void)
  651. {
  652. return pci_register_driver(&hpwdt_driver);
  653. }
  654. MODULE_AUTHOR("Tom Mingarelli");
  655. MODULE_DESCRIPTION("hp watchdog driver");
  656. MODULE_LICENSE("GPL");
  657. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  658. module_param(soft_margin, int, 0);
  659. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  660. module_param(allow_kdump, int, 0);
  661. MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
  662. module_param(nowayout, int, 0);
  663. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  664. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  665. module_init(hpwdt_init);
  666. module_exit(hpwdt_cleanup);