blizzard.c 40 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568
  1. /*
  2. * Epson Blizzard LCD controller driver
  3. *
  4. * Copyright (C) 2004-2005 Nokia Corporation
  5. * Authors: Juha Yrjola <juha.yrjola@nokia.com>
  6. * Imre Deak <imre.deak@nokia.com>
  7. * YUV support: Jussi Laako <jussi.laako@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/mm.h>
  25. #include <linux/fb.h>
  26. #include <linux/delay.h>
  27. #include <linux/clk.h>
  28. #include <mach/dma.h>
  29. #include <mach/omapfb.h>
  30. #include <mach/blizzard.h>
  31. #include "dispc.h"
  32. #define MODULE_NAME "blizzard"
  33. #define BLIZZARD_REV_CODE 0x00
  34. #define BLIZZARD_CONFIG 0x02
  35. #define BLIZZARD_PLL_DIV 0x04
  36. #define BLIZZARD_PLL_LOCK_RANGE 0x06
  37. #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
  38. #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
  39. #define BLIZZARD_PLL_MODE 0x0c
  40. #define BLIZZARD_CLK_SRC 0x0e
  41. #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
  42. #define BLIZZARD_MEM_BANK0_STATUS 0x14
  43. #define BLIZZARD_HDISP 0x2a
  44. #define BLIZZARD_HNDP 0x2c
  45. #define BLIZZARD_VDISP0 0x2e
  46. #define BLIZZARD_VDISP1 0x30
  47. #define BLIZZARD_VNDP 0x32
  48. #define BLIZZARD_HSW 0x34
  49. #define BLIZZARD_VSW 0x38
  50. #define BLIZZARD_DISPLAY_MODE 0x68
  51. #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
  52. #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
  53. #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
  54. #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
  55. #define BLIZZARD_POWER_SAVE 0xE6
  56. #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
  57. /* Data source select */
  58. /* For S1D13745 */
  59. #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
  60. #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
  61. #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
  62. #define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
  63. /* For S1D13744 */
  64. #define BLIZZARD_SRC_WRITE_LCD 0x00
  65. #define BLIZZARD_SRC_BLT_LCD 0x06
  66. #define BLIZZARD_COLOR_RGB565 0x01
  67. #define BLIZZARD_COLOR_YUV420 0x09
  68. #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
  69. #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
  70. #define BLIZZARD_AUTO_UPDATE_TIME (HZ / 20)
  71. /* Reserve 4 request slots for requests in irq context */
  72. #define REQ_POOL_SIZE 24
  73. #define IRQ_REQ_POOL_SIZE 4
  74. #define REQ_FROM_IRQ_POOL 0x01
  75. #define REQ_COMPLETE 0
  76. #define REQ_PENDING 1
  77. struct blizzard_reg_list {
  78. int start;
  79. int end;
  80. };
  81. /* These need to be saved / restored separately from the rest. */
  82. static struct blizzard_reg_list blizzard_pll_regs[] = {
  83. {
  84. .start = 0x04, /* Don't save PLL ctrl (0x0C) */
  85. .end = 0x0a,
  86. },
  87. {
  88. .start = 0x0e, /* Clock configuration */
  89. .end = 0x0e,
  90. },
  91. };
  92. static struct blizzard_reg_list blizzard_gen_regs[] = {
  93. {
  94. .start = 0x18, /* SDRAM control */
  95. .end = 0x20,
  96. },
  97. {
  98. .start = 0x28, /* LCD Panel configuration */
  99. .end = 0x5a, /* HSSI interface, TV configuration */
  100. },
  101. };
  102. static u8 blizzard_reg_cache[0x5a / 2];
  103. struct update_param {
  104. int plane;
  105. int x, y, width, height;
  106. int out_x, out_y;
  107. int out_width, out_height;
  108. int color_mode;
  109. int bpp;
  110. int flags;
  111. };
  112. struct blizzard_request {
  113. struct list_head entry;
  114. unsigned int flags;
  115. int (*handler)(struct blizzard_request *req);
  116. void (*complete)(void *data);
  117. void *complete_data;
  118. union {
  119. struct update_param update;
  120. struct completion *sync;
  121. } par;
  122. };
  123. struct plane_info {
  124. unsigned long offset;
  125. int pos_x, pos_y;
  126. int width, height;
  127. int out_width, out_height;
  128. int scr_width;
  129. int color_mode;
  130. int bpp;
  131. };
  132. struct blizzard_struct {
  133. enum omapfb_update_mode update_mode;
  134. enum omapfb_update_mode update_mode_before_suspend;
  135. struct timer_list auto_update_timer;
  136. int stop_auto_update;
  137. struct omapfb_update_window auto_update_window;
  138. int enabled_planes;
  139. int vid_nonstd_color;
  140. int vid_scaled;
  141. int last_color_mode;
  142. int zoom_on;
  143. int screen_width;
  144. int screen_height;
  145. unsigned te_connected:1;
  146. unsigned vsync_only:1;
  147. struct plane_info plane[OMAPFB_PLANE_NUM];
  148. struct blizzard_request req_pool[REQ_POOL_SIZE];
  149. struct list_head pending_req_list;
  150. struct list_head free_req_list;
  151. struct semaphore req_sema;
  152. spinlock_t req_lock;
  153. unsigned long sys_ck_rate;
  154. struct extif_timings reg_timings, lut_timings;
  155. u32 max_transmit_size;
  156. u32 extif_clk_period;
  157. int extif_clk_div;
  158. unsigned long pix_tx_time;
  159. unsigned long line_upd_time;
  160. struct omapfb_device *fbdev;
  161. struct lcd_ctrl_extif *extif;
  162. struct lcd_ctrl *int_ctrl;
  163. void (*power_up)(struct device *dev);
  164. void (*power_down)(struct device *dev);
  165. int version;
  166. } blizzard;
  167. struct lcd_ctrl blizzard_ctrl;
  168. static u8 blizzard_read_reg(u8 reg)
  169. {
  170. u8 data;
  171. blizzard.extif->set_bits_per_cycle(8);
  172. blizzard.extif->write_command(&reg, 1);
  173. blizzard.extif->read_data(&data, 1);
  174. return data;
  175. }
  176. static void blizzard_write_reg(u8 reg, u8 val)
  177. {
  178. blizzard.extif->set_bits_per_cycle(8);
  179. blizzard.extif->write_command(&reg, 1);
  180. blizzard.extif->write_data(&val, 1);
  181. }
  182. static void blizzard_restart_sdram(void)
  183. {
  184. unsigned long tmo;
  185. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
  186. udelay(50);
  187. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 1);
  188. tmo = jiffies + msecs_to_jiffies(200);
  189. while (!(blizzard_read_reg(BLIZZARD_MEM_BANK0_STATUS) & 0x01)) {
  190. if (time_after(jiffies, tmo)) {
  191. dev_err(blizzard.fbdev->dev,
  192. "s1d1374x: SDRAM not ready\n");
  193. break;
  194. }
  195. msleep(1);
  196. }
  197. }
  198. static void blizzard_stop_sdram(void)
  199. {
  200. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
  201. }
  202. /* Wait until the last window was completely written into the controllers
  203. * SDRAM and we can start transferring the next window.
  204. */
  205. static void blizzard_wait_line_buffer(void)
  206. {
  207. unsigned long tmo = jiffies + msecs_to_jiffies(30);
  208. while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 7)) {
  209. if (time_after(jiffies, tmo)) {
  210. if (printk_ratelimit())
  211. dev_err(blizzard.fbdev->dev,
  212. "s1d1374x: line buffer not ready\n");
  213. break;
  214. }
  215. }
  216. }
  217. /* Wait until the YYC color space converter is idle. */
  218. static void blizzard_wait_yyc(void)
  219. {
  220. unsigned long tmo = jiffies + msecs_to_jiffies(30);
  221. while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 4)) {
  222. if (time_after(jiffies, tmo)) {
  223. if (printk_ratelimit())
  224. dev_err(blizzard.fbdev->dev,
  225. "s1d1374x: YYC not ready\n");
  226. break;
  227. }
  228. }
  229. }
  230. static void disable_overlay(void)
  231. {
  232. blizzard_write_reg(BLIZZARD_DATA_SOURCE_SELECT,
  233. BLIZZARD_SRC_DISABLE_OVERLAY);
  234. }
  235. static void set_window_regs(int x_start, int y_start, int x_end, int y_end,
  236. int x_out_start, int y_out_start,
  237. int x_out_end, int y_out_end, int color_mode,
  238. int zoom_off, int flags)
  239. {
  240. u8 tmp[18];
  241. u8 cmd;
  242. x_end--;
  243. y_end--;
  244. tmp[0] = x_start;
  245. tmp[1] = x_start >> 8;
  246. tmp[2] = y_start;
  247. tmp[3] = y_start >> 8;
  248. tmp[4] = x_end;
  249. tmp[5] = x_end >> 8;
  250. tmp[6] = y_end;
  251. tmp[7] = y_end >> 8;
  252. x_out_end--;
  253. y_out_end--;
  254. tmp[8] = x_out_start;
  255. tmp[9] = x_out_start >> 8;
  256. tmp[10] = y_out_start;
  257. tmp[11] = y_out_start >> 8;
  258. tmp[12] = x_out_end;
  259. tmp[13] = x_out_end >> 8;
  260. tmp[14] = y_out_end;
  261. tmp[15] = y_out_end >> 8;
  262. tmp[16] = color_mode;
  263. if (zoom_off && blizzard.version == BLIZZARD_VERSION_S1D13745)
  264. tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
  265. else if (flags & OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY)
  266. tmp[17] = BLIZZARD_SRC_WRITE_OVERLAY_ENABLE;
  267. else
  268. tmp[17] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
  269. BLIZZARD_SRC_WRITE_LCD :
  270. BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
  271. blizzard.extif->set_bits_per_cycle(8);
  272. cmd = BLIZZARD_INPUT_WIN_X_START_0;
  273. blizzard.extif->write_command(&cmd, 1);
  274. blizzard.extif->write_data(tmp, 18);
  275. }
  276. static void enable_tearsync(int y, int width, int height, int screen_height,
  277. int out_height, int force_vsync)
  278. {
  279. u8 b;
  280. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  281. b |= 1 << 3;
  282. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  283. if (likely(blizzard.vsync_only || force_vsync)) {
  284. blizzard.extif->enable_tearsync(1, 0);
  285. return;
  286. }
  287. if (width * blizzard.pix_tx_time < blizzard.line_upd_time) {
  288. blizzard.extif->enable_tearsync(1, 0);
  289. return;
  290. }
  291. if ((width * blizzard.pix_tx_time / 1000) * height <
  292. (y + out_height) * (blizzard.line_upd_time / 1000)) {
  293. blizzard.extif->enable_tearsync(1, 0);
  294. return;
  295. }
  296. blizzard.extif->enable_tearsync(1, y + 1);
  297. }
  298. static void disable_tearsync(void)
  299. {
  300. u8 b;
  301. blizzard.extif->enable_tearsync(0, 0);
  302. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  303. b &= ~(1 << 3);
  304. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  305. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  306. }
  307. static inline void set_extif_timings(const struct extif_timings *t);
  308. static inline struct blizzard_request *alloc_req(void)
  309. {
  310. unsigned long flags;
  311. struct blizzard_request *req;
  312. int req_flags = 0;
  313. if (!in_interrupt())
  314. down(&blizzard.req_sema);
  315. else
  316. req_flags = REQ_FROM_IRQ_POOL;
  317. spin_lock_irqsave(&blizzard.req_lock, flags);
  318. BUG_ON(list_empty(&blizzard.free_req_list));
  319. req = list_entry(blizzard.free_req_list.next,
  320. struct blizzard_request, entry);
  321. list_del(&req->entry);
  322. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  323. INIT_LIST_HEAD(&req->entry);
  324. req->flags = req_flags;
  325. return req;
  326. }
  327. static inline void free_req(struct blizzard_request *req)
  328. {
  329. unsigned long flags;
  330. spin_lock_irqsave(&blizzard.req_lock, flags);
  331. list_del(&req->entry);
  332. list_add(&req->entry, &blizzard.free_req_list);
  333. if (!(req->flags & REQ_FROM_IRQ_POOL))
  334. up(&blizzard.req_sema);
  335. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  336. }
  337. static void process_pending_requests(void)
  338. {
  339. unsigned long flags;
  340. spin_lock_irqsave(&blizzard.req_lock, flags);
  341. while (!list_empty(&blizzard.pending_req_list)) {
  342. struct blizzard_request *req;
  343. void (*complete)(void *);
  344. void *complete_data;
  345. req = list_entry(blizzard.pending_req_list.next,
  346. struct blizzard_request, entry);
  347. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  348. if (req->handler(req) == REQ_PENDING)
  349. return;
  350. complete = req->complete;
  351. complete_data = req->complete_data;
  352. free_req(req);
  353. if (complete)
  354. complete(complete_data);
  355. spin_lock_irqsave(&blizzard.req_lock, flags);
  356. }
  357. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  358. }
  359. static void submit_req_list(struct list_head *head)
  360. {
  361. unsigned long flags;
  362. int process = 1;
  363. spin_lock_irqsave(&blizzard.req_lock, flags);
  364. if (likely(!list_empty(&blizzard.pending_req_list)))
  365. process = 0;
  366. list_splice_init(head, blizzard.pending_req_list.prev);
  367. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  368. if (process)
  369. process_pending_requests();
  370. }
  371. static void request_complete(void *data)
  372. {
  373. struct blizzard_request *req = (struct blizzard_request *)data;
  374. void (*complete)(void *);
  375. void *complete_data;
  376. complete = req->complete;
  377. complete_data = req->complete_data;
  378. free_req(req);
  379. if (complete)
  380. complete(complete_data);
  381. process_pending_requests();
  382. }
  383. static int do_full_screen_update(struct blizzard_request *req)
  384. {
  385. int i;
  386. int flags;
  387. for (i = 0; i < 3; i++) {
  388. struct plane_info *p = &blizzard.plane[i];
  389. if (!(blizzard.enabled_planes & (1 << i))) {
  390. blizzard.int_ctrl->enable_plane(i, 0);
  391. continue;
  392. }
  393. dev_dbg(blizzard.fbdev->dev, "pw %d ph %d\n",
  394. p->width, p->height);
  395. blizzard.int_ctrl->setup_plane(i,
  396. OMAPFB_CHANNEL_OUT_LCD, p->offset,
  397. p->scr_width, p->pos_x, p->pos_y,
  398. p->width, p->height,
  399. p->color_mode);
  400. blizzard.int_ctrl->enable_plane(i, 1);
  401. }
  402. dev_dbg(blizzard.fbdev->dev, "sw %d sh %d\n",
  403. blizzard.screen_width, blizzard.screen_height);
  404. blizzard_wait_line_buffer();
  405. flags = req->par.update.flags;
  406. if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
  407. enable_tearsync(0, blizzard.screen_width,
  408. blizzard.screen_height,
  409. blizzard.screen_height,
  410. blizzard.screen_height,
  411. flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
  412. else
  413. disable_tearsync();
  414. set_window_regs(0, 0, blizzard.screen_width, blizzard.screen_height,
  415. 0, 0, blizzard.screen_width, blizzard.screen_height,
  416. BLIZZARD_COLOR_RGB565, blizzard.zoom_on, flags);
  417. blizzard.zoom_on = 0;
  418. blizzard.extif->set_bits_per_cycle(16);
  419. /* set_window_regs has left the register index at the right
  420. * place, so no need to set it here.
  421. */
  422. blizzard.extif->transfer_area(blizzard.screen_width,
  423. blizzard.screen_height,
  424. request_complete, req);
  425. return REQ_PENDING;
  426. }
  427. /* Setup all planes with an overlapping area with the update window. */
  428. static int do_partial_update(struct blizzard_request *req, int plane,
  429. int x, int y, int w, int h,
  430. int x_out, int y_out, int w_out, int h_out,
  431. int wnd_color_mode, int bpp)
  432. {
  433. int i;
  434. int gx1, gy1, gx2, gy2;
  435. int gx1_out, gy1_out, gx2_out, gy2_out;
  436. int color_mode;
  437. int flags;
  438. int zoom_off;
  439. /* Global coordinates, relative to pixel 0,0 of the LCD */
  440. gx1 = x + blizzard.plane[plane].pos_x;
  441. gy1 = y + blizzard.plane[plane].pos_y;
  442. gx2 = gx1 + w;
  443. gy2 = gy1 + h;
  444. flags = req->par.update.flags;
  445. if (flags & OMAPFB_FORMAT_FLAG_DOUBLE) {
  446. gx1_out = gx1;
  447. gy1_out = gy1;
  448. gx2_out = gx1 + w * 2;
  449. gy2_out = gy1 + h * 2;
  450. } else {
  451. gx1_out = x_out + blizzard.plane[plane].pos_x;
  452. gy1_out = y_out + blizzard.plane[plane].pos_y;
  453. gx2_out = gx1_out + w_out;
  454. gy2_out = gy1_out + h_out;
  455. }
  456. zoom_off = blizzard.zoom_on && gx1 == 0 && gy1 == 0 &&
  457. w == blizzard.screen_width && h == blizzard.screen_height;
  458. blizzard.zoom_on = (!zoom_off && blizzard.zoom_on) ||
  459. (w < w_out || h < h_out);
  460. for (i = 0; i < OMAPFB_PLANE_NUM; i++) {
  461. struct plane_info *p = &blizzard.plane[i];
  462. int px1, py1;
  463. int px2, py2;
  464. int pw, ph;
  465. int pposx, pposy;
  466. unsigned long offset;
  467. if (!(blizzard.enabled_planes & (1 << i)) ||
  468. (wnd_color_mode && i != plane)) {
  469. blizzard.int_ctrl->enable_plane(i, 0);
  470. continue;
  471. }
  472. /* Plane coordinates */
  473. if (i == plane) {
  474. /* Plane in which we are doing the update.
  475. * Local coordinates are the one in the update
  476. * request.
  477. */
  478. px1 = x;
  479. py1 = y;
  480. px2 = x + w;
  481. py2 = y + h;
  482. pposx = 0;
  483. pposy = 0;
  484. } else {
  485. /* Check if this plane has an overlapping part */
  486. px1 = gx1 - p->pos_x;
  487. py1 = gy1 - p->pos_y;
  488. px2 = gx2 - p->pos_x;
  489. py2 = gy2 - p->pos_y;
  490. if (px1 >= p->width || py1 >= p->height ||
  491. px2 <= 0 || py2 <= 0) {
  492. blizzard.int_ctrl->enable_plane(i, 0);
  493. continue;
  494. }
  495. /* Calculate the coordinates for the overlapping
  496. * part in the plane's local coordinates.
  497. */
  498. pposx = -px1;
  499. pposy = -py1;
  500. if (px1 < 0)
  501. px1 = 0;
  502. if (py1 < 0)
  503. py1 = 0;
  504. if (px2 > p->width)
  505. px2 = p->width;
  506. if (py2 > p->height)
  507. py2 = p->height;
  508. if (pposx < 0)
  509. pposx = 0;
  510. if (pposy < 0)
  511. pposy = 0;
  512. }
  513. pw = px2 - px1;
  514. ph = py2 - py1;
  515. offset = p->offset + (p->scr_width * py1 + px1) * p->bpp / 8;
  516. if (wnd_color_mode)
  517. /* Window embedded in the plane with a differing
  518. * color mode / bpp. Calculate the number of DMA
  519. * transfer elements in terms of the plane's bpp.
  520. */
  521. pw = (pw + 1) * bpp / p->bpp;
  522. #ifdef VERBOSE
  523. dev_dbg(blizzard.fbdev->dev,
  524. "plane %d offset %#08lx pposx %d pposy %d "
  525. "px1 %d py1 %d pw %d ph %d\n",
  526. i, offset, pposx, pposy, px1, py1, pw, ph);
  527. #endif
  528. blizzard.int_ctrl->setup_plane(i,
  529. OMAPFB_CHANNEL_OUT_LCD, offset,
  530. p->scr_width,
  531. pposx, pposy, pw, ph,
  532. p->color_mode);
  533. blizzard.int_ctrl->enable_plane(i, 1);
  534. }
  535. switch (wnd_color_mode) {
  536. case OMAPFB_COLOR_YUV420:
  537. color_mode = BLIZZARD_COLOR_YUV420;
  538. /* Currently only the 16 bits/pixel cycle format is
  539. * supported on the external interface. Adjust the number
  540. * of transfer elements per line for 12bpp format.
  541. */
  542. w = (w + 1) * 3 / 4;
  543. break;
  544. default:
  545. color_mode = BLIZZARD_COLOR_RGB565;
  546. break;
  547. }
  548. blizzard_wait_line_buffer();
  549. if (blizzard.last_color_mode == BLIZZARD_COLOR_YUV420)
  550. blizzard_wait_yyc();
  551. blizzard.last_color_mode = color_mode;
  552. if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
  553. enable_tearsync(gy1, w, h,
  554. blizzard.screen_height,
  555. h_out,
  556. flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
  557. else
  558. disable_tearsync();
  559. set_window_regs(gx1, gy1, gx2, gy2, gx1_out, gy1_out, gx2_out, gy2_out,
  560. color_mode, zoom_off, flags);
  561. blizzard.extif->set_bits_per_cycle(16);
  562. /* set_window_regs has left the register index at the right
  563. * place, so no need to set it here.
  564. */
  565. blizzard.extif->transfer_area(w, h, request_complete, req);
  566. return REQ_PENDING;
  567. }
  568. static int send_frame_handler(struct blizzard_request *req)
  569. {
  570. struct update_param *par = &req->par.update;
  571. int plane = par->plane;
  572. #ifdef VERBOSE
  573. dev_dbg(blizzard.fbdev->dev,
  574. "send_frame: x %d y %d w %d h %d "
  575. "x_out %d y_out %d w_out %d h_out %d "
  576. "color_mode %04x flags %04x planes %01x\n",
  577. par->x, par->y, par->width, par->height,
  578. par->out_x, par->out_y, par->out_width, par->out_height,
  579. par->color_mode, par->flags, blizzard.enabled_planes);
  580. #endif
  581. if (par->flags & OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY)
  582. disable_overlay();
  583. if ((blizzard.enabled_planes & blizzard.vid_nonstd_color) ||
  584. (blizzard.enabled_planes & blizzard.vid_scaled))
  585. return do_full_screen_update(req);
  586. return do_partial_update(req, plane, par->x, par->y,
  587. par->width, par->height,
  588. par->out_x, par->out_y,
  589. par->out_width, par->out_height,
  590. par->color_mode, par->bpp);
  591. }
  592. static void send_frame_complete(void *data)
  593. {
  594. }
  595. #define ADD_PREQ(_x, _y, _w, _h, _x_out, _y_out, _w_out, _h_out) do { \
  596. req = alloc_req(); \
  597. req->handler = send_frame_handler; \
  598. req->complete = send_frame_complete; \
  599. req->par.update.plane = plane_idx; \
  600. req->par.update.x = _x; \
  601. req->par.update.y = _y; \
  602. req->par.update.width = _w; \
  603. req->par.update.height = _h; \
  604. req->par.update.out_x = _x_out; \
  605. req->par.update.out_y = _y_out; \
  606. req->par.update.out_width = _w_out; \
  607. req->par.update.out_height = _h_out; \
  608. req->par.update.bpp = bpp; \
  609. req->par.update.color_mode = color_mode;\
  610. req->par.update.flags = flags; \
  611. list_add_tail(&req->entry, req_head); \
  612. } while(0)
  613. static void create_req_list(int plane_idx,
  614. struct omapfb_update_window *win,
  615. struct list_head *req_head)
  616. {
  617. struct blizzard_request *req;
  618. int x = win->x;
  619. int y = win->y;
  620. int width = win->width;
  621. int height = win->height;
  622. int x_out = win->out_x;
  623. int y_out = win->out_y;
  624. int width_out = win->out_width;
  625. int height_out = win->out_height;
  626. int color_mode;
  627. int bpp;
  628. int flags;
  629. unsigned int ystart = y;
  630. unsigned int yspan = height;
  631. unsigned int ystart_out = y_out;
  632. unsigned int yspan_out = height_out;
  633. flags = win->format & ~OMAPFB_FORMAT_MASK;
  634. color_mode = win->format & OMAPFB_FORMAT_MASK;
  635. switch (color_mode) {
  636. case OMAPFB_COLOR_YUV420:
  637. /* Embedded window with different color mode */
  638. bpp = 12;
  639. /* X, Y, height must be aligned at 2, width at 4 pixels */
  640. x &= ~1;
  641. y &= ~1;
  642. height = yspan = height & ~1;
  643. width = width & ~3;
  644. break;
  645. default:
  646. /* Same as the plane color mode */
  647. bpp = blizzard.plane[plane_idx].bpp;
  648. break;
  649. }
  650. if (width * height * bpp / 8 > blizzard.max_transmit_size) {
  651. yspan = blizzard.max_transmit_size / (width * bpp / 8);
  652. yspan_out = yspan * height_out / height;
  653. ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
  654. width_out, yspan_out);
  655. ystart += yspan;
  656. ystart_out += yspan_out;
  657. yspan = height - yspan;
  658. yspan_out = height_out - yspan_out;
  659. flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
  660. }
  661. ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
  662. width_out, yspan_out);
  663. }
  664. static void auto_update_complete(void *data)
  665. {
  666. if (!blizzard.stop_auto_update)
  667. mod_timer(&blizzard.auto_update_timer,
  668. jiffies + BLIZZARD_AUTO_UPDATE_TIME);
  669. }
  670. static void blizzard_update_window_auto(unsigned long arg)
  671. {
  672. LIST_HEAD(req_list);
  673. struct blizzard_request *last;
  674. struct omapfb_plane_struct *plane;
  675. plane = blizzard.fbdev->fb_info[0]->par;
  676. create_req_list(plane->idx,
  677. &blizzard.auto_update_window, &req_list);
  678. last = list_entry(req_list.prev, struct blizzard_request, entry);
  679. last->complete = auto_update_complete;
  680. last->complete_data = NULL;
  681. submit_req_list(&req_list);
  682. }
  683. int blizzard_update_window_async(struct fb_info *fbi,
  684. struct omapfb_update_window *win,
  685. void (*complete_callback)(void *arg),
  686. void *complete_callback_data)
  687. {
  688. LIST_HEAD(req_list);
  689. struct blizzard_request *last;
  690. struct omapfb_plane_struct *plane = fbi->par;
  691. if (unlikely(blizzard.update_mode != OMAPFB_MANUAL_UPDATE))
  692. return -EINVAL;
  693. if (unlikely(!blizzard.te_connected &&
  694. (win->format & OMAPFB_FORMAT_FLAG_TEARSYNC)))
  695. return -EINVAL;
  696. create_req_list(plane->idx, win, &req_list);
  697. last = list_entry(req_list.prev, struct blizzard_request, entry);
  698. last->complete = complete_callback;
  699. last->complete_data = (void *)complete_callback_data;
  700. submit_req_list(&req_list);
  701. return 0;
  702. }
  703. EXPORT_SYMBOL(blizzard_update_window_async);
  704. static int update_full_screen(void)
  705. {
  706. return blizzard_update_window_async(blizzard.fbdev->fb_info[0],
  707. &blizzard.auto_update_window, NULL, NULL);
  708. }
  709. static int blizzard_setup_plane(int plane, int channel_out,
  710. unsigned long offset, int screen_width,
  711. int pos_x, int pos_y, int width, int height,
  712. int color_mode)
  713. {
  714. struct plane_info *p;
  715. #ifdef VERBOSE
  716. dev_dbg(blizzard.fbdev->dev,
  717. "plane %d ch_out %d offset %#08lx scr_width %d "
  718. "pos_x %d pos_y %d width %d height %d color_mode %d\n",
  719. plane, channel_out, offset, screen_width,
  720. pos_x, pos_y, width, height, color_mode);
  721. #endif
  722. if ((unsigned)plane > OMAPFB_PLANE_NUM)
  723. return -EINVAL;
  724. p = &blizzard.plane[plane];
  725. switch (color_mode) {
  726. case OMAPFB_COLOR_YUV422:
  727. case OMAPFB_COLOR_YUY422:
  728. p->bpp = 16;
  729. blizzard.vid_nonstd_color &= ~(1 << plane);
  730. break;
  731. case OMAPFB_COLOR_YUV420:
  732. p->bpp = 12;
  733. blizzard.vid_nonstd_color |= 1 << plane;
  734. break;
  735. case OMAPFB_COLOR_RGB565:
  736. p->bpp = 16;
  737. blizzard.vid_nonstd_color &= ~(1 << plane);
  738. break;
  739. default:
  740. return -EINVAL;
  741. }
  742. p->offset = offset;
  743. p->pos_x = pos_x;
  744. p->pos_y = pos_y;
  745. p->width = width;
  746. p->height = height;
  747. p->scr_width = screen_width;
  748. if (!p->out_width)
  749. p->out_width = width;
  750. if (!p->out_height)
  751. p->out_height = height;
  752. p->color_mode = color_mode;
  753. return 0;
  754. }
  755. static int blizzard_set_scale(int plane, int orig_w, int orig_h,
  756. int out_w, int out_h)
  757. {
  758. struct plane_info *p = &blizzard.plane[plane];
  759. int r;
  760. dev_dbg(blizzard.fbdev->dev,
  761. "plane %d orig_w %d orig_h %d out_w %d out_h %d\n",
  762. plane, orig_w, orig_h, out_w, out_h);
  763. if ((unsigned)plane > OMAPFB_PLANE_NUM)
  764. return -ENODEV;
  765. r = blizzard.int_ctrl->set_scale(plane, orig_w, orig_h, out_w, out_h);
  766. if (r < 0)
  767. return r;
  768. p->width = orig_w;
  769. p->height = orig_h;
  770. p->out_width = out_w;
  771. p->out_height = out_h;
  772. if (orig_w == out_w && orig_h == out_h)
  773. blizzard.vid_scaled &= ~(1 << plane);
  774. else
  775. blizzard.vid_scaled |= 1 << plane;
  776. return 0;
  777. }
  778. static int blizzard_enable_plane(int plane, int enable)
  779. {
  780. if (enable)
  781. blizzard.enabled_planes |= 1 << plane;
  782. else
  783. blizzard.enabled_planes &= ~(1 << plane);
  784. return 0;
  785. }
  786. static int sync_handler(struct blizzard_request *req)
  787. {
  788. complete(req->par.sync);
  789. return REQ_COMPLETE;
  790. }
  791. static void blizzard_sync(void)
  792. {
  793. LIST_HEAD(req_list);
  794. struct blizzard_request *req;
  795. struct completion comp;
  796. req = alloc_req();
  797. req->handler = sync_handler;
  798. req->complete = NULL;
  799. init_completion(&comp);
  800. req->par.sync = &comp;
  801. list_add(&req->entry, &req_list);
  802. submit_req_list(&req_list);
  803. wait_for_completion(&comp);
  804. }
  805. static void blizzard_bind_client(struct omapfb_notifier_block *nb)
  806. {
  807. if (blizzard.update_mode == OMAPFB_MANUAL_UPDATE) {
  808. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
  809. }
  810. }
  811. static int blizzard_set_update_mode(enum omapfb_update_mode mode)
  812. {
  813. if (unlikely(mode != OMAPFB_MANUAL_UPDATE &&
  814. mode != OMAPFB_AUTO_UPDATE &&
  815. mode != OMAPFB_UPDATE_DISABLED))
  816. return -EINVAL;
  817. if (mode == blizzard.update_mode)
  818. return 0;
  819. dev_info(blizzard.fbdev->dev, "s1d1374x: setting update mode to %s\n",
  820. mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
  821. (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
  822. switch (blizzard.update_mode) {
  823. case OMAPFB_MANUAL_UPDATE:
  824. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_DISABLED);
  825. break;
  826. case OMAPFB_AUTO_UPDATE:
  827. blizzard.stop_auto_update = 1;
  828. del_timer_sync(&blizzard.auto_update_timer);
  829. break;
  830. case OMAPFB_UPDATE_DISABLED:
  831. break;
  832. }
  833. blizzard.update_mode = mode;
  834. blizzard_sync();
  835. blizzard.stop_auto_update = 0;
  836. switch (mode) {
  837. case OMAPFB_MANUAL_UPDATE:
  838. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
  839. break;
  840. case OMAPFB_AUTO_UPDATE:
  841. blizzard_update_window_auto(0);
  842. break;
  843. case OMAPFB_UPDATE_DISABLED:
  844. break;
  845. }
  846. return 0;
  847. }
  848. static enum omapfb_update_mode blizzard_get_update_mode(void)
  849. {
  850. return blizzard.update_mode;
  851. }
  852. static inline void set_extif_timings(const struct extif_timings *t)
  853. {
  854. blizzard.extif->set_timings(t);
  855. }
  856. static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
  857. {
  858. int bus_tick = blizzard.extif_clk_period * div;
  859. return (ps + bus_tick - 1) / bus_tick * bus_tick;
  860. }
  861. static int calc_reg_timing(unsigned long sysclk, int div)
  862. {
  863. struct extif_timings *t;
  864. unsigned long systim;
  865. /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
  866. * AccessTime 2 ns + 12.2 ns (regs),
  867. * WEOffTime = WEOnTime + 1 ns,
  868. * REOffTime = REOnTime + 12 ns (regs),
  869. * CSOffTime = REOffTime + 1 ns
  870. * ReadCycle = 2ns + 2*SYSCLK (regs),
  871. * WriteCycle = 2*SYSCLK + 2 ns,
  872. * CSPulseWidth = 10 ns */
  873. systim = 1000000000 / (sysclk / 1000);
  874. dev_dbg(blizzard.fbdev->dev,
  875. "Blizzard systim %lu ps extif_clk_period %u div %d\n",
  876. systim, blizzard.extif_clk_period, div);
  877. t = &blizzard.reg_timings;
  878. memset(t, 0, sizeof(*t));
  879. t->clk_div = div;
  880. t->cs_on_time = 0;
  881. t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  882. t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  883. t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
  884. t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
  885. t->re_off_time = round_to_extif_ticks(t->re_on_time + 13000, div);
  886. t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
  887. t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  888. if (t->we_cycle_time < t->we_off_time)
  889. t->we_cycle_time = t->we_off_time;
  890. t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  891. if (t->re_cycle_time < t->re_off_time)
  892. t->re_cycle_time = t->re_off_time;
  893. t->cs_pulse_width = 0;
  894. dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
  895. t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
  896. dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
  897. t->we_on_time, t->we_off_time, t->re_cycle_time,
  898. t->we_cycle_time);
  899. dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
  900. t->access_time, t->cs_pulse_width);
  901. return blizzard.extif->convert_timings(t);
  902. }
  903. static int calc_lut_timing(unsigned long sysclk, int div)
  904. {
  905. struct extif_timings *t;
  906. unsigned long systim;
  907. /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
  908. * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
  909. * WEOffTime = WEOnTime + 1 ns,
  910. * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
  911. * CSOffTime = REOffTime + 1 ns
  912. * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
  913. * WriteCycle = 2*SYSCLK + 2 ns,
  914. * CSPulseWidth = 10 ns */
  915. systim = 1000000000 / (sysclk / 1000);
  916. dev_dbg(blizzard.fbdev->dev,
  917. "Blizzard systim %lu ps extif_clk_period %u div %d\n",
  918. systim, blizzard.extif_clk_period, div);
  919. t = &blizzard.lut_timings;
  920. memset(t, 0, sizeof(*t));
  921. t->clk_div = div;
  922. t->cs_on_time = 0;
  923. t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  924. t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  925. t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
  926. 26000, div);
  927. t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
  928. t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
  929. 26000, div);
  930. t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
  931. t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  932. if (t->we_cycle_time < t->we_off_time)
  933. t->we_cycle_time = t->we_off_time;
  934. t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
  935. if (t->re_cycle_time < t->re_off_time)
  936. t->re_cycle_time = t->re_off_time;
  937. t->cs_pulse_width = 0;
  938. dev_dbg(blizzard.fbdev->dev,
  939. "[lut]cson %d csoff %d reon %d reoff %d\n",
  940. t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
  941. dev_dbg(blizzard.fbdev->dev,
  942. "[lut]weon %d weoff %d recyc %d wecyc %d\n",
  943. t->we_on_time, t->we_off_time, t->re_cycle_time,
  944. t->we_cycle_time);
  945. dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
  946. t->access_time, t->cs_pulse_width);
  947. return blizzard.extif->convert_timings(t);
  948. }
  949. static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div)
  950. {
  951. int max_clk_div;
  952. int div;
  953. blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div);
  954. for (div = 1; div <= max_clk_div; div++) {
  955. if (calc_reg_timing(sysclk, div) == 0)
  956. break;
  957. }
  958. if (div > max_clk_div) {
  959. dev_dbg(blizzard.fbdev->dev, "reg timing failed\n");
  960. goto err;
  961. }
  962. *extif_mem_div = div;
  963. for (div = 1; div <= max_clk_div; div++) {
  964. if (calc_lut_timing(sysclk, div) == 0)
  965. break;
  966. }
  967. if (div > max_clk_div)
  968. goto err;
  969. blizzard.extif_clk_div = div;
  970. return 0;
  971. err:
  972. dev_err(blizzard.fbdev->dev, "can't setup timings\n");
  973. return -1;
  974. }
  975. static void calc_blizzard_clk_rates(unsigned long ext_clk,
  976. unsigned long *sys_clk, unsigned long *pix_clk)
  977. {
  978. int pix_clk_src;
  979. int sys_div = 0, sys_mul = 0;
  980. int pix_div;
  981. pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC);
  982. pix_div = ((pix_clk_src >> 3) & 0x1f) + 1;
  983. if ((pix_clk_src & (0x3 << 1)) == 0) {
  984. /* Source is the PLL */
  985. sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1;
  986. sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0);
  987. sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1)
  988. & 0x0f) << 11);
  989. *sys_clk = ext_clk * sys_mul / sys_div;
  990. } else /* else source is ext clk, or oscillator */
  991. *sys_clk = ext_clk;
  992. *pix_clk = *sys_clk / pix_div; /* HZ */
  993. dev_dbg(blizzard.fbdev->dev,
  994. "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n",
  995. ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul);
  996. dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
  997. *sys_clk, *pix_clk);
  998. }
  999. static int setup_tearsync(unsigned long pix_clk, int extif_div)
  1000. {
  1001. int hdisp, vdisp;
  1002. int hndp, vndp;
  1003. int hsw, vsw;
  1004. int hs, vs;
  1005. int hs_pol_inv, vs_pol_inv;
  1006. int use_hsvs, use_ndp;
  1007. u8 b;
  1008. hsw = blizzard_read_reg(BLIZZARD_HSW);
  1009. vsw = blizzard_read_reg(BLIZZARD_VSW);
  1010. hs_pol_inv = !(hsw & 0x80);
  1011. vs_pol_inv = !(vsw & 0x80);
  1012. hsw = hsw & 0x7f;
  1013. vsw = vsw & 0x3f;
  1014. hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8;
  1015. vdisp = blizzard_read_reg(BLIZZARD_VDISP0) +
  1016. ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8);
  1017. hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f;
  1018. vndp = blizzard_read_reg(BLIZZARD_VNDP);
  1019. /* time to transfer one pixel (16bpp) in ps */
  1020. blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time;
  1021. if (blizzard.extif->get_max_tx_rate != NULL) {
  1022. /* The external interface might have a rate limitation,
  1023. * if so, we have to maximize our transfer rate.
  1024. */
  1025. unsigned long min_tx_time;
  1026. unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate();
  1027. dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n",
  1028. max_tx_rate);
  1029. min_tx_time = 1000000000 / (max_tx_rate / 1000); /* ps */
  1030. if (blizzard.pix_tx_time < min_tx_time)
  1031. blizzard.pix_tx_time = min_tx_time;
  1032. }
  1033. /* time to update one line in ps */
  1034. blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
  1035. blizzard.line_upd_time *= 1000;
  1036. if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time)
  1037. /* transfer speed too low, we might have to use both
  1038. * HS and VS */
  1039. use_hsvs = 1;
  1040. else
  1041. /* decent transfer speed, we'll always use only VS */
  1042. use_hsvs = 0;
  1043. if (use_hsvs && (hs_pol_inv || vs_pol_inv)) {
  1044. /* HS or'ed with VS doesn't work, use the active high
  1045. * TE signal based on HNDP / VNDP */
  1046. use_ndp = 1;
  1047. hs_pol_inv = 0;
  1048. vs_pol_inv = 0;
  1049. hs = hndp;
  1050. vs = vndp;
  1051. } else {
  1052. /* Use HS or'ed with VS as a TE signal if both are needed
  1053. * or VNDP if only vsync is needed. */
  1054. use_ndp = 0;
  1055. hs = hsw;
  1056. vs = vsw;
  1057. if (!use_hsvs) {
  1058. hs_pol_inv = 0;
  1059. vs_pol_inv = 0;
  1060. }
  1061. }
  1062. hs = hs * 1000000 / (pix_clk / 1000); /* ps */
  1063. hs *= 1000;
  1064. vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */
  1065. vs *= 1000;
  1066. if (vs <= hs)
  1067. return -EDOM;
  1068. /* set VS to 120% of HS to minimize VS detection time */
  1069. vs = hs * 12 / 10;
  1070. /* minimize HS too */
  1071. if (hs > 10000)
  1072. hs = 10000;
  1073. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  1074. b &= ~0x3;
  1075. b |= use_hsvs ? 1 : 0;
  1076. b |= (use_ndp && use_hsvs) ? 0 : 2;
  1077. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  1078. blizzard.vsync_only = !use_hsvs;
  1079. dev_dbg(blizzard.fbdev->dev,
  1080. "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n",
  1081. pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time);
  1082. dev_dbg(blizzard.fbdev->dev,
  1083. "hs %d ps vs %d ps mode %d vsync_only %d\n",
  1084. hs, vs, b & 0x3, !use_hsvs);
  1085. return blizzard.extif->setup_tearsync(1, hs, vs,
  1086. hs_pol_inv, vs_pol_inv,
  1087. extif_div);
  1088. }
  1089. static void blizzard_get_caps(int plane, struct omapfb_caps *caps)
  1090. {
  1091. blizzard.int_ctrl->get_caps(plane, caps);
  1092. caps->ctrl |= OMAPFB_CAPS_MANUAL_UPDATE |
  1093. OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE |
  1094. OMAPFB_CAPS_WINDOW_SCALE |
  1095. OMAPFB_CAPS_WINDOW_OVERLAY;
  1096. if (blizzard.te_connected)
  1097. caps->ctrl |= OMAPFB_CAPS_TEARSYNC;
  1098. caps->wnd_color |= (1 << OMAPFB_COLOR_RGB565) |
  1099. (1 << OMAPFB_COLOR_YUV420);
  1100. }
  1101. static void _save_regs(struct blizzard_reg_list *list, int cnt)
  1102. {
  1103. int i;
  1104. for (i = 0; i < cnt; i++, list++) {
  1105. int reg;
  1106. for (reg = list->start; reg <= list->end; reg += 2)
  1107. blizzard_reg_cache[reg / 2] = blizzard_read_reg(reg);
  1108. }
  1109. }
  1110. static void _restore_regs(struct blizzard_reg_list *list, int cnt)
  1111. {
  1112. int i;
  1113. for (i = 0; i < cnt; i++, list++) {
  1114. int reg;
  1115. for (reg = list->start; reg <= list->end; reg += 2)
  1116. blizzard_write_reg(reg, blizzard_reg_cache[reg / 2]);
  1117. }
  1118. }
  1119. static void blizzard_save_all_regs(void)
  1120. {
  1121. _save_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
  1122. _save_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
  1123. }
  1124. static void blizzard_restore_pll_regs(void)
  1125. {
  1126. _restore_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
  1127. }
  1128. static void blizzard_restore_gen_regs(void)
  1129. {
  1130. _restore_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
  1131. }
  1132. static void blizzard_suspend(void)
  1133. {
  1134. u32 l;
  1135. unsigned long tmo;
  1136. if (blizzard.last_color_mode) {
  1137. update_full_screen();
  1138. blizzard_sync();
  1139. }
  1140. blizzard.update_mode_before_suspend = blizzard.update_mode;
  1141. /* the following will disable clocks as well */
  1142. blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
  1143. blizzard_save_all_regs();
  1144. blizzard_stop_sdram();
  1145. l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
  1146. /* Standby, Sleep. We assume we use an external clock. */
  1147. l |= 0x03;
  1148. blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
  1149. tmo = jiffies + msecs_to_jiffies(100);
  1150. while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) {
  1151. if (time_after(jiffies, tmo)) {
  1152. dev_err(blizzard.fbdev->dev,
  1153. "s1d1374x: sleep timeout, stopping PLL manually\n");
  1154. l = blizzard_read_reg(BLIZZARD_PLL_MODE);
  1155. l &= ~0x03;
  1156. /* Disable PLL, counter function */
  1157. l |= 0x2;
  1158. blizzard_write_reg(BLIZZARD_PLL_MODE, l);
  1159. break;
  1160. }
  1161. msleep(1);
  1162. }
  1163. if (blizzard.power_down != NULL)
  1164. blizzard.power_down(blizzard.fbdev->dev);
  1165. }
  1166. static void blizzard_resume(void)
  1167. {
  1168. u32 l;
  1169. if (blizzard.power_up != NULL)
  1170. blizzard.power_up(blizzard.fbdev->dev);
  1171. l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
  1172. /* Standby, Sleep */
  1173. l &= ~0x03;
  1174. blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
  1175. blizzard_restore_pll_regs();
  1176. l = blizzard_read_reg(BLIZZARD_PLL_MODE);
  1177. l &= ~0x03;
  1178. /* Enable PLL, counter function */
  1179. l |= 0x1;
  1180. blizzard_write_reg(BLIZZARD_PLL_MODE, l);
  1181. while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7)))
  1182. msleep(1);
  1183. blizzard_restart_sdram();
  1184. blizzard_restore_gen_regs();
  1185. /* Enable display */
  1186. blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01);
  1187. /* the following will enable clocks as necessary */
  1188. blizzard_set_update_mode(blizzard.update_mode_before_suspend);
  1189. /* Force a background update */
  1190. blizzard.zoom_on = 1;
  1191. update_full_screen();
  1192. blizzard_sync();
  1193. }
  1194. static int blizzard_init(struct omapfb_device *fbdev, int ext_mode,
  1195. struct omapfb_mem_desc *req_vram)
  1196. {
  1197. int r = 0, i;
  1198. u8 rev, conf;
  1199. unsigned long ext_clk;
  1200. int extif_div;
  1201. unsigned long sys_clk, pix_clk;
  1202. struct omapfb_platform_data *omapfb_conf;
  1203. struct blizzard_platform_data *ctrl_conf;
  1204. blizzard.fbdev = fbdev;
  1205. BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
  1206. blizzard.fbdev = fbdev;
  1207. blizzard.extif = fbdev->ext_if;
  1208. blizzard.int_ctrl = fbdev->int_ctrl;
  1209. omapfb_conf = fbdev->dev->platform_data;
  1210. ctrl_conf = omapfb_conf->ctrl_platform_data;
  1211. if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
  1212. dev_err(fbdev->dev, "s1d1374x: missing platform data\n");
  1213. r = -ENOENT;
  1214. goto err1;
  1215. }
  1216. blizzard.power_down = ctrl_conf->power_down;
  1217. blizzard.power_up = ctrl_conf->power_up;
  1218. spin_lock_init(&blizzard.req_lock);
  1219. if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0)
  1220. goto err1;
  1221. if ((r = blizzard.extif->init(fbdev)) < 0)
  1222. goto err2;
  1223. blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key;
  1224. blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key;
  1225. blizzard_ctrl.setup_mem = blizzard.int_ctrl->setup_mem;
  1226. blizzard_ctrl.mmap = blizzard.int_ctrl->mmap;
  1227. ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
  1228. if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0)
  1229. goto err3;
  1230. set_extif_timings(&blizzard.reg_timings);
  1231. if (blizzard.power_up != NULL)
  1232. blizzard.power_up(fbdev->dev);
  1233. calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk);
  1234. if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0)
  1235. goto err3;
  1236. set_extif_timings(&blizzard.reg_timings);
  1237. if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) {
  1238. dev_err(fbdev->dev,
  1239. "controller not initialized by the bootloader\n");
  1240. r = -ENODEV;
  1241. goto err3;
  1242. }
  1243. if (ctrl_conf->te_connected) {
  1244. if ((r = setup_tearsync(pix_clk, extif_div)) < 0)
  1245. goto err3;
  1246. blizzard.te_connected = 1;
  1247. }
  1248. rev = blizzard_read_reg(BLIZZARD_REV_CODE);
  1249. conf = blizzard_read_reg(BLIZZARD_CONFIG);
  1250. switch (rev & 0xfc) {
  1251. case 0x9c:
  1252. blizzard.version = BLIZZARD_VERSION_S1D13744;
  1253. pr_info("omapfb: s1d13744 LCD controller rev %d "
  1254. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  1255. break;
  1256. case 0xa4:
  1257. blizzard.version = BLIZZARD_VERSION_S1D13745;
  1258. pr_info("omapfb: s1d13745 LCD controller rev %d "
  1259. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  1260. break;
  1261. default:
  1262. dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n",
  1263. rev);
  1264. r = -ENODEV;
  1265. goto err3;
  1266. }
  1267. blizzard.max_transmit_size = blizzard.extif->max_transmit_size;
  1268. blizzard.update_mode = OMAPFB_UPDATE_DISABLED;
  1269. blizzard.auto_update_window.x = 0;
  1270. blizzard.auto_update_window.y = 0;
  1271. blizzard.auto_update_window.width = fbdev->panel->x_res;
  1272. blizzard.auto_update_window.height = fbdev->panel->y_res;
  1273. blizzard.auto_update_window.out_x = 0;
  1274. blizzard.auto_update_window.out_x = 0;
  1275. blizzard.auto_update_window.out_width = fbdev->panel->x_res;
  1276. blizzard.auto_update_window.out_height = fbdev->panel->y_res;
  1277. blizzard.auto_update_window.format = 0;
  1278. blizzard.screen_width = fbdev->panel->x_res;
  1279. blizzard.screen_height = fbdev->panel->y_res;
  1280. init_timer(&blizzard.auto_update_timer);
  1281. blizzard.auto_update_timer.function = blizzard_update_window_auto;
  1282. blizzard.auto_update_timer.data = 0;
  1283. INIT_LIST_HEAD(&blizzard.free_req_list);
  1284. INIT_LIST_HEAD(&blizzard.pending_req_list);
  1285. for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++)
  1286. list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list);
  1287. BUG_ON(i <= IRQ_REQ_POOL_SIZE);
  1288. sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE);
  1289. return 0;
  1290. err3:
  1291. if (blizzard.power_down != NULL)
  1292. blizzard.power_down(fbdev->dev);
  1293. blizzard.extif->cleanup();
  1294. err2:
  1295. blizzard.int_ctrl->cleanup();
  1296. err1:
  1297. return r;
  1298. }
  1299. static void blizzard_cleanup(void)
  1300. {
  1301. blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
  1302. blizzard.extif->cleanup();
  1303. blizzard.int_ctrl->cleanup();
  1304. if (blizzard.power_down != NULL)
  1305. blizzard.power_down(blizzard.fbdev->dev);
  1306. }
  1307. struct lcd_ctrl blizzard_ctrl = {
  1308. .name = "blizzard",
  1309. .init = blizzard_init,
  1310. .cleanup = blizzard_cleanup,
  1311. .bind_client = blizzard_bind_client,
  1312. .get_caps = blizzard_get_caps,
  1313. .set_update_mode = blizzard_set_update_mode,
  1314. .get_update_mode = blizzard_get_update_mode,
  1315. .setup_plane = blizzard_setup_plane,
  1316. .set_scale = blizzard_set_scale,
  1317. .enable_plane = blizzard_enable_plane,
  1318. .update_window = blizzard_update_window_async,
  1319. .sync = blizzard_sync,
  1320. .suspend = blizzard_suspend,
  1321. .resume = blizzard_resume,
  1322. };