gxfb_core.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546
  1. /*
  2. * Geode GX framebuffer driver.
  3. *
  4. * Copyright (C) 2006 Arcom Control Systems Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. *
  12. * This driver assumes that the BIOS has created a virtual PCI device header
  13. * for the video device. The PCI header is assumed to contain the following
  14. * BARs:
  15. *
  16. * BAR0 - framebuffer memory
  17. * BAR1 - graphics processor registers
  18. * BAR2 - display controller registers
  19. * BAR3 - video processor and flat panel control registers.
  20. *
  21. * 16 MiB of framebuffer memory is assumed to be available.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/kernel.h>
  25. #include <linux/errno.h>
  26. #include <linux/string.h>
  27. #include <linux/mm.h>
  28. #include <linux/slab.h>
  29. #include <linux/delay.h>
  30. #include <linux/fb.h>
  31. #include <linux/console.h>
  32. #include <linux/suspend.h>
  33. #include <linux/init.h>
  34. #include <linux/pci.h>
  35. #include <asm/geode.h>
  36. #include "gxfb.h"
  37. static char *mode_option;
  38. static int vram;
  39. static int vt_switch;
  40. /* Modes relevant to the GX (taken from modedb.c) */
  41. static struct fb_videomode gx_modedb[] __initdata = {
  42. /* 640x480-60 VESA */
  43. { NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
  44. 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  45. /* 640x480-75 VESA */
  46. { NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
  47. 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  48. /* 640x480-85 VESA */
  49. { NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
  50. 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  51. /* 800x600-60 VESA */
  52. { NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
  53. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  54. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  55. /* 800x600-75 VESA */
  56. { NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
  57. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  58. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  59. /* 800x600-85 VESA */
  60. { NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
  61. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  62. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  63. /* 1024x768-60 VESA */
  64. { NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
  65. 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  66. /* 1024x768-75 VESA */
  67. { NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
  68. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  69. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  70. /* 1024x768-85 VESA */
  71. { NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
  72. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  73. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  74. /* 1280x960-60 VESA */
  75. { NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
  76. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  77. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  78. /* 1280x960-85 VESA */
  79. { NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
  80. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  81. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  82. /* 1280x1024-60 VESA */
  83. { NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
  84. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  85. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  86. /* 1280x1024-75 VESA */
  87. { NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
  88. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  89. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  90. /* 1280x1024-85 VESA */
  91. { NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
  92. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  93. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  94. /* 1600x1200-60 VESA */
  95. { NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
  96. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  97. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  98. /* 1600x1200-75 VESA */
  99. { NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
  100. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  101. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  102. /* 1600x1200-85 VESA */
  103. { NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
  104. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  105. FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
  106. };
  107. #ifdef CONFIG_OLPC
  108. #include <asm/olpc.h>
  109. static struct fb_videomode gx_dcon_modedb[] __initdata = {
  110. /* The only mode the DCON has is 1200x900 */
  111. { NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
  112. FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  113. FB_VMODE_NONINTERLACED, 0 }
  114. };
  115. static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
  116. {
  117. if (olpc_has_dcon()) {
  118. *modedb = (struct fb_videomode *) gx_dcon_modedb;
  119. *size = ARRAY_SIZE(gx_dcon_modedb);
  120. } else {
  121. *modedb = (struct fb_videomode *) gx_modedb;
  122. *size = ARRAY_SIZE(gx_modedb);
  123. }
  124. }
  125. #else
  126. static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
  127. {
  128. *modedb = (struct fb_videomode *) gx_modedb;
  129. *size = ARRAY_SIZE(gx_modedb);
  130. }
  131. #endif
  132. static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  133. {
  134. if (var->xres > 1600 || var->yres > 1200)
  135. return -EINVAL;
  136. if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
  137. return -EINVAL;
  138. if (var->bits_per_pixel == 32) {
  139. var->red.offset = 16; var->red.length = 8;
  140. var->green.offset = 8; var->green.length = 8;
  141. var->blue.offset = 0; var->blue.length = 8;
  142. } else if (var->bits_per_pixel == 16) {
  143. var->red.offset = 11; var->red.length = 5;
  144. var->green.offset = 5; var->green.length = 6;
  145. var->blue.offset = 0; var->blue.length = 5;
  146. } else if (var->bits_per_pixel == 8) {
  147. var->red.offset = 0; var->red.length = 8;
  148. var->green.offset = 0; var->green.length = 8;
  149. var->blue.offset = 0; var->blue.length = 8;
  150. } else
  151. return -EINVAL;
  152. var->transp.offset = 0; var->transp.length = 0;
  153. /* Enough video memory? */
  154. if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
  155. return -EINVAL;
  156. /* FIXME: Check timing parameters here? */
  157. return 0;
  158. }
  159. static int gxfb_set_par(struct fb_info *info)
  160. {
  161. if (info->var.bits_per_pixel > 8) {
  162. info->fix.visual = FB_VISUAL_TRUECOLOR;
  163. fb_dealloc_cmap(&info->cmap);
  164. } else {
  165. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  166. fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
  167. }
  168. info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
  169. gx_set_mode(info);
  170. return 0;
  171. }
  172. static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
  173. {
  174. chan &= 0xffff;
  175. chan >>= 16 - bf->length;
  176. return chan << bf->offset;
  177. }
  178. static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
  179. unsigned blue, unsigned transp,
  180. struct fb_info *info)
  181. {
  182. if (info->var.grayscale) {
  183. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  184. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  185. }
  186. /* Truecolor has hardware independent palette */
  187. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  188. u32 *pal = info->pseudo_palette;
  189. u32 v;
  190. if (regno >= 16)
  191. return -EINVAL;
  192. v = chan_to_field(red, &info->var.red);
  193. v |= chan_to_field(green, &info->var.green);
  194. v |= chan_to_field(blue, &info->var.blue);
  195. pal[regno] = v;
  196. } else {
  197. if (regno >= 256)
  198. return -EINVAL;
  199. gx_set_hw_palette_reg(info, regno, red, green, blue);
  200. }
  201. return 0;
  202. }
  203. static int gxfb_blank(int blank_mode, struct fb_info *info)
  204. {
  205. return gx_blank_display(info, blank_mode);
  206. }
  207. static int __init gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
  208. {
  209. struct gxfb_par *par = info->par;
  210. int ret;
  211. ret = pci_enable_device(dev);
  212. if (ret < 0)
  213. return ret;
  214. ret = pci_request_region(dev, 3, "gxfb (video processor)");
  215. if (ret < 0)
  216. return ret;
  217. par->vid_regs = ioremap(pci_resource_start(dev, 3),
  218. pci_resource_len(dev, 3));
  219. if (!par->vid_regs)
  220. return -ENOMEM;
  221. ret = pci_request_region(dev, 2, "gxfb (display controller)");
  222. if (ret < 0)
  223. return ret;
  224. par->dc_regs = ioremap(pci_resource_start(dev, 2), pci_resource_len(dev, 2));
  225. if (!par->dc_regs)
  226. return -ENOMEM;
  227. ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
  228. if (ret < 0)
  229. return ret;
  230. par->gp_regs = ioremap(pci_resource_start(dev, 1),
  231. pci_resource_len(dev, 1));
  232. if (!par->gp_regs)
  233. return -ENOMEM;
  234. ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
  235. if (ret < 0)
  236. return ret;
  237. info->fix.smem_start = pci_resource_start(dev, 0);
  238. info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
  239. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  240. if (!info->screen_base)
  241. return -ENOMEM;
  242. /* Set the 16MiB aligned base address of the graphics memory region
  243. * in the display controller */
  244. write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
  245. dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
  246. info->fix.smem_len / 1024, info->fix.smem_start);
  247. return 0;
  248. }
  249. static struct fb_ops gxfb_ops = {
  250. .owner = THIS_MODULE,
  251. .fb_check_var = gxfb_check_var,
  252. .fb_set_par = gxfb_set_par,
  253. .fb_setcolreg = gxfb_setcolreg,
  254. .fb_blank = gxfb_blank,
  255. /* No HW acceleration for now. */
  256. .fb_fillrect = cfb_fillrect,
  257. .fb_copyarea = cfb_copyarea,
  258. .fb_imageblit = cfb_imageblit,
  259. };
  260. static struct fb_info * __init gxfb_init_fbinfo(struct device *dev)
  261. {
  262. struct gxfb_par *par;
  263. struct fb_info *info;
  264. /* Alloc enough space for the pseudo palette. */
  265. info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
  266. dev);
  267. if (!info)
  268. return NULL;
  269. par = info->par;
  270. strcpy(info->fix.id, "Geode GX");
  271. info->fix.type = FB_TYPE_PACKED_PIXELS;
  272. info->fix.type_aux = 0;
  273. info->fix.xpanstep = 0;
  274. info->fix.ypanstep = 0;
  275. info->fix.ywrapstep = 0;
  276. info->fix.accel = FB_ACCEL_NONE;
  277. info->var.nonstd = 0;
  278. info->var.activate = FB_ACTIVATE_NOW;
  279. info->var.height = -1;
  280. info->var.width = -1;
  281. info->var.accel_flags = 0;
  282. info->var.vmode = FB_VMODE_NONINTERLACED;
  283. info->fbops = &gxfb_ops;
  284. info->flags = FBINFO_DEFAULT;
  285. info->node = -1;
  286. info->pseudo_palette = (void *)par + sizeof(struct gxfb_par);
  287. info->var.grayscale = 0;
  288. return info;
  289. }
  290. #ifdef CONFIG_PM
  291. static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
  292. {
  293. struct fb_info *info = pci_get_drvdata(pdev);
  294. if (state.event == PM_EVENT_SUSPEND) {
  295. acquire_console_sem();
  296. gx_powerdown(info);
  297. fb_set_suspend(info, 1);
  298. release_console_sem();
  299. }
  300. /* there's no point in setting PCI states; we emulate PCI, so
  301. * we don't end up getting power savings anyways */
  302. return 0;
  303. }
  304. static int gxfb_resume(struct pci_dev *pdev)
  305. {
  306. struct fb_info *info = pci_get_drvdata(pdev);
  307. int ret;
  308. acquire_console_sem();
  309. ret = gx_powerup(info);
  310. if (ret) {
  311. printk(KERN_ERR "gxfb: power up failed!\n");
  312. return ret;
  313. }
  314. fb_set_suspend(info, 0);
  315. release_console_sem();
  316. return 0;
  317. }
  318. #endif
  319. static int __init gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  320. {
  321. struct gxfb_par *par;
  322. struct fb_info *info;
  323. int ret;
  324. unsigned long val;
  325. struct fb_videomode *modedb_ptr;
  326. unsigned int modedb_size;
  327. info = gxfb_init_fbinfo(&pdev->dev);
  328. if (!info)
  329. return -ENOMEM;
  330. par = info->par;
  331. if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
  332. dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
  333. goto err;
  334. }
  335. /* Figure out if this is a TFT or CRT part */
  336. rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
  337. if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
  338. par->enable_crt = 0;
  339. else
  340. par->enable_crt = 1;
  341. get_modedb(&modedb_ptr, &modedb_size);
  342. ret = fb_find_mode(&info->var, info, mode_option,
  343. modedb_ptr, modedb_size, NULL, 16);
  344. if (ret == 0 || ret == 4) {
  345. dev_err(&pdev->dev, "could not find valid video mode\n");
  346. ret = -EINVAL;
  347. goto err;
  348. }
  349. /* Clear the frame buffer of garbage. */
  350. memset_io(info->screen_base, 0, info->fix.smem_len);
  351. gxfb_check_var(&info->var, info);
  352. gxfb_set_par(info);
  353. pm_set_vt_switch(vt_switch);
  354. if (register_framebuffer(info) < 0) {
  355. ret = -EINVAL;
  356. goto err;
  357. }
  358. pci_set_drvdata(pdev, info);
  359. printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id);
  360. return 0;
  361. err:
  362. if (info->screen_base) {
  363. iounmap(info->screen_base);
  364. pci_release_region(pdev, 0);
  365. }
  366. if (par->vid_regs) {
  367. iounmap(par->vid_regs);
  368. pci_release_region(pdev, 3);
  369. }
  370. if (par->dc_regs) {
  371. iounmap(par->dc_regs);
  372. pci_release_region(pdev, 2);
  373. }
  374. if (par->gp_regs) {
  375. iounmap(par->gp_regs);
  376. pci_release_region(pdev, 1);
  377. }
  378. if (info)
  379. framebuffer_release(info);
  380. return ret;
  381. }
  382. static void gxfb_remove(struct pci_dev *pdev)
  383. {
  384. struct fb_info *info = pci_get_drvdata(pdev);
  385. struct gxfb_par *par = info->par;
  386. unregister_framebuffer(info);
  387. iounmap((void __iomem *)info->screen_base);
  388. pci_release_region(pdev, 0);
  389. iounmap(par->vid_regs);
  390. pci_release_region(pdev, 3);
  391. iounmap(par->dc_regs);
  392. pci_release_region(pdev, 2);
  393. iounmap(par->gp_regs);
  394. pci_release_region(pdev, 1);
  395. pci_set_drvdata(pdev, NULL);
  396. framebuffer_release(info);
  397. }
  398. static struct pci_device_id gxfb_id_table[] = {
  399. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
  400. { 0, }
  401. };
  402. MODULE_DEVICE_TABLE(pci, gxfb_id_table);
  403. static struct pci_driver gxfb_driver = {
  404. .name = "gxfb",
  405. .id_table = gxfb_id_table,
  406. .probe = gxfb_probe,
  407. .remove = gxfb_remove,
  408. #ifdef CONFIG_PM
  409. .suspend = gxfb_suspend,
  410. .resume = gxfb_resume,
  411. #endif
  412. };
  413. #ifndef MODULE
  414. static int __init gxfb_setup(char *options)
  415. {
  416. char *opt;
  417. if (!options || !*options)
  418. return 0;
  419. while ((opt = strsep(&options, ",")) != NULL) {
  420. if (!*opt)
  421. continue;
  422. mode_option = opt;
  423. }
  424. return 0;
  425. }
  426. #endif
  427. static int __init gxfb_init(void)
  428. {
  429. #ifndef MODULE
  430. char *option = NULL;
  431. if (fb_get_options("gxfb", &option))
  432. return -ENODEV;
  433. gxfb_setup(option);
  434. #endif
  435. return pci_register_driver(&gxfb_driver);
  436. }
  437. static void __exit gxfb_cleanup(void)
  438. {
  439. pci_unregister_driver(&gxfb_driver);
  440. }
  441. module_init(gxfb_init);
  442. module_exit(gxfb_cleanup);
  443. module_param(mode_option, charp, 0);
  444. MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
  445. module_param(vram, int, 0);
  446. MODULE_PARM_DESC(vram, "video memory size");
  447. module_param(vt_switch, int, 0);
  448. MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
  449. MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
  450. MODULE_LICENSE("GPL");