pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/ioport.h>
  31. #include <linux/init.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/serial_reg.h>
  35. #include <linux/circ_buf.h>
  36. #include <linux/delay.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/tty.h>
  40. #include <linux/tty_flip.h>
  41. #include <linux/serial_core.h>
  42. #include <linux/clk.h>
  43. #include <asm/io.h>
  44. #include <mach/hardware.h>
  45. #include <asm/irq.h>
  46. #include <mach/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. struct clk *clk;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  88. {
  89. struct tty_struct *tty = up->port.info->port.tty;
  90. unsigned int ch, flag;
  91. int max_count = 256;
  92. do {
  93. ch = serial_in(up, UART_RX);
  94. flag = TTY_NORMAL;
  95. up->port.icount.rx++;
  96. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  97. UART_LSR_FE | UART_LSR_OE))) {
  98. /*
  99. * For statistics only
  100. */
  101. if (*status & UART_LSR_BI) {
  102. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  103. up->port.icount.brk++;
  104. /*
  105. * We do the SysRQ and SAK checking
  106. * here because otherwise the break
  107. * may get masked by ignore_status_mask
  108. * or read_status_mask.
  109. */
  110. if (uart_handle_break(&up->port))
  111. goto ignore_char;
  112. } else if (*status & UART_LSR_PE)
  113. up->port.icount.parity++;
  114. else if (*status & UART_LSR_FE)
  115. up->port.icount.frame++;
  116. if (*status & UART_LSR_OE)
  117. up->port.icount.overrun++;
  118. /*
  119. * Mask off conditions which should be ignored.
  120. */
  121. *status &= up->port.read_status_mask;
  122. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  123. if (up->port.line == up->port.cons->index) {
  124. /* Recover the break flag from console xmit */
  125. *status |= up->lsr_break_flag;
  126. up->lsr_break_flag = 0;
  127. }
  128. #endif
  129. if (*status & UART_LSR_BI) {
  130. flag = TTY_BREAK;
  131. } else if (*status & UART_LSR_PE)
  132. flag = TTY_PARITY;
  133. else if (*status & UART_LSR_FE)
  134. flag = TTY_FRAME;
  135. }
  136. if (uart_handle_sysrq_char(&up->port, ch))
  137. goto ignore_char;
  138. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  139. ignore_char:
  140. *status = serial_in(up, UART_LSR);
  141. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  142. tty_flip_buffer_push(tty);
  143. }
  144. static void transmit_chars(struct uart_pxa_port *up)
  145. {
  146. struct circ_buf *xmit = &up->port.info->xmit;
  147. int count;
  148. if (up->port.x_char) {
  149. serial_out(up, UART_TX, up->port.x_char);
  150. up->port.icount.tx++;
  151. up->port.x_char = 0;
  152. return;
  153. }
  154. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  155. serial_pxa_stop_tx(&up->port);
  156. return;
  157. }
  158. count = up->port.fifosize / 2;
  159. do {
  160. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  161. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  162. up->port.icount.tx++;
  163. if (uart_circ_empty(xmit))
  164. break;
  165. } while (--count > 0);
  166. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  167. uart_write_wakeup(&up->port);
  168. if (uart_circ_empty(xmit))
  169. serial_pxa_stop_tx(&up->port);
  170. }
  171. static void serial_pxa_start_tx(struct uart_port *port)
  172. {
  173. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  174. if (!(up->ier & UART_IER_THRI)) {
  175. up->ier |= UART_IER_THRI;
  176. serial_out(up, UART_IER, up->ier);
  177. }
  178. }
  179. static inline void check_modem_status(struct uart_pxa_port *up)
  180. {
  181. int status;
  182. status = serial_in(up, UART_MSR);
  183. if ((status & UART_MSR_ANY_DELTA) == 0)
  184. return;
  185. if (status & UART_MSR_TERI)
  186. up->port.icount.rng++;
  187. if (status & UART_MSR_DDSR)
  188. up->port.icount.dsr++;
  189. if (status & UART_MSR_DDCD)
  190. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  191. if (status & UART_MSR_DCTS)
  192. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  193. wake_up_interruptible(&up->port.info->delta_msr_wait);
  194. }
  195. /*
  196. * This handles the interrupt from one port.
  197. */
  198. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  199. {
  200. struct uart_pxa_port *up = dev_id;
  201. unsigned int iir, lsr;
  202. iir = serial_in(up, UART_IIR);
  203. if (iir & UART_IIR_NO_INT)
  204. return IRQ_NONE;
  205. lsr = serial_in(up, UART_LSR);
  206. if (lsr & UART_LSR_DR)
  207. receive_chars(up, &lsr);
  208. check_modem_status(up);
  209. if (lsr & UART_LSR_THRE)
  210. transmit_chars(up);
  211. return IRQ_HANDLED;
  212. }
  213. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  214. {
  215. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  216. unsigned long flags;
  217. unsigned int ret;
  218. spin_lock_irqsave(&up->port.lock, flags);
  219. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  220. spin_unlock_irqrestore(&up->port.lock, flags);
  221. return ret;
  222. }
  223. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  224. {
  225. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  226. unsigned char status;
  227. unsigned int ret;
  228. status = serial_in(up, UART_MSR);
  229. ret = 0;
  230. if (status & UART_MSR_DCD)
  231. ret |= TIOCM_CAR;
  232. if (status & UART_MSR_RI)
  233. ret |= TIOCM_RNG;
  234. if (status & UART_MSR_DSR)
  235. ret |= TIOCM_DSR;
  236. if (status & UART_MSR_CTS)
  237. ret |= TIOCM_CTS;
  238. return ret;
  239. }
  240. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  241. {
  242. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  243. unsigned char mcr = 0;
  244. if (mctrl & TIOCM_RTS)
  245. mcr |= UART_MCR_RTS;
  246. if (mctrl & TIOCM_DTR)
  247. mcr |= UART_MCR_DTR;
  248. if (mctrl & TIOCM_OUT1)
  249. mcr |= UART_MCR_OUT1;
  250. if (mctrl & TIOCM_OUT2)
  251. mcr |= UART_MCR_OUT2;
  252. if (mctrl & TIOCM_LOOP)
  253. mcr |= UART_MCR_LOOP;
  254. mcr |= up->mcr;
  255. serial_out(up, UART_MCR, mcr);
  256. }
  257. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  258. {
  259. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  260. unsigned long flags;
  261. spin_lock_irqsave(&up->port.lock, flags);
  262. if (break_state == -1)
  263. up->lcr |= UART_LCR_SBC;
  264. else
  265. up->lcr &= ~UART_LCR_SBC;
  266. serial_out(up, UART_LCR, up->lcr);
  267. spin_unlock_irqrestore(&up->port.lock, flags);
  268. }
  269. #if 0
  270. static void serial_pxa_dma_init(struct pxa_uart *up)
  271. {
  272. up->rxdma =
  273. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  274. if (up->rxdma < 0)
  275. goto out;
  276. up->txdma =
  277. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  278. if (up->txdma < 0)
  279. goto err_txdma;
  280. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  281. if (!up->dmadesc)
  282. goto err_alloc;
  283. /* ... */
  284. err_alloc:
  285. pxa_free_dma(up->txdma);
  286. err_rxdma:
  287. pxa_free_dma(up->rxdma);
  288. out:
  289. return;
  290. }
  291. #endif
  292. static int serial_pxa_startup(struct uart_port *port)
  293. {
  294. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  295. unsigned long flags;
  296. int retval;
  297. if (port->line == 3) /* HWUART */
  298. up->mcr |= UART_MCR_AFE;
  299. else
  300. up->mcr = 0;
  301. up->port.uartclk = clk_get_rate(up->clk);
  302. /*
  303. * Allocate the IRQ
  304. */
  305. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  306. if (retval)
  307. return retval;
  308. /*
  309. * Clear the FIFO buffers and disable them.
  310. * (they will be reenabled in set_termios())
  311. */
  312. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  313. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  314. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  315. serial_out(up, UART_FCR, 0);
  316. /*
  317. * Clear the interrupt registers.
  318. */
  319. (void) serial_in(up, UART_LSR);
  320. (void) serial_in(up, UART_RX);
  321. (void) serial_in(up, UART_IIR);
  322. (void) serial_in(up, UART_MSR);
  323. /*
  324. * Now, initialize the UART
  325. */
  326. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  327. spin_lock_irqsave(&up->port.lock, flags);
  328. up->port.mctrl |= TIOCM_OUT2;
  329. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  330. spin_unlock_irqrestore(&up->port.lock, flags);
  331. /*
  332. * Finally, enable interrupts. Note: Modem status interrupts
  333. * are set via set_termios(), which will be occurring imminently
  334. * anyway, so we don't enable them here.
  335. */
  336. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  337. serial_out(up, UART_IER, up->ier);
  338. /*
  339. * And clear the interrupt registers again for luck.
  340. */
  341. (void) serial_in(up, UART_LSR);
  342. (void) serial_in(up, UART_RX);
  343. (void) serial_in(up, UART_IIR);
  344. (void) serial_in(up, UART_MSR);
  345. return 0;
  346. }
  347. static void serial_pxa_shutdown(struct uart_port *port)
  348. {
  349. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  350. unsigned long flags;
  351. free_irq(up->port.irq, up);
  352. /*
  353. * Disable interrupts from this port
  354. */
  355. up->ier = 0;
  356. serial_out(up, UART_IER, 0);
  357. spin_lock_irqsave(&up->port.lock, flags);
  358. up->port.mctrl &= ~TIOCM_OUT2;
  359. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  360. spin_unlock_irqrestore(&up->port.lock, flags);
  361. /*
  362. * Disable break condition and FIFOs
  363. */
  364. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  365. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  366. UART_FCR_CLEAR_RCVR |
  367. UART_FCR_CLEAR_XMIT);
  368. serial_out(up, UART_FCR, 0);
  369. }
  370. static void
  371. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  372. struct ktermios *old)
  373. {
  374. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  375. unsigned char cval, fcr = 0;
  376. unsigned long flags;
  377. unsigned int baud, quot;
  378. switch (termios->c_cflag & CSIZE) {
  379. case CS5:
  380. cval = UART_LCR_WLEN5;
  381. break;
  382. case CS6:
  383. cval = UART_LCR_WLEN6;
  384. break;
  385. case CS7:
  386. cval = UART_LCR_WLEN7;
  387. break;
  388. default:
  389. case CS8:
  390. cval = UART_LCR_WLEN8;
  391. break;
  392. }
  393. if (termios->c_cflag & CSTOPB)
  394. cval |= UART_LCR_STOP;
  395. if (termios->c_cflag & PARENB)
  396. cval |= UART_LCR_PARITY;
  397. if (!(termios->c_cflag & PARODD))
  398. cval |= UART_LCR_EPAR;
  399. /*
  400. * Ask the core to calculate the divisor for us.
  401. */
  402. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  403. quot = uart_get_divisor(port, baud);
  404. if ((up->port.uartclk / quot) < (2400 * 16))
  405. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  406. else if ((up->port.uartclk / quot) < (230400 * 16))
  407. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  408. else
  409. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  410. /*
  411. * Ok, we're now changing the port state. Do it with
  412. * interrupts disabled.
  413. */
  414. spin_lock_irqsave(&up->port.lock, flags);
  415. /*
  416. * Ensure the port will be enabled.
  417. * This is required especially for serial console.
  418. */
  419. up->ier |= IER_UUE;
  420. /*
  421. * Update the per-port timeout.
  422. */
  423. uart_update_timeout(port, termios->c_cflag, baud);
  424. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  425. if (termios->c_iflag & INPCK)
  426. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  427. if (termios->c_iflag & (BRKINT | PARMRK))
  428. up->port.read_status_mask |= UART_LSR_BI;
  429. /*
  430. * Characters to ignore
  431. */
  432. up->port.ignore_status_mask = 0;
  433. if (termios->c_iflag & IGNPAR)
  434. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  435. if (termios->c_iflag & IGNBRK) {
  436. up->port.ignore_status_mask |= UART_LSR_BI;
  437. /*
  438. * If we're ignoring parity and break indicators,
  439. * ignore overruns too (for real raw support).
  440. */
  441. if (termios->c_iflag & IGNPAR)
  442. up->port.ignore_status_mask |= UART_LSR_OE;
  443. }
  444. /*
  445. * ignore all characters if CREAD is not set
  446. */
  447. if ((termios->c_cflag & CREAD) == 0)
  448. up->port.ignore_status_mask |= UART_LSR_DR;
  449. /*
  450. * CTS flow control flag and modem status interrupts
  451. */
  452. up->ier &= ~UART_IER_MSI;
  453. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  454. up->ier |= UART_IER_MSI;
  455. serial_out(up, UART_IER, up->ier);
  456. if (termios->c_cflag & CRTSCTS)
  457. up->mcr |= UART_MCR_AFE;
  458. else
  459. up->mcr &= ~UART_MCR_AFE;
  460. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  461. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  462. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  463. serial_out(up, UART_LCR, cval); /* reset DLAB */
  464. up->lcr = cval; /* Save LCR */
  465. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  466. serial_out(up, UART_FCR, fcr);
  467. spin_unlock_irqrestore(&up->port.lock, flags);
  468. }
  469. static void
  470. serial_pxa_pm(struct uart_port *port, unsigned int state,
  471. unsigned int oldstate)
  472. {
  473. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  474. if (!state)
  475. clk_enable(up->clk);
  476. else
  477. clk_disable(up->clk);
  478. }
  479. static void serial_pxa_release_port(struct uart_port *port)
  480. {
  481. }
  482. static int serial_pxa_request_port(struct uart_port *port)
  483. {
  484. return 0;
  485. }
  486. static void serial_pxa_config_port(struct uart_port *port, int flags)
  487. {
  488. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  489. up->port.type = PORT_PXA;
  490. }
  491. static int
  492. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  493. {
  494. /* we don't want the core code to modify any port params */
  495. return -EINVAL;
  496. }
  497. static const char *
  498. serial_pxa_type(struct uart_port *port)
  499. {
  500. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  501. return up->name;
  502. }
  503. static struct uart_pxa_port *serial_pxa_ports[4];
  504. static struct uart_driver serial_pxa_reg;
  505. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  506. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  507. /*
  508. * Wait for transmitter & holding register to empty
  509. */
  510. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  511. {
  512. unsigned int status, tmout = 10000;
  513. /* Wait up to 10ms for the character(s) to be sent. */
  514. do {
  515. status = serial_in(up, UART_LSR);
  516. if (status & UART_LSR_BI)
  517. up->lsr_break_flag = UART_LSR_BI;
  518. if (--tmout == 0)
  519. break;
  520. udelay(1);
  521. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  522. /* Wait up to 1s for flow control if necessary */
  523. if (up->port.flags & UPF_CONS_FLOW) {
  524. tmout = 1000000;
  525. while (--tmout &&
  526. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  527. udelay(1);
  528. }
  529. }
  530. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  531. {
  532. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  533. wait_for_xmitr(up);
  534. serial_out(up, UART_TX, ch);
  535. }
  536. /*
  537. * Print a string to the serial port trying not to disturb
  538. * any possible real use of the port...
  539. *
  540. * The console_lock must be held when we get here.
  541. */
  542. static void
  543. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  544. {
  545. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  546. unsigned int ier;
  547. clk_enable(up->clk);
  548. /*
  549. * First save the IER then disable the interrupts
  550. */
  551. ier = serial_in(up, UART_IER);
  552. serial_out(up, UART_IER, UART_IER_UUE);
  553. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  554. /*
  555. * Finally, wait for transmitter to become empty
  556. * and restore the IER
  557. */
  558. wait_for_xmitr(up);
  559. serial_out(up, UART_IER, ier);
  560. clk_disable(up->clk);
  561. }
  562. static int __init
  563. serial_pxa_console_setup(struct console *co, char *options)
  564. {
  565. struct uart_pxa_port *up;
  566. int baud = 9600;
  567. int bits = 8;
  568. int parity = 'n';
  569. int flow = 'n';
  570. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  571. co->index = 0;
  572. up = serial_pxa_ports[co->index];
  573. if (!up)
  574. return -ENODEV;
  575. if (options)
  576. uart_parse_options(options, &baud, &parity, &bits, &flow);
  577. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  578. }
  579. static struct console serial_pxa_console = {
  580. .name = "ttyS",
  581. .write = serial_pxa_console_write,
  582. .device = uart_console_device,
  583. .setup = serial_pxa_console_setup,
  584. .flags = CON_PRINTBUFFER,
  585. .index = -1,
  586. .data = &serial_pxa_reg,
  587. };
  588. #define PXA_CONSOLE &serial_pxa_console
  589. #else
  590. #define PXA_CONSOLE NULL
  591. #endif
  592. struct uart_ops serial_pxa_pops = {
  593. .tx_empty = serial_pxa_tx_empty,
  594. .set_mctrl = serial_pxa_set_mctrl,
  595. .get_mctrl = serial_pxa_get_mctrl,
  596. .stop_tx = serial_pxa_stop_tx,
  597. .start_tx = serial_pxa_start_tx,
  598. .stop_rx = serial_pxa_stop_rx,
  599. .enable_ms = serial_pxa_enable_ms,
  600. .break_ctl = serial_pxa_break_ctl,
  601. .startup = serial_pxa_startup,
  602. .shutdown = serial_pxa_shutdown,
  603. .set_termios = serial_pxa_set_termios,
  604. .pm = serial_pxa_pm,
  605. .type = serial_pxa_type,
  606. .release_port = serial_pxa_release_port,
  607. .request_port = serial_pxa_request_port,
  608. .config_port = serial_pxa_config_port,
  609. .verify_port = serial_pxa_verify_port,
  610. };
  611. static struct uart_driver serial_pxa_reg = {
  612. .owner = THIS_MODULE,
  613. .driver_name = "PXA serial",
  614. .dev_name = "ttyS",
  615. .major = TTY_MAJOR,
  616. .minor = 64,
  617. .nr = 4,
  618. .cons = PXA_CONSOLE,
  619. };
  620. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  621. {
  622. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  623. if (sport)
  624. uart_suspend_port(&serial_pxa_reg, &sport->port);
  625. return 0;
  626. }
  627. static int serial_pxa_resume(struct platform_device *dev)
  628. {
  629. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  630. if (sport)
  631. uart_resume_port(&serial_pxa_reg, &sport->port);
  632. return 0;
  633. }
  634. static int serial_pxa_probe(struct platform_device *dev)
  635. {
  636. struct uart_pxa_port *sport;
  637. struct resource *mmres, *irqres;
  638. int ret;
  639. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  640. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  641. if (!mmres || !irqres)
  642. return -ENODEV;
  643. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  644. if (!sport)
  645. return -ENOMEM;
  646. sport->clk = clk_get(&dev->dev, "UARTCLK");
  647. if (IS_ERR(sport->clk)) {
  648. ret = PTR_ERR(sport->clk);
  649. goto err_free;
  650. }
  651. sport->port.type = PORT_PXA;
  652. sport->port.iotype = UPIO_MEM;
  653. sport->port.mapbase = mmres->start;
  654. sport->port.irq = irqres->start;
  655. sport->port.fifosize = 64;
  656. sport->port.ops = &serial_pxa_pops;
  657. sport->port.line = dev->id;
  658. sport->port.dev = &dev->dev;
  659. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  660. sport->port.uartclk = clk_get_rate(sport->clk);
  661. /*
  662. * Is it worth keeping this?
  663. */
  664. if (mmres->start == __PREG(FFUART))
  665. sport->name = "FFUART";
  666. else if (mmres->start == __PREG(BTUART))
  667. sport->name = "BTUART";
  668. else if (mmres->start == __PREG(STUART))
  669. sport->name = "STUART";
  670. else if (mmres->start == __PREG(HWUART))
  671. sport->name = "HWUART";
  672. else
  673. sport->name = "???";
  674. sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
  675. if (!sport->port.membase) {
  676. ret = -ENOMEM;
  677. goto err_clk;
  678. }
  679. serial_pxa_ports[dev->id] = sport;
  680. uart_add_one_port(&serial_pxa_reg, &sport->port);
  681. platform_set_drvdata(dev, sport);
  682. return 0;
  683. err_clk:
  684. clk_put(sport->clk);
  685. err_free:
  686. kfree(sport);
  687. return ret;
  688. }
  689. static int serial_pxa_remove(struct platform_device *dev)
  690. {
  691. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  692. platform_set_drvdata(dev, NULL);
  693. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  694. clk_put(sport->clk);
  695. kfree(sport);
  696. return 0;
  697. }
  698. static struct platform_driver serial_pxa_driver = {
  699. .probe = serial_pxa_probe,
  700. .remove = serial_pxa_remove,
  701. .suspend = serial_pxa_suspend,
  702. .resume = serial_pxa_resume,
  703. .driver = {
  704. .name = "pxa2xx-uart",
  705. .owner = THIS_MODULE,
  706. },
  707. };
  708. int __init serial_pxa_init(void)
  709. {
  710. int ret;
  711. ret = uart_register_driver(&serial_pxa_reg);
  712. if (ret != 0)
  713. return ret;
  714. ret = platform_driver_register(&serial_pxa_driver);
  715. if (ret != 0)
  716. uart_unregister_driver(&serial_pxa_reg);
  717. return ret;
  718. }
  719. void __exit serial_pxa_exit(void)
  720. {
  721. platform_driver_unregister(&serial_pxa_driver);
  722. uart_unregister_driver(&serial_pxa_reg);
  723. }
  724. module_init(serial_pxa_init);
  725. module_exit(serial_pxa_exit);
  726. MODULE_LICENSE("GPL");
  727. MODULE_ALIAS("platform:pxa2xx-uart");