qla_init.c 108 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. #ifdef CONFIG_SPARC
  12. #include <asm/prom.h>
  13. #endif
  14. /*
  15. * QLogic ISP2x00 Hardware Support Function Prototypes.
  16. */
  17. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  18. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  50. {
  51. int rval;
  52. /* Clear adapter flags. */
  53. ha->flags.online = 0;
  54. ha->flags.reset_active = 0;
  55. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  56. atomic_set(&ha->loop_state, LOOP_DOWN);
  57. ha->device_flags = DFLG_NO_CABLE;
  58. ha->dpc_flags = 0;
  59. ha->flags.management_server_logged_in = 0;
  60. ha->marker_needed = 0;
  61. ha->mbx_flags = 0;
  62. ha->isp_abort_cnt = 0;
  63. ha->beacon_blink_led = 0;
  64. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  65. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  66. rval = ha->isp_ops->pci_config(ha);
  67. if (rval) {
  68. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  69. ha->host_no));
  70. return (rval);
  71. }
  72. ha->isp_ops->reset_chip(ha);
  73. rval = qla2xxx_get_flash_info(ha);
  74. if (rval) {
  75. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  76. ha->host_no));
  77. return (rval);
  78. }
  79. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  80. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  81. ha->isp_ops->nvram_config(ha);
  82. if (ha->flags.disable_serdes) {
  83. /* Mask HBA via NVRAM settings? */
  84. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  85. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  86. ha->port_name[0], ha->port_name[1],
  87. ha->port_name[2], ha->port_name[3],
  88. ha->port_name[4], ha->port_name[5],
  89. ha->port_name[6], ha->port_name[7]);
  90. return QLA_FUNCTION_FAILED;
  91. }
  92. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  93. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  94. rval = ha->isp_ops->chip_diag(ha);
  95. if (rval)
  96. return (rval);
  97. rval = qla2x00_setup_chip(ha);
  98. if (rval)
  99. return (rval);
  100. }
  101. if (IS_QLA84XX(ha)) {
  102. ha->cs84xx = qla84xx_get_chip(ha);
  103. if (!ha->cs84xx) {
  104. qla_printk(KERN_ERR, ha,
  105. "Unable to configure ISP84XX.\n");
  106. return QLA_FUNCTION_FAILED;
  107. }
  108. }
  109. rval = qla2x00_init_rings(ha);
  110. return (rval);
  111. }
  112. /**
  113. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  114. * @ha: HA context
  115. *
  116. * Returns 0 on success.
  117. */
  118. int
  119. qla2100_pci_config(scsi_qla_host_t *ha)
  120. {
  121. uint16_t w;
  122. uint32_t d;
  123. unsigned long flags;
  124. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  125. pci_set_master(ha->pdev);
  126. pci_try_set_mwi(ha->pdev);
  127. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  128. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  129. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  130. /* Reset expansion ROM address decode enable */
  131. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  132. d &= ~PCI_ROM_ADDRESS_ENABLE;
  133. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  134. /* Get PCI bus information. */
  135. spin_lock_irqsave(&ha->hardware_lock, flags);
  136. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  137. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  138. return QLA_SUCCESS;
  139. }
  140. /**
  141. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  142. * @ha: HA context
  143. *
  144. * Returns 0 on success.
  145. */
  146. int
  147. qla2300_pci_config(scsi_qla_host_t *ha)
  148. {
  149. uint16_t w;
  150. uint32_t d;
  151. unsigned long flags = 0;
  152. uint32_t cnt;
  153. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  154. pci_set_master(ha->pdev);
  155. pci_try_set_mwi(ha->pdev);
  156. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  157. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  158. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  159. w &= ~PCI_COMMAND_INTX_DISABLE;
  160. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  161. /*
  162. * If this is a 2300 card and not 2312, reset the
  163. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  164. * the 2310 also reports itself as a 2300 so we need to get the
  165. * fb revision level -- a 6 indicates it really is a 2300 and
  166. * not a 2310.
  167. */
  168. if (IS_QLA2300(ha)) {
  169. spin_lock_irqsave(&ha->hardware_lock, flags);
  170. /* Pause RISC. */
  171. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  172. for (cnt = 0; cnt < 30000; cnt++) {
  173. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  174. break;
  175. udelay(10);
  176. }
  177. /* Select FPM registers. */
  178. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  179. RD_REG_WORD(&reg->ctrl_status);
  180. /* Get the fb rev level */
  181. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  182. if (ha->fb_rev == FPM_2300)
  183. pci_clear_mwi(ha->pdev);
  184. /* Deselect FPM registers. */
  185. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  186. RD_REG_WORD(&reg->ctrl_status);
  187. /* Release RISC module. */
  188. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  189. for (cnt = 0; cnt < 30000; cnt++) {
  190. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  191. break;
  192. udelay(10);
  193. }
  194. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  195. }
  196. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  197. /* Reset expansion ROM address decode enable */
  198. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  199. d &= ~PCI_ROM_ADDRESS_ENABLE;
  200. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  201. /* Get PCI bus information. */
  202. spin_lock_irqsave(&ha->hardware_lock, flags);
  203. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  204. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  205. return QLA_SUCCESS;
  206. }
  207. /**
  208. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  209. * @ha: HA context
  210. *
  211. * Returns 0 on success.
  212. */
  213. int
  214. qla24xx_pci_config(scsi_qla_host_t *ha)
  215. {
  216. uint16_t w;
  217. uint32_t d;
  218. unsigned long flags = 0;
  219. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  220. pci_set_master(ha->pdev);
  221. pci_try_set_mwi(ha->pdev);
  222. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  223. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  224. w &= ~PCI_COMMAND_INTX_DISABLE;
  225. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  226. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  227. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  228. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  229. pcix_set_mmrbc(ha->pdev, 2048);
  230. /* PCIe -- adjust Maximum Read Request Size (2048). */
  231. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  232. pcie_set_readrq(ha->pdev, 2048);
  233. /* Reset expansion ROM address decode enable */
  234. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  235. d &= ~PCI_ROM_ADDRESS_ENABLE;
  236. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  237. ha->chip_revision = ha->pdev->revision;
  238. /* Get PCI bus information. */
  239. spin_lock_irqsave(&ha->hardware_lock, flags);
  240. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  241. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  242. return QLA_SUCCESS;
  243. }
  244. /**
  245. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  246. * @ha: HA context
  247. *
  248. * Returns 0 on success.
  249. */
  250. int
  251. qla25xx_pci_config(scsi_qla_host_t *ha)
  252. {
  253. uint16_t w;
  254. uint32_t d;
  255. pci_set_master(ha->pdev);
  256. pci_try_set_mwi(ha->pdev);
  257. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  258. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  259. w &= ~PCI_COMMAND_INTX_DISABLE;
  260. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  261. /* PCIe -- adjust Maximum Read Request Size (2048). */
  262. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  263. pcie_set_readrq(ha->pdev, 2048);
  264. /* Reset expansion ROM address decode enable */
  265. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  266. d &= ~PCI_ROM_ADDRESS_ENABLE;
  267. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  268. ha->chip_revision = ha->pdev->revision;
  269. return QLA_SUCCESS;
  270. }
  271. /**
  272. * qla2x00_isp_firmware() - Choose firmware image.
  273. * @ha: HA context
  274. *
  275. * Returns 0 on success.
  276. */
  277. static int
  278. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  279. {
  280. int rval;
  281. uint16_t loop_id, topo, sw_cap;
  282. uint8_t domain, area, al_pa;
  283. /* Assume loading risc code */
  284. rval = QLA_FUNCTION_FAILED;
  285. if (ha->flags.disable_risc_code_load) {
  286. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  287. ha->host_no));
  288. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  289. /* Verify checksum of loaded RISC code. */
  290. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  291. if (rval == QLA_SUCCESS) {
  292. /* And, verify we are not in ROM code. */
  293. rval = qla2x00_get_adapter_id(ha, &loop_id, &al_pa,
  294. &area, &domain, &topo, &sw_cap);
  295. }
  296. }
  297. if (rval) {
  298. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  299. ha->host_no));
  300. }
  301. return (rval);
  302. }
  303. /**
  304. * qla2x00_reset_chip() - Reset ISP chip.
  305. * @ha: HA context
  306. *
  307. * Returns 0 on success.
  308. */
  309. void
  310. qla2x00_reset_chip(scsi_qla_host_t *ha)
  311. {
  312. unsigned long flags = 0;
  313. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  314. uint32_t cnt;
  315. uint16_t cmd;
  316. ha->isp_ops->disable_intrs(ha);
  317. spin_lock_irqsave(&ha->hardware_lock, flags);
  318. /* Turn off master enable */
  319. cmd = 0;
  320. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  321. cmd &= ~PCI_COMMAND_MASTER;
  322. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  323. if (!IS_QLA2100(ha)) {
  324. /* Pause RISC. */
  325. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  326. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  327. for (cnt = 0; cnt < 30000; cnt++) {
  328. if ((RD_REG_WORD(&reg->hccr) &
  329. HCCR_RISC_PAUSE) != 0)
  330. break;
  331. udelay(100);
  332. }
  333. } else {
  334. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  335. udelay(10);
  336. }
  337. /* Select FPM registers. */
  338. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  339. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  340. /* FPM Soft Reset. */
  341. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  342. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  343. /* Toggle Fpm Reset. */
  344. if (!IS_QLA2200(ha)) {
  345. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  346. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  347. }
  348. /* Select frame buffer registers. */
  349. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  350. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  351. /* Reset frame buffer FIFOs. */
  352. if (IS_QLA2200(ha)) {
  353. WRT_FB_CMD_REG(ha, reg, 0xa000);
  354. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  355. } else {
  356. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  357. /* Read back fb_cmd until zero or 3 seconds max */
  358. for (cnt = 0; cnt < 3000; cnt++) {
  359. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  360. break;
  361. udelay(100);
  362. }
  363. }
  364. /* Select RISC module registers. */
  365. WRT_REG_WORD(&reg->ctrl_status, 0);
  366. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  367. /* Reset RISC processor. */
  368. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  369. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  370. /* Release RISC processor. */
  371. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  372. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  373. }
  374. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  375. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  376. /* Reset ISP chip. */
  377. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  378. /* Wait for RISC to recover from reset. */
  379. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  380. /*
  381. * It is necessary to for a delay here since the card doesn't
  382. * respond to PCI reads during a reset. On some architectures
  383. * this will result in an MCA.
  384. */
  385. udelay(20);
  386. for (cnt = 30000; cnt; cnt--) {
  387. if ((RD_REG_WORD(&reg->ctrl_status) &
  388. CSR_ISP_SOFT_RESET) == 0)
  389. break;
  390. udelay(100);
  391. }
  392. } else
  393. udelay(10);
  394. /* Reset RISC processor. */
  395. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  396. WRT_REG_WORD(&reg->semaphore, 0);
  397. /* Release RISC processor. */
  398. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  399. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  400. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  401. for (cnt = 0; cnt < 30000; cnt++) {
  402. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  403. break;
  404. udelay(100);
  405. }
  406. } else
  407. udelay(100);
  408. /* Turn on master enable */
  409. cmd |= PCI_COMMAND_MASTER;
  410. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  411. /* Disable RISC pause on FPM parity error. */
  412. if (!IS_QLA2100(ha)) {
  413. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  414. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  415. }
  416. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  417. }
  418. /**
  419. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  420. * @ha: HA context
  421. *
  422. * Returns 0 on success.
  423. */
  424. static inline void
  425. qla24xx_reset_risc(scsi_qla_host_t *ha)
  426. {
  427. int hw_evt = 0;
  428. unsigned long flags = 0;
  429. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  430. uint32_t cnt, d2;
  431. uint16_t wd;
  432. spin_lock_irqsave(&ha->hardware_lock, flags);
  433. /* Reset RISC. */
  434. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  435. for (cnt = 0; cnt < 30000; cnt++) {
  436. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  437. break;
  438. udelay(10);
  439. }
  440. WRT_REG_DWORD(&reg->ctrl_status,
  441. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  442. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  443. udelay(100);
  444. /* Wait for firmware to complete NVRAM accesses. */
  445. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  446. for (cnt = 10000 ; cnt && d2; cnt--) {
  447. udelay(5);
  448. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  449. barrier();
  450. }
  451. if (cnt == 0)
  452. hw_evt = 1;
  453. /* Wait for soft-reset to complete. */
  454. d2 = RD_REG_DWORD(&reg->ctrl_status);
  455. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  456. udelay(5);
  457. d2 = RD_REG_DWORD(&reg->ctrl_status);
  458. barrier();
  459. }
  460. if (cnt == 0 || hw_evt)
  461. qla2xxx_hw_event_log(ha, HW_EVENT_RESET_ERR,
  462. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  463. RD_REG_WORD(&reg->mailbox3));
  464. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  465. RD_REG_DWORD(&reg->hccr);
  466. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  467. RD_REG_DWORD(&reg->hccr);
  468. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  469. RD_REG_DWORD(&reg->hccr);
  470. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  471. for (cnt = 6000000 ; cnt && d2; cnt--) {
  472. udelay(5);
  473. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  474. barrier();
  475. }
  476. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  477. }
  478. /**
  479. * qla24xx_reset_chip() - Reset ISP24xx chip.
  480. * @ha: HA context
  481. *
  482. * Returns 0 on success.
  483. */
  484. void
  485. qla24xx_reset_chip(scsi_qla_host_t *ha)
  486. {
  487. ha->isp_ops->disable_intrs(ha);
  488. /* Perform RISC reset. */
  489. qla24xx_reset_risc(ha);
  490. }
  491. /**
  492. * qla2x00_chip_diag() - Test chip for proper operation.
  493. * @ha: HA context
  494. *
  495. * Returns 0 on success.
  496. */
  497. int
  498. qla2x00_chip_diag(scsi_qla_host_t *ha)
  499. {
  500. int rval;
  501. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  502. unsigned long flags = 0;
  503. uint16_t data;
  504. uint32_t cnt;
  505. uint16_t mb[5];
  506. /* Assume a failed state */
  507. rval = QLA_FUNCTION_FAILED;
  508. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  509. ha->host_no, (u_long)&reg->flash_address));
  510. spin_lock_irqsave(&ha->hardware_lock, flags);
  511. /* Reset ISP chip. */
  512. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  513. /*
  514. * We need to have a delay here since the card will not respond while
  515. * in reset causing an MCA on some architectures.
  516. */
  517. udelay(20);
  518. data = qla2x00_debounce_register(&reg->ctrl_status);
  519. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  520. udelay(5);
  521. data = RD_REG_WORD(&reg->ctrl_status);
  522. barrier();
  523. }
  524. if (!cnt)
  525. goto chip_diag_failed;
  526. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  527. ha->host_no));
  528. /* Reset RISC processor. */
  529. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  530. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  531. /* Workaround for QLA2312 PCI parity error */
  532. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  533. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  534. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  535. udelay(5);
  536. data = RD_MAILBOX_REG(ha, reg, 0);
  537. barrier();
  538. }
  539. } else
  540. udelay(10);
  541. if (!cnt)
  542. goto chip_diag_failed;
  543. /* Check product ID of chip */
  544. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  545. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  546. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  547. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  548. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  549. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  550. mb[3] != PROD_ID_3) {
  551. qla_printk(KERN_WARNING, ha,
  552. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  553. goto chip_diag_failed;
  554. }
  555. ha->product_id[0] = mb[1];
  556. ha->product_id[1] = mb[2];
  557. ha->product_id[2] = mb[3];
  558. ha->product_id[3] = mb[4];
  559. /* Adjust fw RISC transfer size */
  560. if (ha->request_q_length > 1024)
  561. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  562. else
  563. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  564. ha->request_q_length;
  565. if (IS_QLA2200(ha) &&
  566. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  567. /* Limit firmware transfer size with a 2200A */
  568. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  569. ha->host_no));
  570. ha->device_type |= DT_ISP2200A;
  571. ha->fw_transfer_size = 128;
  572. }
  573. /* Wrap Incoming Mailboxes Test. */
  574. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  575. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  576. rval = qla2x00_mbx_reg_test(ha);
  577. if (rval) {
  578. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  579. ha->host_no));
  580. qla_printk(KERN_WARNING, ha,
  581. "Failed mailbox send register test\n");
  582. }
  583. else {
  584. /* Flag a successful rval */
  585. rval = QLA_SUCCESS;
  586. }
  587. spin_lock_irqsave(&ha->hardware_lock, flags);
  588. chip_diag_failed:
  589. if (rval)
  590. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  591. "****\n", ha->host_no));
  592. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  593. return (rval);
  594. }
  595. /**
  596. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  597. * @ha: HA context
  598. *
  599. * Returns 0 on success.
  600. */
  601. int
  602. qla24xx_chip_diag(scsi_qla_host_t *ha)
  603. {
  604. int rval;
  605. /* Perform RISC reset. */
  606. qla24xx_reset_risc(ha);
  607. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * ha->request_q_length;
  608. rval = qla2x00_mbx_reg_test(ha);
  609. if (rval) {
  610. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  611. ha->host_no));
  612. qla_printk(KERN_WARNING, ha,
  613. "Failed mailbox send register test\n");
  614. } else {
  615. /* Flag a successful rval */
  616. rval = QLA_SUCCESS;
  617. }
  618. return rval;
  619. }
  620. void
  621. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  622. {
  623. int rval;
  624. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  625. eft_size, fce_size;
  626. dma_addr_t tc_dma;
  627. void *tc;
  628. if (ha->fw_dump) {
  629. qla_printk(KERN_WARNING, ha,
  630. "Firmware dump previously allocated.\n");
  631. return;
  632. }
  633. ha->fw_dumped = 0;
  634. fixed_size = mem_size = eft_size = fce_size = 0;
  635. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  636. fixed_size = sizeof(struct qla2100_fw_dump);
  637. } else if (IS_QLA23XX(ha)) {
  638. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  639. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  640. sizeof(uint16_t);
  641. } else if (IS_FWI2_CAPABLE(ha)) {
  642. fixed_size = IS_QLA25XX(ha) ?
  643. offsetof(struct qla25xx_fw_dump, ext_mem):
  644. offsetof(struct qla24xx_fw_dump, ext_mem);
  645. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  646. sizeof(uint32_t);
  647. /* Allocate memory for Fibre Channel Event Buffer. */
  648. if (!IS_QLA25XX(ha))
  649. goto try_eft;
  650. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  651. GFP_KERNEL);
  652. if (!tc) {
  653. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  654. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  655. goto try_eft;
  656. }
  657. memset(tc, 0, FCE_SIZE);
  658. rval = qla2x00_enable_fce_trace(ha, tc_dma, FCE_NUM_BUFFERS,
  659. ha->fce_mb, &ha->fce_bufs);
  660. if (rval) {
  661. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  662. "FCE (%d).\n", rval);
  663. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  664. tc_dma);
  665. ha->flags.fce_enabled = 0;
  666. goto try_eft;
  667. }
  668. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  669. FCE_SIZE / 1024);
  670. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  671. ha->flags.fce_enabled = 1;
  672. ha->fce_dma = tc_dma;
  673. ha->fce = tc;
  674. try_eft:
  675. /* Allocate memory for Extended Trace Buffer. */
  676. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  677. GFP_KERNEL);
  678. if (!tc) {
  679. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  680. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  681. goto cont_alloc;
  682. }
  683. memset(tc, 0, EFT_SIZE);
  684. rval = qla2x00_enable_eft_trace(ha, tc_dma, EFT_NUM_BUFFERS);
  685. if (rval) {
  686. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  687. "EFT (%d).\n", rval);
  688. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  689. tc_dma);
  690. goto cont_alloc;
  691. }
  692. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  693. EFT_SIZE / 1024);
  694. eft_size = EFT_SIZE;
  695. ha->eft_dma = tc_dma;
  696. ha->eft = tc;
  697. }
  698. cont_alloc:
  699. req_q_size = ha->request_q_length * sizeof(request_t);
  700. rsp_q_size = ha->response_q_length * sizeof(response_t);
  701. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  702. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  703. eft_size + fce_size;
  704. ha->fw_dump = vmalloc(dump_size);
  705. if (!ha->fw_dump) {
  706. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  707. "firmware dump!!!\n", dump_size / 1024);
  708. if (ha->eft) {
  709. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  710. ha->eft_dma);
  711. ha->eft = NULL;
  712. ha->eft_dma = 0;
  713. }
  714. return;
  715. }
  716. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  717. dump_size / 1024);
  718. ha->fw_dump_len = dump_size;
  719. ha->fw_dump->signature[0] = 'Q';
  720. ha->fw_dump->signature[1] = 'L';
  721. ha->fw_dump->signature[2] = 'G';
  722. ha->fw_dump->signature[3] = 'C';
  723. ha->fw_dump->version = __constant_htonl(1);
  724. ha->fw_dump->fixed_size = htonl(fixed_size);
  725. ha->fw_dump->mem_size = htonl(mem_size);
  726. ha->fw_dump->req_q_size = htonl(req_q_size);
  727. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  728. ha->fw_dump->eft_size = htonl(eft_size);
  729. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  730. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  731. ha->fw_dump->header_size =
  732. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  733. }
  734. /**
  735. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  736. * @ha: HA context
  737. *
  738. * Returns 0 on success.
  739. */
  740. static void
  741. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  742. {
  743. int rval;
  744. uint16_t fw_iocb_cnt = 0;
  745. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  746. dma_addr_t request_dma;
  747. request_t *request_ring;
  748. /* Valid only on recent ISPs. */
  749. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  750. return;
  751. /* Retrieve IOCB counts available to the firmware. */
  752. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt,
  753. &ha->max_npiv_vports);
  754. if (rval)
  755. return;
  756. /* No point in continuing if current settings are sufficient. */
  757. if (fw_iocb_cnt < 1024)
  758. return;
  759. if (ha->request_q_length >= request_q_length)
  760. return;
  761. /* Attempt to claim larger area for request queue. */
  762. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  763. (request_q_length + 1) * sizeof(request_t), &request_dma,
  764. GFP_KERNEL);
  765. if (request_ring == NULL)
  766. return;
  767. /* Resize successful, report extensions. */
  768. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  769. (ha->fw_memory_size + 1) / 1024);
  770. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  771. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  772. /* Clear old allocations. */
  773. dma_free_coherent(&ha->pdev->dev,
  774. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  775. ha->request_dma);
  776. /* Begin using larger queue. */
  777. ha->request_q_length = request_q_length;
  778. ha->request_ring = request_ring;
  779. ha->request_dma = request_dma;
  780. }
  781. /**
  782. * qla2x00_setup_chip() - Load and start RISC firmware.
  783. * @ha: HA context
  784. *
  785. * Returns 0 on success.
  786. */
  787. static int
  788. qla2x00_setup_chip(scsi_qla_host_t *ha)
  789. {
  790. int rval;
  791. uint32_t srisc_address = 0;
  792. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  793. unsigned long flags;
  794. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  795. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  796. spin_lock_irqsave(&ha->hardware_lock, flags);
  797. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  798. RD_REG_WORD(&reg->hccr);
  799. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  800. }
  801. /* Load firmware sequences */
  802. rval = ha->isp_ops->load_risc(ha, &srisc_address);
  803. if (rval == QLA_SUCCESS) {
  804. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  805. "code.\n", ha->host_no));
  806. rval = qla2x00_verify_checksum(ha, srisc_address);
  807. if (rval == QLA_SUCCESS) {
  808. /* Start firmware execution. */
  809. DEBUG(printk("scsi(%ld): Checksum OK, start "
  810. "firmware.\n", ha->host_no));
  811. rval = qla2x00_execute_fw(ha, srisc_address);
  812. /* Retrieve firmware information. */
  813. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  814. qla2x00_get_fw_version(ha,
  815. &ha->fw_major_version,
  816. &ha->fw_minor_version,
  817. &ha->fw_subminor_version,
  818. &ha->fw_attributes, &ha->fw_memory_size);
  819. qla2x00_resize_request_q(ha);
  820. ha->flags.npiv_supported = 0;
  821. if ((IS_QLA24XX(ha) || IS_QLA25XX(ha) ||
  822. IS_QLA84XX(ha)) &&
  823. (ha->fw_attributes & BIT_2)) {
  824. ha->flags.npiv_supported = 1;
  825. if ((!ha->max_npiv_vports) ||
  826. ((ha->max_npiv_vports + 1) %
  827. MIN_MULTI_ID_FABRIC))
  828. ha->max_npiv_vports =
  829. MIN_MULTI_ID_FABRIC - 1;
  830. }
  831. if (ql2xallocfwdump)
  832. qla2x00_alloc_fw_dump(ha);
  833. }
  834. } else {
  835. DEBUG2(printk(KERN_INFO
  836. "scsi(%ld): ISP Firmware failed checksum.\n",
  837. ha->host_no));
  838. }
  839. }
  840. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  841. /* Enable proper parity. */
  842. spin_lock_irqsave(&ha->hardware_lock, flags);
  843. if (IS_QLA2300(ha))
  844. /* SRAM parity */
  845. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  846. else
  847. /* SRAM, Instruction RAM and GP RAM parity */
  848. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  849. RD_REG_WORD(&reg->hccr);
  850. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  851. }
  852. if (rval) {
  853. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  854. ha->host_no));
  855. }
  856. return (rval);
  857. }
  858. /**
  859. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  860. * @ha: HA context
  861. *
  862. * Beginning of request ring has initialization control block already built
  863. * by nvram config routine.
  864. *
  865. * Returns 0 on success.
  866. */
  867. static void
  868. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  869. {
  870. uint16_t cnt;
  871. response_t *pkt;
  872. pkt = ha->response_ring_ptr;
  873. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  874. pkt->signature = RESPONSE_PROCESSED;
  875. pkt++;
  876. }
  877. }
  878. /**
  879. * qla2x00_update_fw_options() - Read and process firmware options.
  880. * @ha: HA context
  881. *
  882. * Returns 0 on success.
  883. */
  884. void
  885. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  886. {
  887. uint16_t swing, emphasis, tx_sens, rx_sens;
  888. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  889. qla2x00_get_fw_options(ha, ha->fw_options);
  890. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  891. return;
  892. /* Serial Link options. */
  893. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  894. ha->host_no));
  895. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  896. sizeof(ha->fw_seriallink_options)));
  897. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  898. if (ha->fw_seriallink_options[3] & BIT_2) {
  899. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  900. /* 1G settings */
  901. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  902. emphasis = (ha->fw_seriallink_options[2] &
  903. (BIT_4 | BIT_3)) >> 3;
  904. tx_sens = ha->fw_seriallink_options[0] &
  905. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  906. rx_sens = (ha->fw_seriallink_options[0] &
  907. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  908. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  909. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  910. if (rx_sens == 0x0)
  911. rx_sens = 0x3;
  912. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  913. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  914. ha->fw_options[10] |= BIT_5 |
  915. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  916. (tx_sens & (BIT_1 | BIT_0));
  917. /* 2G settings */
  918. swing = (ha->fw_seriallink_options[2] &
  919. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  920. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  921. tx_sens = ha->fw_seriallink_options[1] &
  922. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  923. rx_sens = (ha->fw_seriallink_options[1] &
  924. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  925. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  926. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  927. if (rx_sens == 0x0)
  928. rx_sens = 0x3;
  929. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  930. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  931. ha->fw_options[11] |= BIT_5 |
  932. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  933. (tx_sens & (BIT_1 | BIT_0));
  934. }
  935. /* FCP2 options. */
  936. /* Return command IOCBs without waiting for an ABTS to complete. */
  937. ha->fw_options[3] |= BIT_13;
  938. /* LED scheme. */
  939. if (ha->flags.enable_led_scheme)
  940. ha->fw_options[2] |= BIT_12;
  941. /* Detect ISP6312. */
  942. if (IS_QLA6312(ha))
  943. ha->fw_options[2] |= BIT_13;
  944. /* Update firmware options. */
  945. qla2x00_set_fw_options(ha, ha->fw_options);
  946. }
  947. void
  948. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  949. {
  950. int rval;
  951. /* Update Serial Link options. */
  952. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  953. return;
  954. rval = qla2x00_set_serdes_params(ha,
  955. le16_to_cpu(ha->fw_seriallink_options24[1]),
  956. le16_to_cpu(ha->fw_seriallink_options24[2]),
  957. le16_to_cpu(ha->fw_seriallink_options24[3]));
  958. if (rval != QLA_SUCCESS) {
  959. qla_printk(KERN_WARNING, ha,
  960. "Unable to update Serial Link options (%x).\n", rval);
  961. }
  962. }
  963. void
  964. qla2x00_config_rings(struct scsi_qla_host *ha)
  965. {
  966. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  967. /* Setup ring parameters in initialization control block. */
  968. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  969. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  970. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  971. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  972. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  973. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  974. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  975. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  976. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  977. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  978. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  979. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  980. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  981. }
  982. void
  983. qla24xx_config_rings(struct scsi_qla_host *ha)
  984. {
  985. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  986. struct init_cb_24xx *icb;
  987. /* Setup ring parameters in initialization control block. */
  988. icb = (struct init_cb_24xx *)ha->init_cb;
  989. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  990. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  991. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  992. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  993. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  994. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  995. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  996. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  997. WRT_REG_DWORD(&reg->req_q_in, 0);
  998. WRT_REG_DWORD(&reg->req_q_out, 0);
  999. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  1000. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  1001. RD_REG_DWORD(&reg->rsp_q_out);
  1002. }
  1003. /**
  1004. * qla2x00_init_rings() - Initializes firmware.
  1005. * @ha: HA context
  1006. *
  1007. * Beginning of request ring has initialization control block already built
  1008. * by nvram config routine.
  1009. *
  1010. * Returns 0 on success.
  1011. */
  1012. static int
  1013. qla2x00_init_rings(scsi_qla_host_t *ha)
  1014. {
  1015. int rval;
  1016. unsigned long flags = 0;
  1017. int cnt;
  1018. struct mid_init_cb_24xx *mid_init_cb =
  1019. (struct mid_init_cb_24xx *) ha->init_cb;
  1020. spin_lock_irqsave(&ha->hardware_lock, flags);
  1021. /* Clear outstanding commands array. */
  1022. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1023. ha->outstanding_cmds[cnt] = NULL;
  1024. ha->current_outstanding_cmd = 0;
  1025. /* Clear RSCN queue. */
  1026. ha->rscn_in_ptr = 0;
  1027. ha->rscn_out_ptr = 0;
  1028. /* Initialize firmware. */
  1029. ha->request_ring_ptr = ha->request_ring;
  1030. ha->req_ring_index = 0;
  1031. ha->req_q_cnt = ha->request_q_length;
  1032. ha->response_ring_ptr = ha->response_ring;
  1033. ha->rsp_ring_index = 0;
  1034. /* Initialize response queue entries */
  1035. qla2x00_init_response_q_entries(ha);
  1036. ha->isp_ops->config_rings(ha);
  1037. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1038. /* Update any ISP specific firmware options before initialization. */
  1039. ha->isp_ops->update_fw_options(ha);
  1040. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  1041. if (ha->flags.npiv_supported)
  1042. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1043. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1044. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  1045. if (rval) {
  1046. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1047. ha->host_no));
  1048. } else {
  1049. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1050. ha->host_no));
  1051. }
  1052. return (rval);
  1053. }
  1054. /**
  1055. * qla2x00_fw_ready() - Waits for firmware ready.
  1056. * @ha: HA context
  1057. *
  1058. * Returns 0 on success.
  1059. */
  1060. static int
  1061. qla2x00_fw_ready(scsi_qla_host_t *ha)
  1062. {
  1063. int rval;
  1064. unsigned long wtime, mtime, cs84xx_time;
  1065. uint16_t min_wait; /* Minimum wait time if loop is down */
  1066. uint16_t wait_time; /* Wait time if loop is coming ready */
  1067. uint16_t state[3];
  1068. rval = QLA_SUCCESS;
  1069. /* 20 seconds for loop down. */
  1070. min_wait = 20;
  1071. /*
  1072. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1073. * our own processing.
  1074. */
  1075. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1076. wait_time = min_wait;
  1077. }
  1078. /* Min wait time if loop down */
  1079. mtime = jiffies + (min_wait * HZ);
  1080. /* wait time before firmware ready */
  1081. wtime = jiffies + (wait_time * HZ);
  1082. /* Wait for ISP to finish LIP */
  1083. if (!ha->flags.init_done)
  1084. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1085. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1086. ha->host_no));
  1087. do {
  1088. rval = qla2x00_get_firmware_state(ha, state);
  1089. if (rval == QLA_SUCCESS) {
  1090. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1091. ha->device_flags &= ~DFLG_NO_CABLE;
  1092. }
  1093. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1094. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1095. "84xx=%x.\n", ha->host_no, state[0],
  1096. state[2]));
  1097. if ((state[2] & FSTATE_LOGGED_IN) &&
  1098. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1099. DEBUG16(printk("scsi(%ld): Sending "
  1100. "verify iocb.\n", ha->host_no));
  1101. cs84xx_time = jiffies;
  1102. rval = qla84xx_init_chip(ha);
  1103. if (rval != QLA_SUCCESS)
  1104. break;
  1105. /* Add time taken to initialize. */
  1106. cs84xx_time = jiffies - cs84xx_time;
  1107. wtime += cs84xx_time;
  1108. mtime += cs84xx_time;
  1109. DEBUG16(printk("scsi(%ld): Increasing "
  1110. "wait time by %ld. New time %ld\n",
  1111. ha->host_no, cs84xx_time, wtime));
  1112. }
  1113. } else if (state[0] == FSTATE_READY) {
  1114. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1115. ha->host_no));
  1116. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  1117. &ha->login_timeout, &ha->r_a_tov);
  1118. rval = QLA_SUCCESS;
  1119. break;
  1120. }
  1121. rval = QLA_FUNCTION_FAILED;
  1122. if (atomic_read(&ha->loop_down_timer) &&
  1123. state[0] != FSTATE_READY) {
  1124. /* Loop down. Timeout on min_wait for states
  1125. * other than Wait for Login.
  1126. */
  1127. if (time_after_eq(jiffies, mtime)) {
  1128. qla_printk(KERN_INFO, ha,
  1129. "Cable is unplugged...\n");
  1130. ha->device_flags |= DFLG_NO_CABLE;
  1131. break;
  1132. }
  1133. }
  1134. } else {
  1135. /* Mailbox cmd failed. Timeout on min_wait. */
  1136. if (time_after_eq(jiffies, mtime))
  1137. break;
  1138. }
  1139. if (time_after_eq(jiffies, wtime))
  1140. break;
  1141. /* Delay for a while */
  1142. msleep(500);
  1143. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1144. ha->host_no, state[0], jiffies));
  1145. } while (1);
  1146. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1147. ha->host_no, state[0], jiffies));
  1148. if (rval) {
  1149. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1150. ha->host_no));
  1151. }
  1152. return (rval);
  1153. }
  1154. /*
  1155. * qla2x00_configure_hba
  1156. * Setup adapter context.
  1157. *
  1158. * Input:
  1159. * ha = adapter state pointer.
  1160. *
  1161. * Returns:
  1162. * 0 = success
  1163. *
  1164. * Context:
  1165. * Kernel context.
  1166. */
  1167. static int
  1168. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1169. {
  1170. int rval;
  1171. uint16_t loop_id;
  1172. uint16_t topo;
  1173. uint16_t sw_cap;
  1174. uint8_t al_pa;
  1175. uint8_t area;
  1176. uint8_t domain;
  1177. char connect_type[22];
  1178. /* Get host addresses. */
  1179. rval = qla2x00_get_adapter_id(ha,
  1180. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1181. if (rval != QLA_SUCCESS) {
  1182. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1183. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1184. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1185. __func__, ha->host_no));
  1186. } else {
  1187. qla_printk(KERN_WARNING, ha,
  1188. "ERROR -- Unable to get host loop ID.\n");
  1189. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1190. }
  1191. return (rval);
  1192. }
  1193. if (topo == 4) {
  1194. qla_printk(KERN_INFO, ha,
  1195. "Cannot get topology - retrying.\n");
  1196. return (QLA_FUNCTION_FAILED);
  1197. }
  1198. ha->loop_id = loop_id;
  1199. /* initialize */
  1200. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1201. ha->operating_mode = LOOP;
  1202. ha->switch_cap = 0;
  1203. switch (topo) {
  1204. case 0:
  1205. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1206. ha->host_no));
  1207. ha->current_topology = ISP_CFG_NL;
  1208. strcpy(connect_type, "(Loop)");
  1209. break;
  1210. case 1:
  1211. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1212. ha->host_no));
  1213. ha->switch_cap = sw_cap;
  1214. ha->current_topology = ISP_CFG_FL;
  1215. strcpy(connect_type, "(FL_Port)");
  1216. break;
  1217. case 2:
  1218. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1219. ha->host_no));
  1220. ha->operating_mode = P2P;
  1221. ha->current_topology = ISP_CFG_N;
  1222. strcpy(connect_type, "(N_Port-to-N_Port)");
  1223. break;
  1224. case 3:
  1225. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1226. ha->host_no));
  1227. ha->switch_cap = sw_cap;
  1228. ha->operating_mode = P2P;
  1229. ha->current_topology = ISP_CFG_F;
  1230. strcpy(connect_type, "(F_Port)");
  1231. break;
  1232. default:
  1233. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1234. "Using NL.\n",
  1235. ha->host_no, topo));
  1236. ha->current_topology = ISP_CFG_NL;
  1237. strcpy(connect_type, "(Loop)");
  1238. break;
  1239. }
  1240. /* Save Host port and loop ID. */
  1241. /* byte order - Big Endian */
  1242. ha->d_id.b.domain = domain;
  1243. ha->d_id.b.area = area;
  1244. ha->d_id.b.al_pa = al_pa;
  1245. if (!ha->flags.init_done)
  1246. qla_printk(KERN_INFO, ha,
  1247. "Topology - %s, Host Loop address 0x%x\n",
  1248. connect_type, ha->loop_id);
  1249. if (rval) {
  1250. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1251. } else {
  1252. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1253. }
  1254. return(rval);
  1255. }
  1256. static inline void
  1257. qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def)
  1258. {
  1259. char *st, *en;
  1260. uint16_t index;
  1261. if (memcmp(model, BINZERO, len) != 0) {
  1262. strncpy(ha->model_number, model, len);
  1263. st = en = ha->model_number;
  1264. en += len - 1;
  1265. while (en > st) {
  1266. if (*en != 0x20 && *en != 0x00)
  1267. break;
  1268. *en-- = '\0';
  1269. }
  1270. index = (ha->pdev->subsystem_device & 0xff);
  1271. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1272. index < QLA_MODEL_NAMES)
  1273. strncpy(ha->model_desc,
  1274. qla2x00_model_name[index * 2 + 1],
  1275. sizeof(ha->model_desc) - 1);
  1276. } else {
  1277. index = (ha->pdev->subsystem_device & 0xff);
  1278. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1279. index < QLA_MODEL_NAMES) {
  1280. strcpy(ha->model_number,
  1281. qla2x00_model_name[index * 2]);
  1282. strncpy(ha->model_desc,
  1283. qla2x00_model_name[index * 2 + 1],
  1284. sizeof(ha->model_desc) - 1);
  1285. } else {
  1286. strcpy(ha->model_number, def);
  1287. }
  1288. }
  1289. if (IS_FWI2_CAPABLE(ha))
  1290. qla2xxx_get_vpd_field(ha, "\x82", ha->model_desc,
  1291. sizeof(ha->model_desc));
  1292. }
  1293. /* On sparc systems, obtain port and node WWN from firmware
  1294. * properties.
  1295. */
  1296. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv)
  1297. {
  1298. #ifdef CONFIG_SPARC
  1299. struct pci_dev *pdev = ha->pdev;
  1300. struct device_node *dp = pci_device_to_OF_node(pdev);
  1301. const u8 *val;
  1302. int len;
  1303. val = of_get_property(dp, "port-wwn", &len);
  1304. if (val && len >= WWN_SIZE)
  1305. memcpy(nv->port_name, val, WWN_SIZE);
  1306. val = of_get_property(dp, "node-wwn", &len);
  1307. if (val && len >= WWN_SIZE)
  1308. memcpy(nv->node_name, val, WWN_SIZE);
  1309. #endif
  1310. }
  1311. /*
  1312. * NVRAM configuration for ISP 2xxx
  1313. *
  1314. * Input:
  1315. * ha = adapter block pointer.
  1316. *
  1317. * Output:
  1318. * initialization control block in response_ring
  1319. * host adapters parameters in host adapter block
  1320. *
  1321. * Returns:
  1322. * 0 = success.
  1323. */
  1324. int
  1325. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1326. {
  1327. int rval;
  1328. uint8_t chksum = 0;
  1329. uint16_t cnt;
  1330. uint8_t *dptr1, *dptr2;
  1331. init_cb_t *icb = ha->init_cb;
  1332. nvram_t *nv = ha->nvram;
  1333. uint8_t *ptr = ha->nvram;
  1334. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1335. rval = QLA_SUCCESS;
  1336. /* Determine NVRAM starting address. */
  1337. ha->nvram_size = sizeof(nvram_t);
  1338. ha->nvram_base = 0;
  1339. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1340. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1341. ha->nvram_base = 0x80;
  1342. /* Get NVRAM data and calculate checksum. */
  1343. ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1344. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1345. chksum += *ptr++;
  1346. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1347. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1348. /* Bad NVRAM data, set defaults parameters. */
  1349. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1350. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1351. /* Reset NVRAM data. */
  1352. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1353. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1354. nv->nvram_version);
  1355. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1356. "invalid -- WWPN) defaults.\n");
  1357. if (chksum)
  1358. qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1359. MSW(chksum), LSW(chksum));
  1360. /*
  1361. * Set default initialization control block.
  1362. */
  1363. memset(nv, 0, ha->nvram_size);
  1364. nv->parameter_block_version = ICB_VERSION;
  1365. if (IS_QLA23XX(ha)) {
  1366. nv->firmware_options[0] = BIT_2 | BIT_1;
  1367. nv->firmware_options[1] = BIT_7 | BIT_5;
  1368. nv->add_firmware_options[0] = BIT_5;
  1369. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1370. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1371. nv->special_options[1] = BIT_7;
  1372. } else if (IS_QLA2200(ha)) {
  1373. nv->firmware_options[0] = BIT_2 | BIT_1;
  1374. nv->firmware_options[1] = BIT_7 | BIT_5;
  1375. nv->add_firmware_options[0] = BIT_5;
  1376. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1377. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1378. } else if (IS_QLA2100(ha)) {
  1379. nv->firmware_options[0] = BIT_3 | BIT_1;
  1380. nv->firmware_options[1] = BIT_5;
  1381. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1382. }
  1383. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1384. nv->execution_throttle = __constant_cpu_to_le16(16);
  1385. nv->retry_count = 8;
  1386. nv->retry_delay = 1;
  1387. nv->port_name[0] = 33;
  1388. nv->port_name[3] = 224;
  1389. nv->port_name[4] = 139;
  1390. qla2xxx_nvram_wwn_from_ofw(ha, nv);
  1391. nv->login_timeout = 4;
  1392. /*
  1393. * Set default host adapter parameters
  1394. */
  1395. nv->host_p[1] = BIT_2;
  1396. nv->reset_delay = 5;
  1397. nv->port_down_retry_count = 8;
  1398. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1399. nv->link_down_timeout = 60;
  1400. rval = 1;
  1401. }
  1402. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1403. /*
  1404. * The SN2 does not provide BIOS emulation which means you can't change
  1405. * potentially bogus BIOS settings. Force the use of default settings
  1406. * for link rate and frame size. Hope that the rest of the settings
  1407. * are valid.
  1408. */
  1409. if (ia64_platform_is("sn2")) {
  1410. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1411. if (IS_QLA23XX(ha))
  1412. nv->special_options[1] = BIT_7;
  1413. }
  1414. #endif
  1415. /* Reset Initialization control block */
  1416. memset(icb, 0, ha->init_cb_size);
  1417. /*
  1418. * Setup driver NVRAM options.
  1419. */
  1420. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1421. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1422. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1423. nv->firmware_options[1] &= ~BIT_4;
  1424. if (IS_QLA23XX(ha)) {
  1425. nv->firmware_options[0] |= BIT_2;
  1426. nv->firmware_options[0] &= ~BIT_3;
  1427. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1428. if (IS_QLA2300(ha)) {
  1429. if (ha->fb_rev == FPM_2310) {
  1430. strcpy(ha->model_number, "QLA2310");
  1431. } else {
  1432. strcpy(ha->model_number, "QLA2300");
  1433. }
  1434. } else {
  1435. qla2x00_set_model_info(ha, nv->model_number,
  1436. sizeof(nv->model_number), "QLA23xx");
  1437. }
  1438. } else if (IS_QLA2200(ha)) {
  1439. nv->firmware_options[0] |= BIT_2;
  1440. /*
  1441. * 'Point-to-point preferred, else loop' is not a safe
  1442. * connection mode setting.
  1443. */
  1444. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1445. (BIT_5 | BIT_4)) {
  1446. /* Force 'loop preferred, else point-to-point'. */
  1447. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1448. nv->add_firmware_options[0] |= BIT_5;
  1449. }
  1450. strcpy(ha->model_number, "QLA22xx");
  1451. } else /*if (IS_QLA2100(ha))*/ {
  1452. strcpy(ha->model_number, "QLA2100");
  1453. }
  1454. /*
  1455. * Copy over NVRAM RISC parameter block to initialization control block.
  1456. */
  1457. dptr1 = (uint8_t *)icb;
  1458. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1459. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1460. while (cnt--)
  1461. *dptr1++ = *dptr2++;
  1462. /* Copy 2nd half. */
  1463. dptr1 = (uint8_t *)icb->add_firmware_options;
  1464. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1465. while (cnt--)
  1466. *dptr1++ = *dptr2++;
  1467. /* Use alternate WWN? */
  1468. if (nv->host_p[1] & BIT_7) {
  1469. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1470. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1471. }
  1472. /* Prepare nodename */
  1473. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1474. /*
  1475. * Firmware will apply the following mask if the nodename was
  1476. * not provided.
  1477. */
  1478. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1479. icb->node_name[0] &= 0xF0;
  1480. }
  1481. /*
  1482. * Set host adapter parameters.
  1483. */
  1484. if (nv->host_p[0] & BIT_7)
  1485. ql2xextended_error_logging = 1;
  1486. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1487. /* Always load RISC code on non ISP2[12]00 chips. */
  1488. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1489. ha->flags.disable_risc_code_load = 0;
  1490. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1491. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1492. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1493. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1494. ha->flags.disable_serdes = 0;
  1495. ha->operating_mode =
  1496. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1497. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1498. sizeof(ha->fw_seriallink_options));
  1499. /* save HBA serial number */
  1500. ha->serial0 = icb->port_name[5];
  1501. ha->serial1 = icb->port_name[6];
  1502. ha->serial2 = icb->port_name[7];
  1503. ha->node_name = icb->node_name;
  1504. ha->port_name = icb->port_name;
  1505. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1506. ha->retry_count = nv->retry_count;
  1507. /* Set minimum login_timeout to 4 seconds. */
  1508. if (nv->login_timeout < ql2xlogintimeout)
  1509. nv->login_timeout = ql2xlogintimeout;
  1510. if (nv->login_timeout < 4)
  1511. nv->login_timeout = 4;
  1512. ha->login_timeout = nv->login_timeout;
  1513. icb->login_timeout = nv->login_timeout;
  1514. /* Set minimum RATOV to 100 tenths of a second. */
  1515. ha->r_a_tov = 100;
  1516. ha->loop_reset_delay = nv->reset_delay;
  1517. /* Link Down Timeout = 0:
  1518. *
  1519. * When Port Down timer expires we will start returning
  1520. * I/O's to OS with "DID_NO_CONNECT".
  1521. *
  1522. * Link Down Timeout != 0:
  1523. *
  1524. * The driver waits for the link to come up after link down
  1525. * before returning I/Os to OS with "DID_NO_CONNECT".
  1526. */
  1527. if (nv->link_down_timeout == 0) {
  1528. ha->loop_down_abort_time =
  1529. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1530. } else {
  1531. ha->link_down_timeout = nv->link_down_timeout;
  1532. ha->loop_down_abort_time =
  1533. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1534. }
  1535. /*
  1536. * Need enough time to try and get the port back.
  1537. */
  1538. ha->port_down_retry_count = nv->port_down_retry_count;
  1539. if (qlport_down_retry)
  1540. ha->port_down_retry_count = qlport_down_retry;
  1541. /* Set login_retry_count */
  1542. ha->login_retry_count = nv->retry_count;
  1543. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1544. ha->port_down_retry_count > 3)
  1545. ha->login_retry_count = ha->port_down_retry_count;
  1546. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1547. ha->login_retry_count = ha->port_down_retry_count;
  1548. if (ql2xloginretrycount)
  1549. ha->login_retry_count = ql2xloginretrycount;
  1550. icb->lun_enables = __constant_cpu_to_le16(0);
  1551. icb->command_resource_count = 0;
  1552. icb->immediate_notify_resource_count = 0;
  1553. icb->timeout = __constant_cpu_to_le16(0);
  1554. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1555. /* Enable RIO */
  1556. icb->firmware_options[0] &= ~BIT_3;
  1557. icb->add_firmware_options[0] &=
  1558. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1559. icb->add_firmware_options[0] |= BIT_2;
  1560. icb->response_accumulation_timer = 3;
  1561. icb->interrupt_delay_timer = 5;
  1562. ha->flags.process_response_queue = 1;
  1563. } else {
  1564. /* Enable ZIO. */
  1565. if (!ha->flags.init_done) {
  1566. ha->zio_mode = icb->add_firmware_options[0] &
  1567. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1568. ha->zio_timer = icb->interrupt_delay_timer ?
  1569. icb->interrupt_delay_timer: 2;
  1570. }
  1571. icb->add_firmware_options[0] &=
  1572. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1573. ha->flags.process_response_queue = 0;
  1574. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1575. ha->zio_mode = QLA_ZIO_MODE_6;
  1576. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1577. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1578. ha->zio_timer * 100));
  1579. qla_printk(KERN_INFO, ha,
  1580. "ZIO mode %d enabled; timer delay (%d us).\n",
  1581. ha->zio_mode, ha->zio_timer * 100);
  1582. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1583. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1584. ha->flags.process_response_queue = 1;
  1585. }
  1586. }
  1587. if (rval) {
  1588. DEBUG2_3(printk(KERN_WARNING
  1589. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1590. }
  1591. return (rval);
  1592. }
  1593. static void
  1594. qla2x00_rport_del(void *data)
  1595. {
  1596. fc_port_t *fcport = data;
  1597. struct fc_rport *rport;
  1598. spin_lock_irq(fcport->ha->host->host_lock);
  1599. rport = fcport->drport;
  1600. fcport->drport = NULL;
  1601. spin_unlock_irq(fcport->ha->host->host_lock);
  1602. if (rport)
  1603. fc_remote_port_delete(rport);
  1604. }
  1605. /**
  1606. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1607. * @ha: HA context
  1608. * @flags: allocation flags
  1609. *
  1610. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1611. */
  1612. static fc_port_t *
  1613. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1614. {
  1615. fc_port_t *fcport;
  1616. fcport = kzalloc(sizeof(fc_port_t), flags);
  1617. if (!fcport)
  1618. return NULL;
  1619. /* Setup fcport template structure. */
  1620. fcport->ha = ha;
  1621. fcport->vp_idx = ha->vp_idx;
  1622. fcport->port_type = FCT_UNKNOWN;
  1623. fcport->loop_id = FC_NO_LOOP_ID;
  1624. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1625. fcport->flags = FCF_RLC_SUPPORT;
  1626. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1627. return fcport;
  1628. }
  1629. /*
  1630. * qla2x00_configure_loop
  1631. * Updates Fibre Channel Device Database with what is actually on loop.
  1632. *
  1633. * Input:
  1634. * ha = adapter block pointer.
  1635. *
  1636. * Returns:
  1637. * 0 = success.
  1638. * 1 = error.
  1639. * 2 = database was full and device was not configured.
  1640. */
  1641. static int
  1642. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1643. {
  1644. int rval;
  1645. unsigned long flags, save_flags;
  1646. rval = QLA_SUCCESS;
  1647. /* Get Initiator ID */
  1648. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1649. rval = qla2x00_configure_hba(ha);
  1650. if (rval != QLA_SUCCESS) {
  1651. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1652. ha->host_no));
  1653. return (rval);
  1654. }
  1655. }
  1656. save_flags = flags = ha->dpc_flags;
  1657. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1658. ha->host_no, flags));
  1659. /*
  1660. * If we have both an RSCN and PORT UPDATE pending then handle them
  1661. * both at the same time.
  1662. */
  1663. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1664. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1665. /* Determine what we need to do */
  1666. if (ha->current_topology == ISP_CFG_FL &&
  1667. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1668. ha->flags.rscn_queue_overflow = 1;
  1669. set_bit(RSCN_UPDATE, &flags);
  1670. } else if (ha->current_topology == ISP_CFG_F &&
  1671. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1672. ha->flags.rscn_queue_overflow = 1;
  1673. set_bit(RSCN_UPDATE, &flags);
  1674. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1675. } else if (ha->current_topology == ISP_CFG_N) {
  1676. clear_bit(RSCN_UPDATE, &flags);
  1677. } else if (!ha->flags.online ||
  1678. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1679. ha->flags.rscn_queue_overflow = 1;
  1680. set_bit(RSCN_UPDATE, &flags);
  1681. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1682. }
  1683. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1684. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1685. rval = QLA_FUNCTION_FAILED;
  1686. } else {
  1687. rval = qla2x00_configure_local_loop(ha);
  1688. }
  1689. }
  1690. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1691. if (LOOP_TRANSITION(ha)) {
  1692. rval = QLA_FUNCTION_FAILED;
  1693. } else {
  1694. rval = qla2x00_configure_fabric(ha);
  1695. }
  1696. }
  1697. if (rval == QLA_SUCCESS) {
  1698. if (atomic_read(&ha->loop_down_timer) ||
  1699. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1700. rval = QLA_FUNCTION_FAILED;
  1701. } else {
  1702. atomic_set(&ha->loop_state, LOOP_READY);
  1703. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1704. }
  1705. }
  1706. if (rval) {
  1707. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1708. __func__, ha->host_no));
  1709. } else {
  1710. DEBUG3(printk("%s: exiting normally\n", __func__));
  1711. }
  1712. /* Restore state if a resync event occurred during processing */
  1713. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1714. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1715. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1716. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1717. ha->flags.rscn_queue_overflow = 1;
  1718. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1719. }
  1720. }
  1721. return (rval);
  1722. }
  1723. /*
  1724. * qla2x00_configure_local_loop
  1725. * Updates Fibre Channel Device Database with local loop devices.
  1726. *
  1727. * Input:
  1728. * ha = adapter block pointer.
  1729. *
  1730. * Returns:
  1731. * 0 = success.
  1732. */
  1733. static int
  1734. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1735. {
  1736. int rval, rval2;
  1737. int found_devs;
  1738. int found;
  1739. fc_port_t *fcport, *new_fcport;
  1740. uint16_t index;
  1741. uint16_t entries;
  1742. char *id_iter;
  1743. uint16_t loop_id;
  1744. uint8_t domain, area, al_pa;
  1745. scsi_qla_host_t *pha = to_qla_parent(ha);
  1746. found_devs = 0;
  1747. new_fcport = NULL;
  1748. entries = MAX_FIBRE_DEVICES;
  1749. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1750. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1751. /* Get list of logged in devices. */
  1752. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1753. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1754. &entries);
  1755. if (rval != QLA_SUCCESS)
  1756. goto cleanup_allocation;
  1757. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1758. ha->host_no, entries));
  1759. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1760. entries * sizeof(struct gid_list_info)));
  1761. /* Allocate temporary fcport for any new fcports discovered. */
  1762. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1763. if (new_fcport == NULL) {
  1764. rval = QLA_MEMORY_ALLOC_FAILED;
  1765. goto cleanup_allocation;
  1766. }
  1767. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1768. /*
  1769. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1770. */
  1771. list_for_each_entry(fcport, &pha->fcports, list) {
  1772. if (fcport->vp_idx != ha->vp_idx)
  1773. continue;
  1774. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1775. fcport->port_type != FCT_BROADCAST &&
  1776. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1777. DEBUG(printk("scsi(%ld): Marking port lost, "
  1778. "loop_id=0x%04x\n",
  1779. ha->host_no, fcport->loop_id));
  1780. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1781. fcport->flags &= ~FCF_FARP_DONE;
  1782. }
  1783. }
  1784. /* Add devices to port list. */
  1785. id_iter = (char *)ha->gid_list;
  1786. for (index = 0; index < entries; index++) {
  1787. domain = ((struct gid_list_info *)id_iter)->domain;
  1788. area = ((struct gid_list_info *)id_iter)->area;
  1789. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1790. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1791. loop_id = (uint16_t)
  1792. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1793. else
  1794. loop_id = le16_to_cpu(
  1795. ((struct gid_list_info *)id_iter)->loop_id);
  1796. id_iter += ha->gid_list_info_size;
  1797. /* Bypass reserved domain fields. */
  1798. if ((domain & 0xf0) == 0xf0)
  1799. continue;
  1800. /* Bypass if not same domain and area of adapter. */
  1801. if (area && domain &&
  1802. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1803. continue;
  1804. /* Bypass invalid local loop ID. */
  1805. if (loop_id > LAST_LOCAL_LOOP_ID)
  1806. continue;
  1807. /* Fill in member data. */
  1808. new_fcport->d_id.b.domain = domain;
  1809. new_fcport->d_id.b.area = area;
  1810. new_fcport->d_id.b.al_pa = al_pa;
  1811. new_fcport->loop_id = loop_id;
  1812. new_fcport->vp_idx = ha->vp_idx;
  1813. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1814. if (rval2 != QLA_SUCCESS) {
  1815. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1816. "information -- get_port_database=%x, "
  1817. "loop_id=0x%04x\n",
  1818. ha->host_no, rval2, new_fcport->loop_id));
  1819. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1820. ha->host_no));
  1821. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1822. continue;
  1823. }
  1824. /* Check for matching device in port list. */
  1825. found = 0;
  1826. fcport = NULL;
  1827. list_for_each_entry(fcport, &pha->fcports, list) {
  1828. if (fcport->vp_idx != ha->vp_idx)
  1829. continue;
  1830. if (memcmp(new_fcport->port_name, fcport->port_name,
  1831. WWN_SIZE))
  1832. continue;
  1833. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1834. FCF_PERSISTENT_BOUND);
  1835. fcport->loop_id = new_fcport->loop_id;
  1836. fcport->port_type = new_fcport->port_type;
  1837. fcport->d_id.b24 = new_fcport->d_id.b24;
  1838. memcpy(fcport->node_name, new_fcport->node_name,
  1839. WWN_SIZE);
  1840. found++;
  1841. break;
  1842. }
  1843. if (!found) {
  1844. /* New device, add to fcports list. */
  1845. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1846. if (ha->parent) {
  1847. new_fcport->ha = ha;
  1848. new_fcport->vp_idx = ha->vp_idx;
  1849. list_add_tail(&new_fcport->vp_fcport,
  1850. &ha->vp_fcports);
  1851. }
  1852. list_add_tail(&new_fcport->list, &pha->fcports);
  1853. /* Allocate a new replacement fcport. */
  1854. fcport = new_fcport;
  1855. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1856. if (new_fcport == NULL) {
  1857. rval = QLA_MEMORY_ALLOC_FAILED;
  1858. goto cleanup_allocation;
  1859. }
  1860. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1861. }
  1862. /* Base iIDMA settings on HBA port speed. */
  1863. fcport->fp_speed = ha->link_data_rate;
  1864. qla2x00_update_fcport(ha, fcport);
  1865. found_devs++;
  1866. }
  1867. cleanup_allocation:
  1868. kfree(new_fcport);
  1869. if (rval != QLA_SUCCESS) {
  1870. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1871. "rval=%x\n", ha->host_no, rval));
  1872. }
  1873. if (found_devs) {
  1874. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1875. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1876. }
  1877. return (rval);
  1878. }
  1879. static void
  1880. qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1881. {
  1882. #define LS_UNKNOWN 2
  1883. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1884. int rval;
  1885. uint16_t mb[6];
  1886. if (!IS_IIDMA_CAPABLE(ha))
  1887. return;
  1888. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1889. fcport->fp_speed > ha->link_data_rate)
  1890. return;
  1891. rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed,
  1892. mb);
  1893. if (rval != QLA_SUCCESS) {
  1894. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1895. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1896. ha->host_no, fcport->port_name[0], fcport->port_name[1],
  1897. fcport->port_name[2], fcport->port_name[3],
  1898. fcport->port_name[4], fcport->port_name[5],
  1899. fcport->port_name[6], fcport->port_name[7], rval,
  1900. fcport->fp_speed, mb[0], mb[1]));
  1901. } else {
  1902. DEBUG2(qla_printk(KERN_INFO, ha,
  1903. "iIDMA adjusted to %s GB/s on "
  1904. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1905. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1906. fcport->port_name[1], fcport->port_name[2],
  1907. fcport->port_name[3], fcport->port_name[4],
  1908. fcport->port_name[5], fcport->port_name[6],
  1909. fcport->port_name[7]));
  1910. }
  1911. }
  1912. static void
  1913. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1914. {
  1915. struct fc_rport_identifiers rport_ids;
  1916. struct fc_rport *rport;
  1917. if (fcport->drport)
  1918. qla2x00_rport_del(fcport);
  1919. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1920. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1921. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1922. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1923. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1924. fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1925. if (!rport) {
  1926. qla_printk(KERN_WARNING, ha,
  1927. "Unable to allocate fc remote port!\n");
  1928. return;
  1929. }
  1930. spin_lock_irq(fcport->ha->host->host_lock);
  1931. *((fc_port_t **)rport->dd_data) = fcport;
  1932. spin_unlock_irq(fcport->ha->host->host_lock);
  1933. rport->supported_classes = fcport->supported_classes;
  1934. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1935. if (fcport->port_type == FCT_INITIATOR)
  1936. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1937. if (fcport->port_type == FCT_TARGET)
  1938. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1939. fc_remote_port_rolechg(rport, rport_ids.roles);
  1940. }
  1941. /*
  1942. * qla2x00_update_fcport
  1943. * Updates device on list.
  1944. *
  1945. * Input:
  1946. * ha = adapter block pointer.
  1947. * fcport = port structure pointer.
  1948. *
  1949. * Return:
  1950. * 0 - Success
  1951. * BIT_0 - error
  1952. *
  1953. * Context:
  1954. * Kernel context.
  1955. */
  1956. void
  1957. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1958. {
  1959. scsi_qla_host_t *pha = to_qla_parent(ha);
  1960. fcport->ha = ha;
  1961. fcport->login_retry = 0;
  1962. fcport->port_login_retry_count = pha->port_down_retry_count *
  1963. PORT_RETRY_TIME;
  1964. atomic_set(&fcport->port_down_timer, pha->port_down_retry_count *
  1965. PORT_RETRY_TIME);
  1966. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1967. qla2x00_iidma_fcport(ha, fcport);
  1968. atomic_set(&fcport->state, FCS_ONLINE);
  1969. qla2x00_reg_remote_port(ha, fcport);
  1970. }
  1971. /*
  1972. * qla2x00_configure_fabric
  1973. * Setup SNS devices with loop ID's.
  1974. *
  1975. * Input:
  1976. * ha = adapter block pointer.
  1977. *
  1978. * Returns:
  1979. * 0 = success.
  1980. * BIT_0 = error
  1981. */
  1982. static int
  1983. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1984. {
  1985. int rval, rval2;
  1986. fc_port_t *fcport, *fcptemp;
  1987. uint16_t next_loopid;
  1988. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1989. uint16_t loop_id;
  1990. LIST_HEAD(new_fcports);
  1991. scsi_qla_host_t *pha = to_qla_parent(ha);
  1992. /* If FL port exists, then SNS is present */
  1993. if (IS_FWI2_CAPABLE(ha))
  1994. loop_id = NPH_F_PORT;
  1995. else
  1996. loop_id = SNS_FL_PORT;
  1997. rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1);
  1998. if (rval != QLA_SUCCESS) {
  1999. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2000. "Port\n", ha->host_no));
  2001. ha->device_flags &= ~SWITCH_FOUND;
  2002. return (QLA_SUCCESS);
  2003. }
  2004. ha->device_flags |= SWITCH_FOUND;
  2005. /* Mark devices that need re-synchronization. */
  2006. rval2 = qla2x00_device_resync(ha);
  2007. if (rval2 == QLA_RSCNS_HANDLED) {
  2008. /* No point doing the scan, just continue. */
  2009. return (QLA_SUCCESS);
  2010. }
  2011. do {
  2012. /* FDMI support. */
  2013. if (ql2xfdmienable &&
  2014. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  2015. qla2x00_fdmi_register(ha);
  2016. /* Ensure we are logged into the SNS. */
  2017. if (IS_FWI2_CAPABLE(ha))
  2018. loop_id = NPH_SNS;
  2019. else
  2020. loop_id = SIMPLE_NAME_SERVER;
  2021. ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff,
  2022. 0xfc, mb, BIT_1 | BIT_0);
  2023. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2024. DEBUG2(qla_printk(KERN_INFO, ha,
  2025. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2026. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2027. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2028. return (QLA_SUCCESS);
  2029. }
  2030. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  2031. if (qla2x00_rft_id(ha)) {
  2032. /* EMPTY */
  2033. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2034. "TYPE failed.\n", ha->host_no));
  2035. }
  2036. if (qla2x00_rff_id(ha)) {
  2037. /* EMPTY */
  2038. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2039. "Features failed.\n", ha->host_no));
  2040. }
  2041. if (qla2x00_rnn_id(ha)) {
  2042. /* EMPTY */
  2043. DEBUG2(printk("scsi(%ld): Register Node Name "
  2044. "failed.\n", ha->host_no));
  2045. } else if (qla2x00_rsnn_nn(ha)) {
  2046. /* EMPTY */
  2047. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2048. "Node Name failed.\n", ha->host_no));
  2049. }
  2050. }
  2051. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  2052. if (rval != QLA_SUCCESS)
  2053. break;
  2054. /*
  2055. * Logout all previous fabric devices marked lost, except
  2056. * tape devices.
  2057. */
  2058. list_for_each_entry(fcport, &pha->fcports, list) {
  2059. if (fcport->vp_idx !=ha->vp_idx)
  2060. continue;
  2061. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2062. break;
  2063. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2064. continue;
  2065. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2066. qla2x00_mark_device_lost(ha, fcport,
  2067. ql2xplogiabsentdevice, 0);
  2068. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2069. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2070. fcport->port_type != FCT_INITIATOR &&
  2071. fcport->port_type != FCT_BROADCAST) {
  2072. ha->isp_ops->fabric_logout(ha,
  2073. fcport->loop_id,
  2074. fcport->d_id.b.domain,
  2075. fcport->d_id.b.area,
  2076. fcport->d_id.b.al_pa);
  2077. fcport->loop_id = FC_NO_LOOP_ID;
  2078. }
  2079. }
  2080. }
  2081. /* Starting free loop ID. */
  2082. next_loopid = pha->min_external_loopid;
  2083. /*
  2084. * Scan through our port list and login entries that need to be
  2085. * logged in.
  2086. */
  2087. list_for_each_entry(fcport, &pha->fcports, list) {
  2088. if (fcport->vp_idx != ha->vp_idx)
  2089. continue;
  2090. if (atomic_read(&ha->loop_down_timer) ||
  2091. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2092. break;
  2093. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2094. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2095. continue;
  2096. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2097. fcport->loop_id = next_loopid;
  2098. rval = qla2x00_find_new_loop_id(
  2099. to_qla_parent(ha), fcport);
  2100. if (rval != QLA_SUCCESS) {
  2101. /* Ran out of IDs to use */
  2102. break;
  2103. }
  2104. }
  2105. /* Login and update database */
  2106. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2107. }
  2108. /* Exit if out of loop IDs. */
  2109. if (rval != QLA_SUCCESS) {
  2110. break;
  2111. }
  2112. /*
  2113. * Login and add the new devices to our port list.
  2114. */
  2115. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2116. if (atomic_read(&ha->loop_down_timer) ||
  2117. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2118. break;
  2119. /* Find a new loop ID to use. */
  2120. fcport->loop_id = next_loopid;
  2121. rval = qla2x00_find_new_loop_id(to_qla_parent(ha),
  2122. fcport);
  2123. if (rval != QLA_SUCCESS) {
  2124. /* Ran out of IDs to use */
  2125. break;
  2126. }
  2127. /* Login and update database */
  2128. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2129. if (ha->parent) {
  2130. fcport->ha = ha;
  2131. fcport->vp_idx = ha->vp_idx;
  2132. list_add_tail(&fcport->vp_fcport,
  2133. &ha->vp_fcports);
  2134. list_move_tail(&fcport->list,
  2135. &ha->parent->fcports);
  2136. } else
  2137. list_move_tail(&fcport->list, &ha->fcports);
  2138. }
  2139. } while (0);
  2140. /* Free all new device structures not processed. */
  2141. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2142. list_del(&fcport->list);
  2143. kfree(fcport);
  2144. }
  2145. if (rval) {
  2146. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2147. "rval=%d\n", ha->host_no, rval));
  2148. }
  2149. return (rval);
  2150. }
  2151. /*
  2152. * qla2x00_find_all_fabric_devs
  2153. *
  2154. * Input:
  2155. * ha = adapter block pointer.
  2156. * dev = database device entry pointer.
  2157. *
  2158. * Returns:
  2159. * 0 = success.
  2160. *
  2161. * Context:
  2162. * Kernel context.
  2163. */
  2164. static int
  2165. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  2166. {
  2167. int rval;
  2168. uint16_t loop_id;
  2169. fc_port_t *fcport, *new_fcport, *fcptemp;
  2170. int found;
  2171. sw_info_t *swl;
  2172. int swl_idx;
  2173. int first_dev, last_dev;
  2174. port_id_t wrap, nxt_d_id;
  2175. int vp_index;
  2176. int empty_vp_index;
  2177. int found_vp;
  2178. scsi_qla_host_t *vha;
  2179. scsi_qla_host_t *pha = to_qla_parent(ha);
  2180. rval = QLA_SUCCESS;
  2181. /* Try GID_PT to get device list, else GAN. */
  2182. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2183. if (!swl) {
  2184. /*EMPTY*/
  2185. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2186. "on GA_NXT\n", ha->host_no));
  2187. } else {
  2188. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  2189. kfree(swl);
  2190. swl = NULL;
  2191. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  2192. kfree(swl);
  2193. swl = NULL;
  2194. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  2195. kfree(swl);
  2196. swl = NULL;
  2197. } else if (ql2xiidmaenable &&
  2198. qla2x00_gfpn_id(ha, swl) == QLA_SUCCESS) {
  2199. qla2x00_gpsc(ha, swl);
  2200. }
  2201. }
  2202. swl_idx = 0;
  2203. /* Allocate temporary fcport for any new fcports discovered. */
  2204. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2205. if (new_fcport == NULL) {
  2206. kfree(swl);
  2207. return (QLA_MEMORY_ALLOC_FAILED);
  2208. }
  2209. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2210. new_fcport->vp_idx = ha->vp_idx;
  2211. /* Set start port ID scan at adapter ID. */
  2212. first_dev = 1;
  2213. last_dev = 0;
  2214. /* Starting free loop ID. */
  2215. loop_id = pha->min_external_loopid;
  2216. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2217. if (qla2x00_is_reserved_id(ha, loop_id))
  2218. continue;
  2219. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2220. break;
  2221. if (swl != NULL) {
  2222. if (last_dev) {
  2223. wrap.b24 = new_fcport->d_id.b24;
  2224. } else {
  2225. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2226. memcpy(new_fcport->node_name,
  2227. swl[swl_idx].node_name, WWN_SIZE);
  2228. memcpy(new_fcport->port_name,
  2229. swl[swl_idx].port_name, WWN_SIZE);
  2230. memcpy(new_fcport->fabric_port_name,
  2231. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2232. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2233. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2234. last_dev = 1;
  2235. }
  2236. swl_idx++;
  2237. }
  2238. } else {
  2239. /* Send GA_NXT to the switch */
  2240. rval = qla2x00_ga_nxt(ha, new_fcport);
  2241. if (rval != QLA_SUCCESS) {
  2242. qla_printk(KERN_WARNING, ha,
  2243. "SNS scan failed -- assuming zero-entry "
  2244. "result...\n");
  2245. list_for_each_entry_safe(fcport, fcptemp,
  2246. new_fcports, list) {
  2247. list_del(&fcport->list);
  2248. kfree(fcport);
  2249. }
  2250. rval = QLA_SUCCESS;
  2251. break;
  2252. }
  2253. }
  2254. /* If wrap on switch device list, exit. */
  2255. if (first_dev) {
  2256. wrap.b24 = new_fcport->d_id.b24;
  2257. first_dev = 0;
  2258. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2259. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2260. ha->host_no, new_fcport->d_id.b.domain,
  2261. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2262. break;
  2263. }
  2264. /* Bypass if same physical adapter. */
  2265. if (new_fcport->d_id.b24 == pha->d_id.b24)
  2266. continue;
  2267. /* Bypass virtual ports of the same host. */
  2268. if (pha->num_vhosts) {
  2269. for_each_mapped_vp_idx(pha, vp_index) {
  2270. empty_vp_index = 1;
  2271. found_vp = 0;
  2272. list_for_each_entry(vha, &pha->vp_list,
  2273. vp_list) {
  2274. if (vp_index == vha->vp_idx) {
  2275. empty_vp_index = 0;
  2276. found_vp = 1;
  2277. break;
  2278. }
  2279. }
  2280. if (empty_vp_index)
  2281. continue;
  2282. if (found_vp &&
  2283. new_fcport->d_id.b24 == vha->d_id.b24)
  2284. break;
  2285. }
  2286. if (vp_index <= pha->max_npiv_vports)
  2287. continue;
  2288. }
  2289. /* Bypass if same domain and area of adapter. */
  2290. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2291. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2292. ISP_CFG_FL)
  2293. continue;
  2294. /* Bypass reserved domain fields. */
  2295. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2296. continue;
  2297. /* Locate matching device in database. */
  2298. found = 0;
  2299. list_for_each_entry(fcport, &pha->fcports, list) {
  2300. if (new_fcport->vp_idx != fcport->vp_idx)
  2301. continue;
  2302. if (memcmp(new_fcport->port_name, fcport->port_name,
  2303. WWN_SIZE))
  2304. continue;
  2305. found++;
  2306. /* Update port state. */
  2307. memcpy(fcport->fabric_port_name,
  2308. new_fcport->fabric_port_name, WWN_SIZE);
  2309. fcport->fp_speed = new_fcport->fp_speed;
  2310. /*
  2311. * If address the same and state FCS_ONLINE, nothing
  2312. * changed.
  2313. */
  2314. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2315. atomic_read(&fcport->state) == FCS_ONLINE) {
  2316. break;
  2317. }
  2318. /*
  2319. * If device was not a fabric device before.
  2320. */
  2321. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2322. fcport->d_id.b24 = new_fcport->d_id.b24;
  2323. fcport->loop_id = FC_NO_LOOP_ID;
  2324. fcport->flags |= (FCF_FABRIC_DEVICE |
  2325. FCF_LOGIN_NEEDED);
  2326. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2327. break;
  2328. }
  2329. /*
  2330. * Port ID changed or device was marked to be updated;
  2331. * Log it out if still logged in and mark it for
  2332. * relogin later.
  2333. */
  2334. fcport->d_id.b24 = new_fcport->d_id.b24;
  2335. fcport->flags |= FCF_LOGIN_NEEDED;
  2336. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2337. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2338. fcport->port_type != FCT_INITIATOR &&
  2339. fcport->port_type != FCT_BROADCAST) {
  2340. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2341. fcport->d_id.b.domain, fcport->d_id.b.area,
  2342. fcport->d_id.b.al_pa);
  2343. fcport->loop_id = FC_NO_LOOP_ID;
  2344. }
  2345. break;
  2346. }
  2347. if (found)
  2348. continue;
  2349. /* If device was not in our fcports list, then add it. */
  2350. list_add_tail(&new_fcport->list, new_fcports);
  2351. /* Allocate a new replacement fcport. */
  2352. nxt_d_id.b24 = new_fcport->d_id.b24;
  2353. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2354. if (new_fcport == NULL) {
  2355. kfree(swl);
  2356. return (QLA_MEMORY_ALLOC_FAILED);
  2357. }
  2358. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2359. new_fcport->d_id.b24 = nxt_d_id.b24;
  2360. new_fcport->vp_idx = ha->vp_idx;
  2361. }
  2362. kfree(swl);
  2363. kfree(new_fcport);
  2364. if (!list_empty(new_fcports))
  2365. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2366. return (rval);
  2367. }
  2368. /*
  2369. * qla2x00_find_new_loop_id
  2370. * Scan through our port list and find a new usable loop ID.
  2371. *
  2372. * Input:
  2373. * ha: adapter state pointer.
  2374. * dev: port structure pointer.
  2375. *
  2376. * Returns:
  2377. * qla2x00 local function return status code.
  2378. *
  2379. * Context:
  2380. * Kernel context.
  2381. */
  2382. static int
  2383. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2384. {
  2385. int rval;
  2386. int found;
  2387. fc_port_t *fcport;
  2388. uint16_t first_loop_id;
  2389. scsi_qla_host_t *pha = to_qla_parent(ha);
  2390. rval = QLA_SUCCESS;
  2391. /* Save starting loop ID. */
  2392. first_loop_id = dev->loop_id;
  2393. for (;;) {
  2394. /* Skip loop ID if already used by adapter. */
  2395. if (dev->loop_id == ha->loop_id) {
  2396. dev->loop_id++;
  2397. }
  2398. /* Skip reserved loop IDs. */
  2399. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2400. dev->loop_id++;
  2401. }
  2402. /* Reset loop ID if passed the end. */
  2403. if (dev->loop_id > ha->last_loop_id) {
  2404. /* first loop ID. */
  2405. dev->loop_id = ha->min_external_loopid;
  2406. }
  2407. /* Check for loop ID being already in use. */
  2408. found = 0;
  2409. fcport = NULL;
  2410. list_for_each_entry(fcport, &pha->fcports, list) {
  2411. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2412. /* ID possibly in use */
  2413. found++;
  2414. break;
  2415. }
  2416. }
  2417. /* If not in use then it is free to use. */
  2418. if (!found) {
  2419. break;
  2420. }
  2421. /* ID in use. Try next value. */
  2422. dev->loop_id++;
  2423. /* If wrap around. No free ID to use. */
  2424. if (dev->loop_id == first_loop_id) {
  2425. dev->loop_id = FC_NO_LOOP_ID;
  2426. rval = QLA_FUNCTION_FAILED;
  2427. break;
  2428. }
  2429. }
  2430. return (rval);
  2431. }
  2432. /*
  2433. * qla2x00_device_resync
  2434. * Marks devices in the database that needs resynchronization.
  2435. *
  2436. * Input:
  2437. * ha = adapter block pointer.
  2438. *
  2439. * Context:
  2440. * Kernel context.
  2441. */
  2442. static int
  2443. qla2x00_device_resync(scsi_qla_host_t *ha)
  2444. {
  2445. int rval;
  2446. uint32_t mask;
  2447. fc_port_t *fcport;
  2448. uint32_t rscn_entry;
  2449. uint8_t rscn_out_iter;
  2450. uint8_t format;
  2451. port_id_t d_id;
  2452. scsi_qla_host_t *pha = to_qla_parent(ha);
  2453. rval = QLA_RSCNS_HANDLED;
  2454. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2455. ha->flags.rscn_queue_overflow) {
  2456. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2457. format = MSB(MSW(rscn_entry));
  2458. d_id.b.domain = LSB(MSW(rscn_entry));
  2459. d_id.b.area = MSB(LSW(rscn_entry));
  2460. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2461. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2462. "[%02x/%02x%02x%02x].\n",
  2463. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2464. d_id.b.area, d_id.b.al_pa));
  2465. ha->rscn_out_ptr++;
  2466. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2467. ha->rscn_out_ptr = 0;
  2468. /* Skip duplicate entries. */
  2469. for (rscn_out_iter = ha->rscn_out_ptr;
  2470. !ha->flags.rscn_queue_overflow &&
  2471. rscn_out_iter != ha->rscn_in_ptr;
  2472. rscn_out_iter = (rscn_out_iter ==
  2473. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2474. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2475. break;
  2476. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2477. "entry found at [%d].\n", ha->host_no,
  2478. rscn_out_iter));
  2479. ha->rscn_out_ptr = rscn_out_iter;
  2480. }
  2481. /* Queue overflow, set switch default case. */
  2482. if (ha->flags.rscn_queue_overflow) {
  2483. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2484. "overflow.\n", ha->host_no));
  2485. format = 3;
  2486. ha->flags.rscn_queue_overflow = 0;
  2487. }
  2488. switch (format) {
  2489. case 0:
  2490. mask = 0xffffff;
  2491. break;
  2492. case 1:
  2493. mask = 0xffff00;
  2494. break;
  2495. case 2:
  2496. mask = 0xff0000;
  2497. break;
  2498. default:
  2499. mask = 0x0;
  2500. d_id.b24 = 0;
  2501. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2502. break;
  2503. }
  2504. rval = QLA_SUCCESS;
  2505. list_for_each_entry(fcport, &pha->fcports, list) {
  2506. if (fcport->vp_idx != ha->vp_idx)
  2507. continue;
  2508. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2509. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2510. fcport->port_type == FCT_BROADCAST)
  2511. continue;
  2512. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2513. if (format != 3 ||
  2514. fcport->port_type != FCT_INITIATOR) {
  2515. qla2x00_mark_device_lost(ha, fcport,
  2516. 0, 0);
  2517. }
  2518. }
  2519. fcport->flags &= ~FCF_FARP_DONE;
  2520. }
  2521. }
  2522. return (rval);
  2523. }
  2524. /*
  2525. * qla2x00_fabric_dev_login
  2526. * Login fabric target device and update FC port database.
  2527. *
  2528. * Input:
  2529. * ha: adapter state pointer.
  2530. * fcport: port structure list pointer.
  2531. * next_loopid: contains value of a new loop ID that can be used
  2532. * by the next login attempt.
  2533. *
  2534. * Returns:
  2535. * qla2x00 local function return status code.
  2536. *
  2537. * Context:
  2538. * Kernel context.
  2539. */
  2540. static int
  2541. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2542. uint16_t *next_loopid)
  2543. {
  2544. int rval;
  2545. int retry;
  2546. uint8_t opts;
  2547. rval = QLA_SUCCESS;
  2548. retry = 0;
  2549. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2550. if (rval == QLA_SUCCESS) {
  2551. /* Send an ADISC to tape devices.*/
  2552. opts = 0;
  2553. if (fcport->flags & FCF_TAPE_PRESENT)
  2554. opts |= BIT_1;
  2555. rval = qla2x00_get_port_database(ha, fcport, opts);
  2556. if (rval != QLA_SUCCESS) {
  2557. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2558. fcport->d_id.b.domain, fcport->d_id.b.area,
  2559. fcport->d_id.b.al_pa);
  2560. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2561. } else {
  2562. qla2x00_update_fcport(ha, fcport);
  2563. }
  2564. }
  2565. return (rval);
  2566. }
  2567. /*
  2568. * qla2x00_fabric_login
  2569. * Issue fabric login command.
  2570. *
  2571. * Input:
  2572. * ha = adapter block pointer.
  2573. * device = pointer to FC device type structure.
  2574. *
  2575. * Returns:
  2576. * 0 - Login successfully
  2577. * 1 - Login failed
  2578. * 2 - Initiator device
  2579. * 3 - Fatal error
  2580. */
  2581. int
  2582. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2583. uint16_t *next_loopid)
  2584. {
  2585. int rval;
  2586. int retry;
  2587. uint16_t tmp_loopid;
  2588. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2589. retry = 0;
  2590. tmp_loopid = 0;
  2591. for (;;) {
  2592. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2593. "for port %02x%02x%02x.\n",
  2594. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2595. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2596. /* Login fcport on switch. */
  2597. ha->isp_ops->fabric_login(ha, fcport->loop_id,
  2598. fcport->d_id.b.domain, fcport->d_id.b.area,
  2599. fcport->d_id.b.al_pa, mb, BIT_0);
  2600. if (mb[0] == MBS_PORT_ID_USED) {
  2601. /*
  2602. * Device has another loop ID. The firmware team
  2603. * recommends the driver perform an implicit login with
  2604. * the specified ID again. The ID we just used is save
  2605. * here so we return with an ID that can be tried by
  2606. * the next login.
  2607. */
  2608. retry++;
  2609. tmp_loopid = fcport->loop_id;
  2610. fcport->loop_id = mb[1];
  2611. DEBUG(printk("Fabric Login: port in use - next "
  2612. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2613. fcport->loop_id, fcport->d_id.b.domain,
  2614. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2615. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2616. /*
  2617. * Login succeeded.
  2618. */
  2619. if (retry) {
  2620. /* A retry occurred before. */
  2621. *next_loopid = tmp_loopid;
  2622. } else {
  2623. /*
  2624. * No retry occurred before. Just increment the
  2625. * ID value for next login.
  2626. */
  2627. *next_loopid = (fcport->loop_id + 1);
  2628. }
  2629. if (mb[1] & BIT_0) {
  2630. fcport->port_type = FCT_INITIATOR;
  2631. } else {
  2632. fcport->port_type = FCT_TARGET;
  2633. if (mb[1] & BIT_1) {
  2634. fcport->flags |= FCF_TAPE_PRESENT;
  2635. }
  2636. }
  2637. if (mb[10] & BIT_0)
  2638. fcport->supported_classes |= FC_COS_CLASS2;
  2639. if (mb[10] & BIT_1)
  2640. fcport->supported_classes |= FC_COS_CLASS3;
  2641. rval = QLA_SUCCESS;
  2642. break;
  2643. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2644. /*
  2645. * Loop ID already used, try next loop ID.
  2646. */
  2647. fcport->loop_id++;
  2648. rval = qla2x00_find_new_loop_id(ha, fcport);
  2649. if (rval != QLA_SUCCESS) {
  2650. /* Ran out of loop IDs to use */
  2651. break;
  2652. }
  2653. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2654. /*
  2655. * Firmware possibly timed out during login. If NO
  2656. * retries are left to do then the device is declared
  2657. * dead.
  2658. */
  2659. *next_loopid = fcport->loop_id;
  2660. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2661. fcport->d_id.b.domain, fcport->d_id.b.area,
  2662. fcport->d_id.b.al_pa);
  2663. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2664. rval = 1;
  2665. break;
  2666. } else {
  2667. /*
  2668. * unrecoverable / not handled error
  2669. */
  2670. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2671. "loop_id=%x jiffies=%lx.\n",
  2672. __func__, ha->host_no, mb[0],
  2673. fcport->d_id.b.domain, fcport->d_id.b.area,
  2674. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2675. *next_loopid = fcport->loop_id;
  2676. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2677. fcport->d_id.b.domain, fcport->d_id.b.area,
  2678. fcport->d_id.b.al_pa);
  2679. fcport->loop_id = FC_NO_LOOP_ID;
  2680. fcport->login_retry = 0;
  2681. rval = 3;
  2682. break;
  2683. }
  2684. }
  2685. return (rval);
  2686. }
  2687. /*
  2688. * qla2x00_local_device_login
  2689. * Issue local device login command.
  2690. *
  2691. * Input:
  2692. * ha = adapter block pointer.
  2693. * loop_id = loop id of device to login to.
  2694. *
  2695. * Returns (Where's the #define!!!!):
  2696. * 0 - Login successfully
  2697. * 1 - Login failed
  2698. * 3 - Fatal error
  2699. */
  2700. int
  2701. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2702. {
  2703. int rval;
  2704. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2705. memset(mb, 0, sizeof(mb));
  2706. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2707. if (rval == QLA_SUCCESS) {
  2708. /* Interrogate mailbox registers for any errors */
  2709. if (mb[0] == MBS_COMMAND_ERROR)
  2710. rval = 1;
  2711. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2712. /* device not in PCB table */
  2713. rval = 3;
  2714. }
  2715. return (rval);
  2716. }
  2717. /*
  2718. * qla2x00_loop_resync
  2719. * Resync with fibre channel devices.
  2720. *
  2721. * Input:
  2722. * ha = adapter block pointer.
  2723. *
  2724. * Returns:
  2725. * 0 = success
  2726. */
  2727. int
  2728. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2729. {
  2730. int rval;
  2731. uint32_t wait_time;
  2732. rval = QLA_SUCCESS;
  2733. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2734. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2735. if (ha->flags.online) {
  2736. if (!(rval = qla2x00_fw_ready(ha))) {
  2737. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2738. wait_time = 256;
  2739. do {
  2740. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2741. /* Issue a marker after FW becomes ready. */
  2742. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2743. ha->marker_needed = 0;
  2744. /* Remap devices on Loop. */
  2745. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2746. qla2x00_configure_loop(ha);
  2747. wait_time--;
  2748. } while (!atomic_read(&ha->loop_down_timer) &&
  2749. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2750. wait_time &&
  2751. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2752. }
  2753. }
  2754. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2755. return (QLA_FUNCTION_FAILED);
  2756. }
  2757. if (rval) {
  2758. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2759. }
  2760. return (rval);
  2761. }
  2762. void
  2763. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2764. {
  2765. fc_port_t *fcport;
  2766. /* Go with deferred removal of rport references. */
  2767. list_for_each_entry(fcport, &ha->fcports, list)
  2768. if (fcport->drport &&
  2769. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2770. qla2x00_rport_del(fcport);
  2771. }
  2772. /*
  2773. * qla2x00_abort_isp
  2774. * Resets ISP and aborts all outstanding commands.
  2775. *
  2776. * Input:
  2777. * ha = adapter block pointer.
  2778. *
  2779. * Returns:
  2780. * 0 = success
  2781. */
  2782. int
  2783. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2784. {
  2785. int rval;
  2786. uint8_t status = 0;
  2787. scsi_qla_host_t *vha;
  2788. if (ha->flags.online) {
  2789. ha->flags.online = 0;
  2790. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2791. ha->qla_stats.total_isp_aborts++;
  2792. qla_printk(KERN_INFO, ha,
  2793. "Performing ISP error recovery - ha= %p.\n", ha);
  2794. ha->isp_ops->reset_chip(ha);
  2795. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2796. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2797. atomic_set(&ha->loop_state, LOOP_DOWN);
  2798. qla2x00_mark_all_devices_lost(ha, 0);
  2799. list_for_each_entry(vha, &ha->vp_list, vp_list)
  2800. qla2x00_mark_all_devices_lost(vha, 0);
  2801. } else {
  2802. if (!atomic_read(&ha->loop_down_timer))
  2803. atomic_set(&ha->loop_down_timer,
  2804. LOOP_DOWN_TIME);
  2805. }
  2806. /* Requeue all commands in outstanding command list. */
  2807. qla2x00_abort_all_cmds(ha, DID_RESET << 16);
  2808. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  2809. ha->isp_ops->nvram_config(ha);
  2810. if (!qla2x00_restart_isp(ha)) {
  2811. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2812. if (!atomic_read(&ha->loop_down_timer)) {
  2813. /*
  2814. * Issue marker command only when we are going
  2815. * to start the I/O .
  2816. */
  2817. ha->marker_needed = 1;
  2818. }
  2819. ha->flags.online = 1;
  2820. ha->isp_ops->enable_intrs(ha);
  2821. ha->isp_abort_cnt = 0;
  2822. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2823. if (ha->fce) {
  2824. ha->flags.fce_enabled = 1;
  2825. memset(ha->fce, 0,
  2826. fce_calc_size(ha->fce_bufs));
  2827. rval = qla2x00_enable_fce_trace(ha,
  2828. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2829. &ha->fce_bufs);
  2830. if (rval) {
  2831. qla_printk(KERN_WARNING, ha,
  2832. "Unable to reinitialize FCE "
  2833. "(%d).\n", rval);
  2834. ha->flags.fce_enabled = 0;
  2835. }
  2836. }
  2837. if (ha->eft) {
  2838. memset(ha->eft, 0, EFT_SIZE);
  2839. rval = qla2x00_enable_eft_trace(ha,
  2840. ha->eft_dma, EFT_NUM_BUFFERS);
  2841. if (rval) {
  2842. qla_printk(KERN_WARNING, ha,
  2843. "Unable to reinitialize EFT "
  2844. "(%d).\n", rval);
  2845. }
  2846. }
  2847. } else { /* failed the ISP abort */
  2848. ha->flags.online = 1;
  2849. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2850. if (ha->isp_abort_cnt == 0) {
  2851. qla_printk(KERN_WARNING, ha,
  2852. "ISP error recovery failed - "
  2853. "board disabled\n");
  2854. /*
  2855. * The next call disables the board
  2856. * completely.
  2857. */
  2858. ha->isp_ops->reset_adapter(ha);
  2859. ha->flags.online = 0;
  2860. clear_bit(ISP_ABORT_RETRY,
  2861. &ha->dpc_flags);
  2862. status = 0;
  2863. } else { /* schedule another ISP abort */
  2864. ha->isp_abort_cnt--;
  2865. DEBUG(printk("qla%ld: ISP abort - "
  2866. "retry remaining %d\n",
  2867. ha->host_no, ha->isp_abort_cnt));
  2868. status = 1;
  2869. }
  2870. } else {
  2871. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2872. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2873. "- retrying (%d) more times\n",
  2874. ha->host_no, ha->isp_abort_cnt));
  2875. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2876. status = 1;
  2877. }
  2878. }
  2879. }
  2880. if (status) {
  2881. qla_printk(KERN_INFO, ha,
  2882. "qla2x00_abort_isp: **** FAILED ****\n");
  2883. } else {
  2884. DEBUG(printk(KERN_INFO
  2885. "qla2x00_abort_isp(%ld): exiting.\n",
  2886. ha->host_no));
  2887. }
  2888. return(status);
  2889. }
  2890. /*
  2891. * qla2x00_restart_isp
  2892. * restarts the ISP after a reset
  2893. *
  2894. * Input:
  2895. * ha = adapter block pointer.
  2896. *
  2897. * Returns:
  2898. * 0 = success
  2899. */
  2900. static int
  2901. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2902. {
  2903. uint8_t status = 0;
  2904. uint32_t wait_time;
  2905. /* If firmware needs to be loaded */
  2906. if (qla2x00_isp_firmware(ha)) {
  2907. ha->flags.online = 0;
  2908. if (!(status = ha->isp_ops->chip_diag(ha)))
  2909. status = qla2x00_setup_chip(ha);
  2910. }
  2911. if (!status && !(status = qla2x00_init_rings(ha))) {
  2912. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2913. if (!(status = qla2x00_fw_ready(ha))) {
  2914. DEBUG(printk("%s(): Start configure loop, "
  2915. "status = %d\n", __func__, status));
  2916. /* Issue a marker after FW becomes ready. */
  2917. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2918. ha->flags.online = 1;
  2919. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2920. wait_time = 256;
  2921. do {
  2922. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2923. qla2x00_configure_loop(ha);
  2924. wait_time--;
  2925. } while (!atomic_read(&ha->loop_down_timer) &&
  2926. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2927. wait_time &&
  2928. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2929. }
  2930. /* if no cable then assume it's good */
  2931. if ((ha->device_flags & DFLG_NO_CABLE))
  2932. status = 0;
  2933. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2934. __func__,
  2935. status));
  2936. }
  2937. return (status);
  2938. }
  2939. /*
  2940. * qla2x00_reset_adapter
  2941. * Reset adapter.
  2942. *
  2943. * Input:
  2944. * ha = adapter block pointer.
  2945. */
  2946. void
  2947. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2948. {
  2949. unsigned long flags = 0;
  2950. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2951. ha->flags.online = 0;
  2952. ha->isp_ops->disable_intrs(ha);
  2953. spin_lock_irqsave(&ha->hardware_lock, flags);
  2954. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2955. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2956. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2957. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2958. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2959. }
  2960. void
  2961. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2962. {
  2963. unsigned long flags = 0;
  2964. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2965. ha->flags.online = 0;
  2966. ha->isp_ops->disable_intrs(ha);
  2967. spin_lock_irqsave(&ha->hardware_lock, flags);
  2968. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2969. RD_REG_DWORD(&reg->hccr);
  2970. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2971. RD_REG_DWORD(&reg->hccr);
  2972. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2973. }
  2974. /* On sparc systems, obtain port and node WWN from firmware
  2975. * properties.
  2976. */
  2977. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, struct nvram_24xx *nv)
  2978. {
  2979. #ifdef CONFIG_SPARC
  2980. struct pci_dev *pdev = ha->pdev;
  2981. struct device_node *dp = pci_device_to_OF_node(pdev);
  2982. const u8 *val;
  2983. int len;
  2984. val = of_get_property(dp, "port-wwn", &len);
  2985. if (val && len >= WWN_SIZE)
  2986. memcpy(nv->port_name, val, WWN_SIZE);
  2987. val = of_get_property(dp, "node-wwn", &len);
  2988. if (val && len >= WWN_SIZE)
  2989. memcpy(nv->node_name, val, WWN_SIZE);
  2990. #endif
  2991. }
  2992. int
  2993. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2994. {
  2995. int rval;
  2996. struct init_cb_24xx *icb;
  2997. struct nvram_24xx *nv;
  2998. uint32_t *dptr;
  2999. uint8_t *dptr1, *dptr2;
  3000. uint32_t chksum;
  3001. uint16_t cnt;
  3002. rval = QLA_SUCCESS;
  3003. icb = (struct init_cb_24xx *)ha->init_cb;
  3004. nv = ha->nvram;
  3005. /* Determine NVRAM starting address. */
  3006. ha->nvram_size = sizeof(struct nvram_24xx);
  3007. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3008. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3009. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3010. if (PCI_FUNC(ha->pdev->devfn)) {
  3011. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3012. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3013. }
  3014. /* Get VPD data into cache */
  3015. ha->vpd = ha->nvram + VPD_OFFSET;
  3016. ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd,
  3017. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3018. /* Get NVRAM data into cache and calculate checksum. */
  3019. dptr = (uint32_t *)nv;
  3020. ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  3021. ha->nvram_size);
  3022. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3023. chksum += le32_to_cpu(*dptr++);
  3024. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3025. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3026. /* Bad NVRAM data, set defaults parameters. */
  3027. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3028. || nv->id[3] != ' ' ||
  3029. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3030. /* Reset NVRAM data. */
  3031. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3032. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3033. le16_to_cpu(nv->nvram_version));
  3034. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3035. "invalid -- WWPN) defaults.\n");
  3036. /*
  3037. * Set default initialization control block.
  3038. */
  3039. memset(nv, 0, ha->nvram_size);
  3040. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3041. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3042. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3043. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3044. nv->exchange_count = __constant_cpu_to_le16(0);
  3045. nv->hard_address = __constant_cpu_to_le16(124);
  3046. nv->port_name[0] = 0x21;
  3047. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3048. nv->port_name[2] = 0x00;
  3049. nv->port_name[3] = 0xe0;
  3050. nv->port_name[4] = 0x8b;
  3051. nv->port_name[5] = 0x1c;
  3052. nv->port_name[6] = 0x55;
  3053. nv->port_name[7] = 0x86;
  3054. nv->node_name[0] = 0x20;
  3055. nv->node_name[1] = 0x00;
  3056. nv->node_name[2] = 0x00;
  3057. nv->node_name[3] = 0xe0;
  3058. nv->node_name[4] = 0x8b;
  3059. nv->node_name[5] = 0x1c;
  3060. nv->node_name[6] = 0x55;
  3061. nv->node_name[7] = 0x86;
  3062. qla24xx_nvram_wwn_from_ofw(ha, nv);
  3063. nv->login_retry_count = __constant_cpu_to_le16(8);
  3064. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3065. nv->login_timeout = __constant_cpu_to_le16(0);
  3066. nv->firmware_options_1 =
  3067. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3068. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3069. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3070. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3071. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3072. nv->efi_parameters = __constant_cpu_to_le32(0);
  3073. nv->reset_delay = 5;
  3074. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3075. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3076. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3077. rval = 1;
  3078. }
  3079. /* Reset Initialization control block */
  3080. memset(icb, 0, sizeof(struct init_cb_24xx));
  3081. /* Copy 1st segment. */
  3082. dptr1 = (uint8_t *)icb;
  3083. dptr2 = (uint8_t *)&nv->version;
  3084. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3085. while (cnt--)
  3086. *dptr1++ = *dptr2++;
  3087. icb->login_retry_count = nv->login_retry_count;
  3088. icb->link_down_on_nos = nv->link_down_on_nos;
  3089. /* Copy 2nd segment. */
  3090. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3091. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3092. cnt = (uint8_t *)&icb->reserved_3 -
  3093. (uint8_t *)&icb->interrupt_delay_timer;
  3094. while (cnt--)
  3095. *dptr1++ = *dptr2++;
  3096. /*
  3097. * Setup driver NVRAM options.
  3098. */
  3099. qla2x00_set_model_info(ha, nv->model_name, sizeof(nv->model_name),
  3100. "QLA2462");
  3101. /* Use alternate WWN? */
  3102. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3103. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3104. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3105. }
  3106. /* Prepare nodename */
  3107. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3108. /*
  3109. * Firmware will apply the following mask if the nodename was
  3110. * not provided.
  3111. */
  3112. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3113. icb->node_name[0] &= 0xF0;
  3114. }
  3115. /* Set host adapter parameters. */
  3116. ha->flags.disable_risc_code_load = 0;
  3117. ha->flags.enable_lip_reset = 0;
  3118. ha->flags.enable_lip_full_login =
  3119. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3120. ha->flags.enable_target_reset =
  3121. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3122. ha->flags.enable_led_scheme = 0;
  3123. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3124. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3125. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3126. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3127. sizeof(ha->fw_seriallink_options24));
  3128. /* save HBA serial number */
  3129. ha->serial0 = icb->port_name[5];
  3130. ha->serial1 = icb->port_name[6];
  3131. ha->serial2 = icb->port_name[7];
  3132. ha->node_name = icb->node_name;
  3133. ha->port_name = icb->port_name;
  3134. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3135. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3136. /* Set minimum login_timeout to 4 seconds. */
  3137. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3138. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3139. if (le16_to_cpu(nv->login_timeout) < 4)
  3140. nv->login_timeout = __constant_cpu_to_le16(4);
  3141. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3142. icb->login_timeout = nv->login_timeout;
  3143. /* Set minimum RATOV to 100 tenths of a second. */
  3144. ha->r_a_tov = 100;
  3145. ha->loop_reset_delay = nv->reset_delay;
  3146. /* Link Down Timeout = 0:
  3147. *
  3148. * When Port Down timer expires we will start returning
  3149. * I/O's to OS with "DID_NO_CONNECT".
  3150. *
  3151. * Link Down Timeout != 0:
  3152. *
  3153. * The driver waits for the link to come up after link down
  3154. * before returning I/Os to OS with "DID_NO_CONNECT".
  3155. */
  3156. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3157. ha->loop_down_abort_time =
  3158. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3159. } else {
  3160. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3161. ha->loop_down_abort_time =
  3162. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3163. }
  3164. /* Need enough time to try and get the port back. */
  3165. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3166. if (qlport_down_retry)
  3167. ha->port_down_retry_count = qlport_down_retry;
  3168. /* Set login_retry_count */
  3169. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3170. if (ha->port_down_retry_count ==
  3171. le16_to_cpu(nv->port_down_retry_count) &&
  3172. ha->port_down_retry_count > 3)
  3173. ha->login_retry_count = ha->port_down_retry_count;
  3174. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3175. ha->login_retry_count = ha->port_down_retry_count;
  3176. if (ql2xloginretrycount)
  3177. ha->login_retry_count = ql2xloginretrycount;
  3178. /* Enable ZIO. */
  3179. if (!ha->flags.init_done) {
  3180. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3181. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3182. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3183. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3184. }
  3185. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3186. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3187. ha->flags.process_response_queue = 0;
  3188. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3189. ha->zio_mode = QLA_ZIO_MODE_6;
  3190. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3191. "(%d us).\n", ha->host_no, ha->zio_mode,
  3192. ha->zio_timer * 100));
  3193. qla_printk(KERN_INFO, ha,
  3194. "ZIO mode %d enabled; timer delay (%d us).\n",
  3195. ha->zio_mode, ha->zio_timer * 100);
  3196. icb->firmware_options_2 |= cpu_to_le32(
  3197. (uint32_t)ha->zio_mode);
  3198. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3199. ha->flags.process_response_queue = 1;
  3200. }
  3201. if (rval) {
  3202. DEBUG2_3(printk(KERN_WARNING
  3203. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  3204. }
  3205. return (rval);
  3206. }
  3207. static int
  3208. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3209. {
  3210. int rval;
  3211. int segments, fragment;
  3212. uint32_t faddr;
  3213. uint32_t *dcode, dlen;
  3214. uint32_t risc_addr;
  3215. uint32_t risc_size;
  3216. uint32_t i;
  3217. rval = QLA_SUCCESS;
  3218. segments = FA_RISC_CODE_SEGMENTS;
  3219. faddr = ha->flt_region_fw;
  3220. dcode = (uint32_t *)ha->request_ring;
  3221. *srisc_addr = 0;
  3222. /* Validate firmware image by checking version. */
  3223. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3224. for (i = 0; i < 4; i++)
  3225. dcode[i] = be32_to_cpu(dcode[i]);
  3226. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3227. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3228. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3229. dcode[3] == 0)) {
  3230. qla_printk(KERN_WARNING, ha,
  3231. "Unable to verify integrity of flash firmware image!\n");
  3232. qla_printk(KERN_WARNING, ha,
  3233. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3234. dcode[1], dcode[2], dcode[3]);
  3235. return QLA_FUNCTION_FAILED;
  3236. }
  3237. while (segments && rval == QLA_SUCCESS) {
  3238. /* Read segment's load information. */
  3239. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3240. risc_addr = be32_to_cpu(dcode[2]);
  3241. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3242. risc_size = be32_to_cpu(dcode[3]);
  3243. fragment = 0;
  3244. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3245. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3246. if (dlen > risc_size)
  3247. dlen = risc_size;
  3248. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3249. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3250. ha->host_no, risc_addr, dlen, faddr));
  3251. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3252. for (i = 0; i < dlen; i++)
  3253. dcode[i] = swab32(dcode[i]);
  3254. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3255. dlen);
  3256. if (rval) {
  3257. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3258. "segment %d of firmware\n", ha->host_no,
  3259. fragment));
  3260. qla_printk(KERN_WARNING, ha,
  3261. "[ERROR] Failed to load segment %d of "
  3262. "firmware\n", fragment);
  3263. break;
  3264. }
  3265. faddr += dlen;
  3266. risc_addr += dlen;
  3267. risc_size -= dlen;
  3268. fragment++;
  3269. }
  3270. /* Next segment. */
  3271. segments--;
  3272. }
  3273. return rval;
  3274. }
  3275. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3276. int
  3277. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3278. {
  3279. int rval;
  3280. int i, fragment;
  3281. uint16_t *wcode, *fwcode;
  3282. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3283. struct fw_blob *blob;
  3284. /* Load firmware blob. */
  3285. blob = qla2x00_request_firmware(ha);
  3286. if (!blob) {
  3287. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3288. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3289. "from: " QLA_FW_URL ".\n");
  3290. return QLA_FUNCTION_FAILED;
  3291. }
  3292. rval = QLA_SUCCESS;
  3293. wcode = (uint16_t *)ha->request_ring;
  3294. *srisc_addr = 0;
  3295. fwcode = (uint16_t *)blob->fw->data;
  3296. fwclen = 0;
  3297. /* Validate firmware image by checking version. */
  3298. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3299. qla_printk(KERN_WARNING, ha,
  3300. "Unable to verify integrity of firmware image (%Zd)!\n",
  3301. blob->fw->size);
  3302. goto fail_fw_integrity;
  3303. }
  3304. for (i = 0; i < 4; i++)
  3305. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3306. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3307. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3308. wcode[2] == 0 && wcode[3] == 0)) {
  3309. qla_printk(KERN_WARNING, ha,
  3310. "Unable to verify integrity of firmware image!\n");
  3311. qla_printk(KERN_WARNING, ha,
  3312. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3313. wcode[1], wcode[2], wcode[3]);
  3314. goto fail_fw_integrity;
  3315. }
  3316. seg = blob->segs;
  3317. while (*seg && rval == QLA_SUCCESS) {
  3318. risc_addr = *seg;
  3319. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3320. risc_size = be16_to_cpu(fwcode[3]);
  3321. /* Validate firmware image size. */
  3322. fwclen += risc_size * sizeof(uint16_t);
  3323. if (blob->fw->size < fwclen) {
  3324. qla_printk(KERN_WARNING, ha,
  3325. "Unable to verify integrity of firmware image "
  3326. "(%Zd)!\n", blob->fw->size);
  3327. goto fail_fw_integrity;
  3328. }
  3329. fragment = 0;
  3330. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3331. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3332. if (wlen > risc_size)
  3333. wlen = risc_size;
  3334. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3335. "addr %x, number of words 0x%x.\n", ha->host_no,
  3336. risc_addr, wlen));
  3337. for (i = 0; i < wlen; i++)
  3338. wcode[i] = swab16(fwcode[i]);
  3339. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3340. wlen);
  3341. if (rval) {
  3342. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3343. "segment %d of firmware\n", ha->host_no,
  3344. fragment));
  3345. qla_printk(KERN_WARNING, ha,
  3346. "[ERROR] Failed to load segment %d of "
  3347. "firmware\n", fragment);
  3348. break;
  3349. }
  3350. fwcode += wlen;
  3351. risc_addr += wlen;
  3352. risc_size -= wlen;
  3353. fragment++;
  3354. }
  3355. /* Next segment. */
  3356. seg++;
  3357. }
  3358. return rval;
  3359. fail_fw_integrity:
  3360. return QLA_FUNCTION_FAILED;
  3361. }
  3362. int
  3363. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3364. {
  3365. int rval;
  3366. int segments, fragment;
  3367. uint32_t *dcode, dlen;
  3368. uint32_t risc_addr;
  3369. uint32_t risc_size;
  3370. uint32_t i;
  3371. struct fw_blob *blob;
  3372. uint32_t *fwcode, fwclen;
  3373. /* Load firmware blob. */
  3374. blob = qla2x00_request_firmware(ha);
  3375. if (!blob) {
  3376. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3377. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3378. "from: " QLA_FW_URL ".\n");
  3379. /* Try to load RISC code from flash. */
  3380. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3381. "outdated) firmware from flash.\n");
  3382. return qla24xx_load_risc_flash(ha, srisc_addr);
  3383. }
  3384. rval = QLA_SUCCESS;
  3385. segments = FA_RISC_CODE_SEGMENTS;
  3386. dcode = (uint32_t *)ha->request_ring;
  3387. *srisc_addr = 0;
  3388. fwcode = (uint32_t *)blob->fw->data;
  3389. fwclen = 0;
  3390. /* Validate firmware image by checking version. */
  3391. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3392. qla_printk(KERN_WARNING, ha,
  3393. "Unable to verify integrity of firmware image (%Zd)!\n",
  3394. blob->fw->size);
  3395. goto fail_fw_integrity;
  3396. }
  3397. for (i = 0; i < 4; i++)
  3398. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3399. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3400. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3401. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3402. dcode[3] == 0)) {
  3403. qla_printk(KERN_WARNING, ha,
  3404. "Unable to verify integrity of firmware image!\n");
  3405. qla_printk(KERN_WARNING, ha,
  3406. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3407. dcode[1], dcode[2], dcode[3]);
  3408. goto fail_fw_integrity;
  3409. }
  3410. while (segments && rval == QLA_SUCCESS) {
  3411. risc_addr = be32_to_cpu(fwcode[2]);
  3412. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3413. risc_size = be32_to_cpu(fwcode[3]);
  3414. /* Validate firmware image size. */
  3415. fwclen += risc_size * sizeof(uint32_t);
  3416. if (blob->fw->size < fwclen) {
  3417. qla_printk(KERN_WARNING, ha,
  3418. "Unable to verify integrity of firmware image "
  3419. "(%Zd)!\n", blob->fw->size);
  3420. goto fail_fw_integrity;
  3421. }
  3422. fragment = 0;
  3423. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3424. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3425. if (dlen > risc_size)
  3426. dlen = risc_size;
  3427. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3428. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3429. risc_addr, dlen));
  3430. for (i = 0; i < dlen; i++)
  3431. dcode[i] = swab32(fwcode[i]);
  3432. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3433. dlen);
  3434. if (rval) {
  3435. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3436. "segment %d of firmware\n", ha->host_no,
  3437. fragment));
  3438. qla_printk(KERN_WARNING, ha,
  3439. "[ERROR] Failed to load segment %d of "
  3440. "firmware\n", fragment);
  3441. break;
  3442. }
  3443. fwcode += dlen;
  3444. risc_addr += dlen;
  3445. risc_size -= dlen;
  3446. fragment++;
  3447. }
  3448. /* Next segment. */
  3449. segments--;
  3450. }
  3451. return rval;
  3452. fail_fw_integrity:
  3453. return QLA_FUNCTION_FAILED;
  3454. }
  3455. void
  3456. qla2x00_try_to_stop_firmware(scsi_qla_host_t *ha)
  3457. {
  3458. int ret, retries;
  3459. if (!IS_FWI2_CAPABLE(ha))
  3460. return;
  3461. if (!ha->fw_major_version)
  3462. return;
  3463. ret = qla2x00_stop_firmware(ha);
  3464. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3465. retries ; retries--) {
  3466. ha->isp_ops->reset_chip(ha);
  3467. if (ha->isp_ops->chip_diag(ha) != QLA_SUCCESS)
  3468. continue;
  3469. if (qla2x00_setup_chip(ha) != QLA_SUCCESS)
  3470. continue;
  3471. qla_printk(KERN_INFO, ha,
  3472. "Attempting retry of stop-firmware command...\n");
  3473. ret = qla2x00_stop_firmware(ha);
  3474. }
  3475. }
  3476. int
  3477. qla24xx_configure_vhba(scsi_qla_host_t *ha)
  3478. {
  3479. int rval = QLA_SUCCESS;
  3480. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3481. if (!ha->parent)
  3482. return -EINVAL;
  3483. rval = qla2x00_fw_ready(ha->parent);
  3484. if (rval == QLA_SUCCESS) {
  3485. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  3486. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  3487. }
  3488. ha->flags.management_server_logged_in = 0;
  3489. /* Login to SNS first */
  3490. qla24xx_login_fabric(ha->parent, NPH_SNS, 0xff, 0xff, 0xfc,
  3491. mb, BIT_1);
  3492. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3493. DEBUG15(qla_printk(KERN_INFO, ha,
  3494. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3495. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3496. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3497. return (QLA_FUNCTION_FAILED);
  3498. }
  3499. atomic_set(&ha->loop_down_timer, 0);
  3500. atomic_set(&ha->loop_state, LOOP_UP);
  3501. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3502. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3503. rval = qla2x00_loop_resync(ha->parent);
  3504. return rval;
  3505. }
  3506. /* 84XX Support **************************************************************/
  3507. static LIST_HEAD(qla_cs84xx_list);
  3508. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3509. static struct qla_chip_state_84xx *
  3510. qla84xx_get_chip(struct scsi_qla_host *ha)
  3511. {
  3512. struct qla_chip_state_84xx *cs84xx;
  3513. mutex_lock(&qla_cs84xx_mutex);
  3514. /* Find any shared 84xx chip. */
  3515. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3516. if (cs84xx->bus == ha->pdev->bus) {
  3517. kref_get(&cs84xx->kref);
  3518. goto done;
  3519. }
  3520. }
  3521. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3522. if (!cs84xx)
  3523. goto done;
  3524. kref_init(&cs84xx->kref);
  3525. spin_lock_init(&cs84xx->access_lock);
  3526. mutex_init(&cs84xx->fw_update_mutex);
  3527. cs84xx->bus = ha->pdev->bus;
  3528. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3529. done:
  3530. mutex_unlock(&qla_cs84xx_mutex);
  3531. return cs84xx;
  3532. }
  3533. static void
  3534. __qla84xx_chip_release(struct kref *kref)
  3535. {
  3536. struct qla_chip_state_84xx *cs84xx =
  3537. container_of(kref, struct qla_chip_state_84xx, kref);
  3538. mutex_lock(&qla_cs84xx_mutex);
  3539. list_del(&cs84xx->list);
  3540. mutex_unlock(&qla_cs84xx_mutex);
  3541. kfree(cs84xx);
  3542. }
  3543. void
  3544. qla84xx_put_chip(struct scsi_qla_host *ha)
  3545. {
  3546. if (ha->cs84xx)
  3547. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3548. }
  3549. static int
  3550. qla84xx_init_chip(scsi_qla_host_t *ha)
  3551. {
  3552. int rval;
  3553. uint16_t status[2];
  3554. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3555. rval = qla84xx_verify_chip(ha, status);
  3556. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3557. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3558. QLA_SUCCESS;
  3559. }