nsp_cs.c 51 KB

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  1. /*======================================================================
  2. NinjaSCSI-3 / NinjaSCSI-32Bi PCMCIA SCSI host adapter card driver
  3. By: YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
  4. Ver.2.8 Support 32bit MMIO mode
  5. Support Synchronous Data Transfer Request (SDTR) mode
  6. Ver.2.0 Support 32bit PIO mode
  7. Ver.1.1.2 Fix for scatter list buffer exceeds
  8. Ver.1.1 Support scatter list
  9. Ver.0.1 Initial version
  10. This software may be used and distributed according to the terms of
  11. the GNU General Public License.
  12. ======================================================================*/
  13. /***********************************************************************
  14. This driver is for these PCcards.
  15. I-O DATA PCSC-F (Workbit NinjaSCSI-3)
  16. "WBT", "NinjaSCSI-3", "R1.0"
  17. I-O DATA CBSC-II (Workbit NinjaSCSI-32Bi in 16bit mode)
  18. "IO DATA", "CBSC16 ", "1"
  19. ***********************************************************************/
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/slab.h>
  24. #include <linux/string.h>
  25. #include <linux/timer.h>
  26. #include <linux/ioport.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/major.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/stat.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #include <../drivers/scsi/scsi.h>
  35. #include <scsi/scsi_host.h>
  36. #include <scsi/scsi.h>
  37. #include <scsi/scsi_ioctl.h>
  38. #include <pcmcia/cs_types.h>
  39. #include <pcmcia/cs.h>
  40. #include <pcmcia/cistpl.h>
  41. #include <pcmcia/cisreg.h>
  42. #include <pcmcia/ds.h>
  43. #include "nsp_cs.h"
  44. MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>");
  45. MODULE_DESCRIPTION("WorkBit NinjaSCSI-3 / NinjaSCSI-32Bi(16bit) PCMCIA SCSI host adapter module");
  46. MODULE_SUPPORTED_DEVICE("sd,sr,sg,st");
  47. #ifdef MODULE_LICENSE
  48. MODULE_LICENSE("GPL");
  49. #endif
  50. #include "nsp_io.h"
  51. /*====================================================================*/
  52. /* Parameters that can be set with 'insmod' */
  53. static int nsp_burst_mode = BURST_MEM32;
  54. module_param(nsp_burst_mode, int, 0);
  55. MODULE_PARM_DESC(nsp_burst_mode, "Burst transfer mode (0=io8, 1=io32, 2=mem32(default))");
  56. /* Release IO ports after configuration? */
  57. static int free_ports = 0;
  58. module_param(free_ports, bool, 0);
  59. MODULE_PARM_DESC(free_ports, "Release IO ports after configuration? (default: 0 (=no))");
  60. static struct scsi_host_template nsp_driver_template = {
  61. .proc_name = "nsp_cs",
  62. .proc_info = nsp_proc_info,
  63. .name = "WorkBit NinjaSCSI-3/32Bi(16bit)",
  64. .info = nsp_info,
  65. .queuecommand = nsp_queuecommand,
  66. /* .eh_abort_handler = nsp_eh_abort,*/
  67. .eh_bus_reset_handler = nsp_eh_bus_reset,
  68. .eh_host_reset_handler = nsp_eh_host_reset,
  69. .can_queue = 1,
  70. .this_id = NSP_INITIATOR_ID,
  71. .sg_tablesize = SG_ALL,
  72. .cmd_per_lun = 1,
  73. .use_clustering = DISABLE_CLUSTERING,
  74. };
  75. static nsp_hw_data nsp_data_base; /* attach <-> detect glue */
  76. /*
  77. * debug, error print
  78. */
  79. #ifndef NSP_DEBUG
  80. # define NSP_DEBUG_MASK 0x000000
  81. # define nsp_msg(type, args...) nsp_cs_message("", 0, (type), args)
  82. # define nsp_dbg(mask, args...) /* */
  83. #else
  84. # define NSP_DEBUG_MASK 0xffffff
  85. # define nsp_msg(type, args...) \
  86. nsp_cs_message (__func__, __LINE__, (type), args)
  87. # define nsp_dbg(mask, args...) \
  88. nsp_cs_dmessage(__func__, __LINE__, (mask), args)
  89. #endif
  90. #define NSP_DEBUG_QUEUECOMMAND BIT(0)
  91. #define NSP_DEBUG_REGISTER BIT(1)
  92. #define NSP_DEBUG_AUTOSCSI BIT(2)
  93. #define NSP_DEBUG_INTR BIT(3)
  94. #define NSP_DEBUG_SGLIST BIT(4)
  95. #define NSP_DEBUG_BUSFREE BIT(5)
  96. #define NSP_DEBUG_CDB_CONTENTS BIT(6)
  97. #define NSP_DEBUG_RESELECTION BIT(7)
  98. #define NSP_DEBUG_MSGINOCCUR BIT(8)
  99. #define NSP_DEBUG_EEPROM BIT(9)
  100. #define NSP_DEBUG_MSGOUTOCCUR BIT(10)
  101. #define NSP_DEBUG_BUSRESET BIT(11)
  102. #define NSP_DEBUG_RESTART BIT(12)
  103. #define NSP_DEBUG_SYNC BIT(13)
  104. #define NSP_DEBUG_WAIT BIT(14)
  105. #define NSP_DEBUG_TARGETFLAG BIT(15)
  106. #define NSP_DEBUG_PROC BIT(16)
  107. #define NSP_DEBUG_INIT BIT(17)
  108. #define NSP_DEBUG_DATA_IO BIT(18)
  109. #define NSP_SPECIAL_PRINT_REGISTER BIT(20)
  110. #define NSP_DEBUG_BUF_LEN 150
  111. static inline void nsp_inc_resid(struct scsi_cmnd *SCpnt, int residInc)
  112. {
  113. scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) + residInc);
  114. }
  115. static void nsp_cs_message(const char *func, int line, char *type, char *fmt, ...)
  116. {
  117. va_list args;
  118. char buf[NSP_DEBUG_BUF_LEN];
  119. va_start(args, fmt);
  120. vsnprintf(buf, sizeof(buf), fmt, args);
  121. va_end(args);
  122. #ifndef NSP_DEBUG
  123. printk("%snsp_cs: %s\n", type, buf);
  124. #else
  125. printk("%snsp_cs: %s (%d): %s\n", type, func, line, buf);
  126. #endif
  127. }
  128. #ifdef NSP_DEBUG
  129. static void nsp_cs_dmessage(const char *func, int line, int mask, char *fmt, ...)
  130. {
  131. va_list args;
  132. char buf[NSP_DEBUG_BUF_LEN];
  133. va_start(args, fmt);
  134. vsnprintf(buf, sizeof(buf), fmt, args);
  135. va_end(args);
  136. if (mask & NSP_DEBUG_MASK) {
  137. printk("nsp_cs-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
  138. }
  139. }
  140. #endif
  141. /***********************************************************/
  142. /*====================================================
  143. * Clenaup parameters and call done() functions.
  144. * You must be set SCpnt->result before call this function.
  145. */
  146. static void nsp_scsi_done(struct scsi_cmnd *SCpnt)
  147. {
  148. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  149. data->CurrentSC = NULL;
  150. SCpnt->scsi_done(SCpnt);
  151. }
  152. static int nsp_queuecommand(struct scsi_cmnd *SCpnt,
  153. void (*done)(struct scsi_cmnd *))
  154. {
  155. #ifdef NSP_DEBUG
  156. /*unsigned int host_id = SCpnt->device->host->this_id;*/
  157. /*unsigned int base = SCpnt->device->host->io_port;*/
  158. unsigned char target = scmd_id(SCpnt);
  159. #endif
  160. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  161. nsp_dbg(NSP_DEBUG_QUEUECOMMAND,
  162. "SCpnt=0x%p target=%d lun=%d sglist=0x%p bufflen=%d sg_count=%d",
  163. SCpnt, target, SCpnt->device->lun, scsi_sglist(SCpnt),
  164. scsi_bufflen(SCpnt), scsi_sg_count(SCpnt));
  165. //nsp_dbg(NSP_DEBUG_QUEUECOMMAND, "before CurrentSC=0x%p", data->CurrentSC);
  166. SCpnt->scsi_done = done;
  167. if (data->CurrentSC != NULL) {
  168. nsp_msg(KERN_DEBUG, "CurrentSC!=NULL this can't be happen");
  169. SCpnt->result = DID_BAD_TARGET << 16;
  170. nsp_scsi_done(SCpnt);
  171. return 0;
  172. }
  173. #if 0
  174. /* XXX: pcmcia-cs generates SCSI command with "scsi_info" utility.
  175. This makes kernel crash when suspending... */
  176. if (data->ScsiInfo->stop != 0) {
  177. nsp_msg(KERN_INFO, "suspending device. reject command.");
  178. SCpnt->result = DID_BAD_TARGET << 16;
  179. nsp_scsi_done(SCpnt);
  180. return SCSI_MLQUEUE_HOST_BUSY;
  181. }
  182. #endif
  183. show_command(SCpnt);
  184. data->CurrentSC = SCpnt;
  185. SCpnt->SCp.Status = CHECK_CONDITION;
  186. SCpnt->SCp.Message = 0;
  187. SCpnt->SCp.have_data_in = IO_UNKNOWN;
  188. SCpnt->SCp.sent_command = 0;
  189. SCpnt->SCp.phase = PH_UNDETERMINED;
  190. scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
  191. /* setup scratch area
  192. SCp.ptr : buffer pointer
  193. SCp.this_residual : buffer length
  194. SCp.buffer : next buffer
  195. SCp.buffers_residual : left buffers in list
  196. SCp.phase : current state of the command */
  197. if (scsi_bufflen(SCpnt)) {
  198. SCpnt->SCp.buffer = scsi_sglist(SCpnt);
  199. SCpnt->SCp.ptr = BUFFER_ADDR;
  200. SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
  201. SCpnt->SCp.buffers_residual = scsi_sg_count(SCpnt) - 1;
  202. } else {
  203. SCpnt->SCp.ptr = NULL;
  204. SCpnt->SCp.this_residual = 0;
  205. SCpnt->SCp.buffer = NULL;
  206. SCpnt->SCp.buffers_residual = 0;
  207. }
  208. if (nsphw_start_selection(SCpnt) == FALSE) {
  209. nsp_dbg(NSP_DEBUG_QUEUECOMMAND, "selection fail");
  210. SCpnt->result = DID_BUS_BUSY << 16;
  211. nsp_scsi_done(SCpnt);
  212. return 0;
  213. }
  214. //nsp_dbg(NSP_DEBUG_QUEUECOMMAND, "out");
  215. #ifdef NSP_DEBUG
  216. data->CmdId++;
  217. #endif
  218. return 0;
  219. }
  220. /*
  221. * setup PIO FIFO transfer mode and enable/disable to data out
  222. */
  223. static void nsp_setup_fifo(nsp_hw_data *data, int enabled)
  224. {
  225. unsigned int base = data->BaseAddress;
  226. unsigned char transfer_mode_reg;
  227. //nsp_dbg(NSP_DEBUG_DATA_IO, "enabled=%d", enabled);
  228. if (enabled != FALSE) {
  229. transfer_mode_reg = TRANSFER_GO | BRAIND;
  230. } else {
  231. transfer_mode_reg = 0;
  232. }
  233. transfer_mode_reg |= data->TransferMode;
  234. nsp_index_write(base, TRANSFERMODE, transfer_mode_reg);
  235. }
  236. static void nsphw_init_sync(nsp_hw_data *data)
  237. {
  238. sync_data tmp_sync = { .SyncNegotiation = SYNC_NOT_YET,
  239. .SyncPeriod = 0,
  240. .SyncOffset = 0
  241. };
  242. int i;
  243. /* setup sync data */
  244. for ( i = 0; i < ARRAY_SIZE(data->Sync); i++ ) {
  245. data->Sync[i] = tmp_sync;
  246. }
  247. }
  248. /*
  249. * Initialize Ninja hardware
  250. */
  251. static int nsphw_init(nsp_hw_data *data)
  252. {
  253. unsigned int base = data->BaseAddress;
  254. nsp_dbg(NSP_DEBUG_INIT, "in base=0x%x", base);
  255. data->ScsiClockDiv = CLOCK_40M | FAST_20;
  256. data->CurrentSC = NULL;
  257. data->FifoCount = 0;
  258. data->TransferMode = MODE_IO8;
  259. nsphw_init_sync(data);
  260. /* block all interrupts */
  261. nsp_write(base, IRQCONTROL, IRQCONTROL_ALLMASK);
  262. /* setup SCSI interface */
  263. nsp_write(base, IFSELECT, IF_IFSEL);
  264. nsp_index_write(base, SCSIIRQMODE, 0);
  265. nsp_index_write(base, TRANSFERMODE, MODE_IO8);
  266. nsp_index_write(base, CLOCKDIV, data->ScsiClockDiv);
  267. nsp_index_write(base, PARITYCTRL, 0);
  268. nsp_index_write(base, POINTERCLR, POINTER_CLEAR |
  269. ACK_COUNTER_CLEAR |
  270. REQ_COUNTER_CLEAR |
  271. HOST_COUNTER_CLEAR);
  272. /* setup fifo asic */
  273. nsp_write(base, IFSELECT, IF_REGSEL);
  274. nsp_index_write(base, TERMPWRCTRL, 0);
  275. if ((nsp_index_read(base, OTHERCONTROL) & TPWR_SENSE) == 0) {
  276. nsp_msg(KERN_INFO, "terminator power on");
  277. nsp_index_write(base, TERMPWRCTRL, POWER_ON);
  278. }
  279. nsp_index_write(base, TIMERCOUNT, 0);
  280. nsp_index_write(base, TIMERCOUNT, 0); /* requires 2 times!! */
  281. nsp_index_write(base, SYNCREG, 0);
  282. nsp_index_write(base, ACKWIDTH, 0);
  283. /* enable interrupts and ack them */
  284. nsp_index_write(base, SCSIIRQMODE, SCSI_PHASE_CHANGE_EI |
  285. RESELECT_EI |
  286. SCSI_RESET_IRQ_EI );
  287. nsp_write(base, IRQCONTROL, IRQCONTROL_ALLCLEAR);
  288. nsp_setup_fifo(data, FALSE);
  289. return TRUE;
  290. }
  291. /*
  292. * Start selection phase
  293. */
  294. static int nsphw_start_selection(struct scsi_cmnd *SCpnt)
  295. {
  296. unsigned int host_id = SCpnt->device->host->this_id;
  297. unsigned int base = SCpnt->device->host->io_port;
  298. unsigned char target = scmd_id(SCpnt);
  299. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  300. int time_out;
  301. unsigned char phase, arbit;
  302. //nsp_dbg(NSP_DEBUG_RESELECTION, "in");
  303. phase = nsp_index_read(base, SCSIBUSMON);
  304. if(phase != BUSMON_BUS_FREE) {
  305. //nsp_dbg(NSP_DEBUG_RESELECTION, "bus busy");
  306. return FALSE;
  307. }
  308. /* start arbitration */
  309. //nsp_dbg(NSP_DEBUG_RESELECTION, "start arbit");
  310. SCpnt->SCp.phase = PH_ARBSTART;
  311. nsp_index_write(base, SETARBIT, ARBIT_GO);
  312. time_out = 1000;
  313. do {
  314. /* XXX: what a stupid chip! */
  315. arbit = nsp_index_read(base, ARBITSTATUS);
  316. //nsp_dbg(NSP_DEBUG_RESELECTION, "arbit=%d, wait_count=%d", arbit, wait_count);
  317. udelay(1); /* hold 1.2us */
  318. } while((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
  319. (time_out-- != 0));
  320. if (!(arbit & ARBIT_WIN)) {
  321. //nsp_dbg(NSP_DEBUG_RESELECTION, "arbit fail");
  322. nsp_index_write(base, SETARBIT, ARBIT_FLAG_CLEAR);
  323. return FALSE;
  324. }
  325. /* assert select line */
  326. //nsp_dbg(NSP_DEBUG_RESELECTION, "assert SEL line");
  327. SCpnt->SCp.phase = PH_SELSTART;
  328. udelay(3); /* wait 2.4us */
  329. nsp_index_write(base, SCSIDATALATCH, BIT(host_id) | BIT(target));
  330. nsp_index_write(base, SCSIBUSCTRL, SCSI_SEL | SCSI_BSY | SCSI_ATN);
  331. udelay(2); /* wait >1.2us */
  332. nsp_index_write(base, SCSIBUSCTRL, SCSI_SEL | SCSI_BSY | SCSI_DATAOUT_ENB | SCSI_ATN);
  333. nsp_index_write(base, SETARBIT, ARBIT_FLAG_CLEAR);
  334. /*udelay(1);*/ /* wait >90ns */
  335. nsp_index_write(base, SCSIBUSCTRL, SCSI_SEL | SCSI_DATAOUT_ENB | SCSI_ATN);
  336. /* check selection timeout */
  337. nsp_start_timer(SCpnt, 1000/51);
  338. data->SelectionTimeOut = 1;
  339. return TRUE;
  340. }
  341. struct nsp_sync_table {
  342. unsigned int min_period;
  343. unsigned int max_period;
  344. unsigned int chip_period;
  345. unsigned int ack_width;
  346. };
  347. static struct nsp_sync_table nsp_sync_table_40M[] = {
  348. {0x0c, 0x0c, 0x1, 0}, /* 20MB 50ns*/
  349. {0x19, 0x19, 0x3, 1}, /* 10MB 100ns*/
  350. {0x1a, 0x25, 0x5, 2}, /* 7.5MB 150ns*/
  351. {0x26, 0x32, 0x7, 3}, /* 5MB 200ns*/
  352. { 0, 0, 0, 0},
  353. };
  354. static struct nsp_sync_table nsp_sync_table_20M[] = {
  355. {0x19, 0x19, 0x1, 0}, /* 10MB 100ns*/
  356. {0x1a, 0x25, 0x2, 0}, /* 7.5MB 150ns*/
  357. {0x26, 0x32, 0x3, 1}, /* 5MB 200ns*/
  358. { 0, 0, 0, 0},
  359. };
  360. /*
  361. * setup synchronous data transfer mode
  362. */
  363. static int nsp_analyze_sdtr(struct scsi_cmnd *SCpnt)
  364. {
  365. unsigned char target = scmd_id(SCpnt);
  366. // unsigned char lun = SCpnt->device->lun;
  367. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  368. sync_data *sync = &(data->Sync[target]);
  369. struct nsp_sync_table *sync_table;
  370. unsigned int period, offset;
  371. int i;
  372. nsp_dbg(NSP_DEBUG_SYNC, "in");
  373. period = sync->SyncPeriod;
  374. offset = sync->SyncOffset;
  375. nsp_dbg(NSP_DEBUG_SYNC, "period=0x%x, offset=0x%x", period, offset);
  376. if ((data->ScsiClockDiv & (BIT(0)|BIT(1))) == CLOCK_20M) {
  377. sync_table = nsp_sync_table_20M;
  378. } else {
  379. sync_table = nsp_sync_table_40M;
  380. }
  381. for ( i = 0; sync_table->max_period != 0; i++, sync_table++) {
  382. if ( period >= sync_table->min_period &&
  383. period <= sync_table->max_period ) {
  384. break;
  385. }
  386. }
  387. if (period != 0 && sync_table->max_period == 0) {
  388. /*
  389. * No proper period/offset found
  390. */
  391. nsp_dbg(NSP_DEBUG_SYNC, "no proper period/offset");
  392. sync->SyncPeriod = 0;
  393. sync->SyncOffset = 0;
  394. sync->SyncRegister = 0;
  395. sync->AckWidth = 0;
  396. return FALSE;
  397. }
  398. sync->SyncRegister = (sync_table->chip_period << SYNCREG_PERIOD_SHIFT) |
  399. (offset & SYNCREG_OFFSET_MASK);
  400. sync->AckWidth = sync_table->ack_width;
  401. nsp_dbg(NSP_DEBUG_SYNC, "sync_reg=0x%x, ack_width=0x%x", sync->SyncRegister, sync->AckWidth);
  402. return TRUE;
  403. }
  404. /*
  405. * start ninja hardware timer
  406. */
  407. static void nsp_start_timer(struct scsi_cmnd *SCpnt, int time)
  408. {
  409. unsigned int base = SCpnt->device->host->io_port;
  410. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  411. //nsp_dbg(NSP_DEBUG_INTR, "in SCpnt=0x%p, time=%d", SCpnt, time);
  412. data->TimerCount = time;
  413. nsp_index_write(base, TIMERCOUNT, time);
  414. }
  415. /*
  416. * wait for bus phase change
  417. */
  418. static int nsp_negate_signal(struct scsi_cmnd *SCpnt, unsigned char mask,
  419. char *str)
  420. {
  421. unsigned int base = SCpnt->device->host->io_port;
  422. unsigned char reg;
  423. int time_out;
  424. //nsp_dbg(NSP_DEBUG_INTR, "in");
  425. time_out = 100;
  426. do {
  427. reg = nsp_index_read(base, SCSIBUSMON);
  428. if (reg == 0xff) {
  429. break;
  430. }
  431. } while ((time_out-- != 0) && (reg & mask) != 0);
  432. if (time_out == 0) {
  433. nsp_msg(KERN_DEBUG, " %s signal off timeut", str);
  434. }
  435. return 0;
  436. }
  437. /*
  438. * expect Ninja Irq
  439. */
  440. static int nsp_expect_signal(struct scsi_cmnd *SCpnt,
  441. unsigned char current_phase,
  442. unsigned char mask)
  443. {
  444. unsigned int base = SCpnt->device->host->io_port;
  445. int time_out;
  446. unsigned char phase, i_src;
  447. //nsp_dbg(NSP_DEBUG_INTR, "current_phase=0x%x, mask=0x%x", current_phase, mask);
  448. time_out = 100;
  449. do {
  450. phase = nsp_index_read(base, SCSIBUSMON);
  451. if (phase == 0xff) {
  452. //nsp_dbg(NSP_DEBUG_INTR, "ret -1");
  453. return -1;
  454. }
  455. i_src = nsp_read(base, IRQSTATUS);
  456. if (i_src & IRQSTATUS_SCSI) {
  457. //nsp_dbg(NSP_DEBUG_INTR, "ret 0 found scsi signal");
  458. return 0;
  459. }
  460. if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) {
  461. //nsp_dbg(NSP_DEBUG_INTR, "ret 1 phase=0x%x", phase);
  462. return 1;
  463. }
  464. } while(time_out-- != 0);
  465. //nsp_dbg(NSP_DEBUG_INTR, "timeout");
  466. return -1;
  467. }
  468. /*
  469. * transfer SCSI message
  470. */
  471. static int nsp_xfer(struct scsi_cmnd *SCpnt, int phase)
  472. {
  473. unsigned int base = SCpnt->device->host->io_port;
  474. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  475. char *buf = data->MsgBuffer;
  476. int len = min(MSGBUF_SIZE, data->MsgLen);
  477. int ptr;
  478. int ret;
  479. //nsp_dbg(NSP_DEBUG_DATA_IO, "in");
  480. for (ptr = 0; len > 0; len--, ptr++) {
  481. ret = nsp_expect_signal(SCpnt, phase, BUSMON_REQ);
  482. if (ret <= 0) {
  483. nsp_dbg(NSP_DEBUG_DATA_IO, "xfer quit");
  484. return 0;
  485. }
  486. /* if last byte, negate ATN */
  487. if (len == 1 && SCpnt->SCp.phase == PH_MSG_OUT) {
  488. nsp_index_write(base, SCSIBUSCTRL, AUTODIRECTION | ACKENB);
  489. }
  490. /* read & write message */
  491. if (phase & BUSMON_IO) {
  492. nsp_dbg(NSP_DEBUG_DATA_IO, "read msg");
  493. buf[ptr] = nsp_index_read(base, SCSIDATAWITHACK);
  494. } else {
  495. nsp_dbg(NSP_DEBUG_DATA_IO, "write msg");
  496. nsp_index_write(base, SCSIDATAWITHACK, buf[ptr]);
  497. }
  498. nsp_negate_signal(SCpnt, BUSMON_ACK, "xfer<ack>");
  499. }
  500. return len;
  501. }
  502. /*
  503. * get extra SCSI data from fifo
  504. */
  505. static int nsp_dataphase_bypass(struct scsi_cmnd *SCpnt)
  506. {
  507. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  508. unsigned int count;
  509. //nsp_dbg(NSP_DEBUG_DATA_IO, "in");
  510. if (SCpnt->SCp.have_data_in != IO_IN) {
  511. return 0;
  512. }
  513. count = nsp_fifo_count(SCpnt);
  514. if (data->FifoCount == count) {
  515. //nsp_dbg(NSP_DEBUG_DATA_IO, "not use bypass quirk");
  516. return 0;
  517. }
  518. /*
  519. * XXX: NSP_QUIRK
  520. * data phase skip only occures in case of SCSI_LOW_READ
  521. */
  522. nsp_dbg(NSP_DEBUG_DATA_IO, "use bypass quirk");
  523. SCpnt->SCp.phase = PH_DATA;
  524. nsp_pio_read(SCpnt);
  525. nsp_setup_fifo(data, FALSE);
  526. return 0;
  527. }
  528. /*
  529. * accept reselection
  530. */
  531. static int nsp_reselected(struct scsi_cmnd *SCpnt)
  532. {
  533. unsigned int base = SCpnt->device->host->io_port;
  534. unsigned int host_id = SCpnt->device->host->this_id;
  535. //nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  536. unsigned char bus_reg;
  537. unsigned char id_reg, tmp;
  538. int target;
  539. nsp_dbg(NSP_DEBUG_RESELECTION, "in");
  540. id_reg = nsp_index_read(base, RESELECTID);
  541. tmp = id_reg & (~BIT(host_id));
  542. target = 0;
  543. while(tmp != 0) {
  544. if (tmp & BIT(0)) {
  545. break;
  546. }
  547. tmp >>= 1;
  548. target++;
  549. }
  550. if (scmd_id(SCpnt) != target) {
  551. nsp_msg(KERN_ERR, "XXX: reselect ID must be %d in this implementation.", target);
  552. }
  553. nsp_negate_signal(SCpnt, BUSMON_SEL, "reselect<SEL>");
  554. nsp_nexus(SCpnt);
  555. bus_reg = nsp_index_read(base, SCSIBUSCTRL) & ~(SCSI_BSY | SCSI_ATN);
  556. nsp_index_write(base, SCSIBUSCTRL, bus_reg);
  557. nsp_index_write(base, SCSIBUSCTRL, bus_reg | AUTODIRECTION | ACKENB);
  558. return TRUE;
  559. }
  560. /*
  561. * count how many data transferd
  562. */
  563. static int nsp_fifo_count(struct scsi_cmnd *SCpnt)
  564. {
  565. unsigned int base = SCpnt->device->host->io_port;
  566. unsigned int count;
  567. unsigned int l, m, h, dummy;
  568. nsp_index_write(base, POINTERCLR, POINTER_CLEAR | ACK_COUNTER);
  569. l = nsp_index_read(base, TRANSFERCOUNT);
  570. m = nsp_index_read(base, TRANSFERCOUNT);
  571. h = nsp_index_read(base, TRANSFERCOUNT);
  572. dummy = nsp_index_read(base, TRANSFERCOUNT); /* required this! */
  573. count = (h << 16) | (m << 8) | (l << 0);
  574. //nsp_dbg(NSP_DEBUG_DATA_IO, "count=0x%x", count);
  575. return count;
  576. }
  577. /* fifo size */
  578. #define RFIFO_CRIT 64
  579. #define WFIFO_CRIT 64
  580. /*
  581. * read data in DATA IN phase
  582. */
  583. static void nsp_pio_read(struct scsi_cmnd *SCpnt)
  584. {
  585. unsigned int base = SCpnt->device->host->io_port;
  586. unsigned long mmio_base = SCpnt->device->host->base;
  587. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  588. long time_out;
  589. int ocount, res;
  590. unsigned char stat, fifo_stat;
  591. ocount = data->FifoCount;
  592. nsp_dbg(NSP_DEBUG_DATA_IO, "in SCpnt=0x%p resid=%d ocount=%d ptr=0x%p this_residual=%d buffers=0x%p nbuf=%d",
  593. SCpnt, scsi_get_resid(SCpnt), ocount, SCpnt->SCp.ptr,
  594. SCpnt->SCp.this_residual, SCpnt->SCp.buffer,
  595. SCpnt->SCp.buffers_residual);
  596. time_out = 1000;
  597. while ((time_out-- != 0) &&
  598. (SCpnt->SCp.this_residual > 0 || SCpnt->SCp.buffers_residual > 0 ) ) {
  599. stat = nsp_index_read(base, SCSIBUSMON);
  600. stat &= BUSMON_PHASE_MASK;
  601. res = nsp_fifo_count(SCpnt) - ocount;
  602. //nsp_dbg(NSP_DEBUG_DATA_IO, "ptr=0x%p this=0x%x ocount=0x%x res=0x%x", SCpnt->SCp.ptr, SCpnt->SCp.this_residual, ocount, res);
  603. if (res == 0) { /* if some data avilable ? */
  604. if (stat == BUSPHASE_DATA_IN) { /* phase changed? */
  605. //nsp_dbg(NSP_DEBUG_DATA_IO, " wait for data this=%d", SCpnt->SCp.this_residual);
  606. continue;
  607. } else {
  608. nsp_dbg(NSP_DEBUG_DATA_IO, "phase changed stat=0x%x", stat);
  609. break;
  610. }
  611. }
  612. fifo_stat = nsp_read(base, FIFOSTATUS);
  613. if ((fifo_stat & FIFOSTATUS_FULL_EMPTY) == 0 &&
  614. stat == BUSPHASE_DATA_IN) {
  615. continue;
  616. }
  617. res = min(res, SCpnt->SCp.this_residual);
  618. switch (data->TransferMode) {
  619. case MODE_IO32:
  620. res &= ~(BIT(1)|BIT(0)); /* align 4 */
  621. nsp_fifo32_read(base, SCpnt->SCp.ptr, res >> 2);
  622. break;
  623. case MODE_IO8:
  624. nsp_fifo8_read (base, SCpnt->SCp.ptr, res );
  625. break;
  626. case MODE_MEM32:
  627. res &= ~(BIT(1)|BIT(0)); /* align 4 */
  628. nsp_mmio_fifo32_read(mmio_base, SCpnt->SCp.ptr, res >> 2);
  629. break;
  630. default:
  631. nsp_dbg(NSP_DEBUG_DATA_IO, "unknown read mode");
  632. return;
  633. }
  634. nsp_inc_resid(SCpnt, -res);
  635. SCpnt->SCp.ptr += res;
  636. SCpnt->SCp.this_residual -= res;
  637. ocount += res;
  638. //nsp_dbg(NSP_DEBUG_DATA_IO, "ptr=0x%p this_residual=0x%x ocount=0x%x", SCpnt->SCp.ptr, SCpnt->SCp.this_residual, ocount);
  639. /* go to next scatter list if available */
  640. if (SCpnt->SCp.this_residual == 0 &&
  641. SCpnt->SCp.buffers_residual != 0 ) {
  642. //nsp_dbg(NSP_DEBUG_DATA_IO, "scatterlist next timeout=%d", time_out);
  643. SCpnt->SCp.buffers_residual--;
  644. SCpnt->SCp.buffer++;
  645. SCpnt->SCp.ptr = BUFFER_ADDR;
  646. SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
  647. time_out = 1000;
  648. //nsp_dbg(NSP_DEBUG_DATA_IO, "page: 0x%p, off: 0x%x", SCpnt->SCp.buffer->page, SCpnt->SCp.buffer->offset);
  649. }
  650. }
  651. data->FifoCount = ocount;
  652. if (time_out == 0) {
  653. nsp_msg(KERN_DEBUG, "pio read timeout resid=%d this_residual=%d buffers_residual=%d",
  654. scsi_get_resid(SCpnt), SCpnt->SCp.this_residual,
  655. SCpnt->SCp.buffers_residual);
  656. }
  657. nsp_dbg(NSP_DEBUG_DATA_IO, "read ocount=0x%x", ocount);
  658. nsp_dbg(NSP_DEBUG_DATA_IO, "r cmd=%d resid=0x%x\n", data->CmdId,
  659. scsi_get_resid(SCpnt));
  660. }
  661. /*
  662. * write data in DATA OUT phase
  663. */
  664. static void nsp_pio_write(struct scsi_cmnd *SCpnt)
  665. {
  666. unsigned int base = SCpnt->device->host->io_port;
  667. unsigned long mmio_base = SCpnt->device->host->base;
  668. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  669. int time_out;
  670. int ocount, res;
  671. unsigned char stat;
  672. ocount = data->FifoCount;
  673. nsp_dbg(NSP_DEBUG_DATA_IO, "in fifocount=%d ptr=0x%p this_residual=%d buffers=0x%p nbuf=%d resid=0x%x",
  674. data->FifoCount, SCpnt->SCp.ptr, SCpnt->SCp.this_residual,
  675. SCpnt->SCp.buffer, SCpnt->SCp.buffers_residual,
  676. scsi_get_resid(SCpnt));
  677. time_out = 1000;
  678. while ((time_out-- != 0) &&
  679. (SCpnt->SCp.this_residual > 0 || SCpnt->SCp.buffers_residual > 0)) {
  680. stat = nsp_index_read(base, SCSIBUSMON);
  681. stat &= BUSMON_PHASE_MASK;
  682. if (stat != BUSPHASE_DATA_OUT) {
  683. res = ocount - nsp_fifo_count(SCpnt);
  684. nsp_dbg(NSP_DEBUG_DATA_IO, "phase changed stat=0x%x, res=%d\n", stat, res);
  685. /* Put back pointer */
  686. nsp_inc_resid(SCpnt, res);
  687. SCpnt->SCp.ptr -= res;
  688. SCpnt->SCp.this_residual += res;
  689. ocount -= res;
  690. break;
  691. }
  692. res = ocount - nsp_fifo_count(SCpnt);
  693. if (res > 0) { /* write all data? */
  694. nsp_dbg(NSP_DEBUG_DATA_IO, "wait for all data out. ocount=0x%x res=%d", ocount, res);
  695. continue;
  696. }
  697. res = min(SCpnt->SCp.this_residual, WFIFO_CRIT);
  698. //nsp_dbg(NSP_DEBUG_DATA_IO, "ptr=0x%p this=0x%x res=0x%x", SCpnt->SCp.ptr, SCpnt->SCp.this_residual, res);
  699. switch (data->TransferMode) {
  700. case MODE_IO32:
  701. res &= ~(BIT(1)|BIT(0)); /* align 4 */
  702. nsp_fifo32_write(base, SCpnt->SCp.ptr, res >> 2);
  703. break;
  704. case MODE_IO8:
  705. nsp_fifo8_write (base, SCpnt->SCp.ptr, res );
  706. break;
  707. case MODE_MEM32:
  708. res &= ~(BIT(1)|BIT(0)); /* align 4 */
  709. nsp_mmio_fifo32_write(mmio_base, SCpnt->SCp.ptr, res >> 2);
  710. break;
  711. default:
  712. nsp_dbg(NSP_DEBUG_DATA_IO, "unknown write mode");
  713. break;
  714. }
  715. nsp_inc_resid(SCpnt, -res);
  716. SCpnt->SCp.ptr += res;
  717. SCpnt->SCp.this_residual -= res;
  718. ocount += res;
  719. /* go to next scatter list if available */
  720. if (SCpnt->SCp.this_residual == 0 &&
  721. SCpnt->SCp.buffers_residual != 0 ) {
  722. //nsp_dbg(NSP_DEBUG_DATA_IO, "scatterlist next");
  723. SCpnt->SCp.buffers_residual--;
  724. SCpnt->SCp.buffer++;
  725. SCpnt->SCp.ptr = BUFFER_ADDR;
  726. SCpnt->SCp.this_residual = SCpnt->SCp.buffer->length;
  727. time_out = 1000;
  728. }
  729. }
  730. data->FifoCount = ocount;
  731. if (time_out == 0) {
  732. nsp_msg(KERN_DEBUG, "pio write timeout resid=0x%x",
  733. scsi_get_resid(SCpnt));
  734. }
  735. nsp_dbg(NSP_DEBUG_DATA_IO, "write ocount=0x%x", ocount);
  736. nsp_dbg(NSP_DEBUG_DATA_IO, "w cmd=%d resid=0x%x\n", data->CmdId,
  737. scsi_get_resid(SCpnt));
  738. }
  739. #undef RFIFO_CRIT
  740. #undef WFIFO_CRIT
  741. /*
  742. * setup synchronous/asynchronous data transfer mode
  743. */
  744. static int nsp_nexus(struct scsi_cmnd *SCpnt)
  745. {
  746. unsigned int base = SCpnt->device->host->io_port;
  747. unsigned char target = scmd_id(SCpnt);
  748. // unsigned char lun = SCpnt->device->lun;
  749. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  750. sync_data *sync = &(data->Sync[target]);
  751. //nsp_dbg(NSP_DEBUG_DATA_IO, "in SCpnt=0x%p", SCpnt);
  752. /* setup synch transfer registers */
  753. nsp_index_write(base, SYNCREG, sync->SyncRegister);
  754. nsp_index_write(base, ACKWIDTH, sync->AckWidth);
  755. if (scsi_get_resid(SCpnt) % 4 != 0 ||
  756. scsi_get_resid(SCpnt) <= PAGE_SIZE ) {
  757. data->TransferMode = MODE_IO8;
  758. } else if (nsp_burst_mode == BURST_MEM32) {
  759. data->TransferMode = MODE_MEM32;
  760. } else if (nsp_burst_mode == BURST_IO32) {
  761. data->TransferMode = MODE_IO32;
  762. } else {
  763. data->TransferMode = MODE_IO8;
  764. }
  765. /* setup pdma fifo */
  766. nsp_setup_fifo(data, TRUE);
  767. /* clear ack counter */
  768. data->FifoCount = 0;
  769. nsp_index_write(base, POINTERCLR, POINTER_CLEAR |
  770. ACK_COUNTER_CLEAR |
  771. REQ_COUNTER_CLEAR |
  772. HOST_COUNTER_CLEAR);
  773. return 0;
  774. }
  775. #include "nsp_message.c"
  776. /*
  777. * interrupt handler
  778. */
  779. static irqreturn_t nspintr(int irq, void *dev_id)
  780. {
  781. unsigned int base;
  782. unsigned char irq_status, irq_phase, phase;
  783. struct scsi_cmnd *tmpSC;
  784. unsigned char target, lun;
  785. unsigned int *sync_neg;
  786. int i, tmp;
  787. nsp_hw_data *data;
  788. //nsp_dbg(NSP_DEBUG_INTR, "dev_id=0x%p", dev_id);
  789. //nsp_dbg(NSP_DEBUG_INTR, "host=0x%p", ((scsi_info_t *)dev_id)->host);
  790. if ( dev_id != NULL &&
  791. ((scsi_info_t *)dev_id)->host != NULL ) {
  792. scsi_info_t *info = (scsi_info_t *)dev_id;
  793. data = (nsp_hw_data *)info->host->hostdata;
  794. } else {
  795. nsp_dbg(NSP_DEBUG_INTR, "host data wrong");
  796. return IRQ_NONE;
  797. }
  798. //nsp_dbg(NSP_DEBUG_INTR, "&nsp_data_base=0x%p, dev_id=0x%p", &nsp_data_base, dev_id);
  799. base = data->BaseAddress;
  800. //nsp_dbg(NSP_DEBUG_INTR, "base=0x%x", base);
  801. /*
  802. * interrupt check
  803. */
  804. nsp_write(base, IRQCONTROL, IRQCONTROL_IRQDISABLE);
  805. irq_status = nsp_read(base, IRQSTATUS);
  806. //nsp_dbg(NSP_DEBUG_INTR, "irq_status=0x%x", irq_status);
  807. if ((irq_status == 0xff) || ((irq_status & IRQSTATUS_MASK) == 0)) {
  808. nsp_write(base, IRQCONTROL, 0);
  809. //nsp_dbg(NSP_DEBUG_INTR, "no irq/shared irq");
  810. return IRQ_NONE;
  811. }
  812. /* XXX: IMPORTANT
  813. * Do not read an irq_phase register if no scsi phase interrupt.
  814. * Unless, you should lose a scsi phase interrupt.
  815. */
  816. phase = nsp_index_read(base, SCSIBUSMON);
  817. if((irq_status & IRQSTATUS_SCSI) != 0) {
  818. irq_phase = nsp_index_read(base, IRQPHASESENCE);
  819. } else {
  820. irq_phase = 0;
  821. }
  822. //nsp_dbg(NSP_DEBUG_INTR, "irq_phase=0x%x", irq_phase);
  823. /*
  824. * timer interrupt handler (scsi vs timer interrupts)
  825. */
  826. //nsp_dbg(NSP_DEBUG_INTR, "timercount=%d", data->TimerCount);
  827. if (data->TimerCount != 0) {
  828. //nsp_dbg(NSP_DEBUG_INTR, "stop timer");
  829. nsp_index_write(base, TIMERCOUNT, 0);
  830. nsp_index_write(base, TIMERCOUNT, 0);
  831. data->TimerCount = 0;
  832. }
  833. if ((irq_status & IRQSTATUS_MASK) == IRQSTATUS_TIMER &&
  834. data->SelectionTimeOut == 0) {
  835. //nsp_dbg(NSP_DEBUG_INTR, "timer start");
  836. nsp_write(base, IRQCONTROL, IRQCONTROL_TIMER_CLEAR);
  837. return IRQ_HANDLED;
  838. }
  839. nsp_write(base, IRQCONTROL, IRQCONTROL_TIMER_CLEAR | IRQCONTROL_FIFO_CLEAR);
  840. if ((irq_status & IRQSTATUS_SCSI) &&
  841. (irq_phase & SCSI_RESET_IRQ)) {
  842. nsp_msg(KERN_ERR, "bus reset (power off?)");
  843. nsphw_init(data);
  844. nsp_bus_reset(data);
  845. if(data->CurrentSC != NULL) {
  846. tmpSC = data->CurrentSC;
  847. tmpSC->result = (DID_RESET << 16) |
  848. ((tmpSC->SCp.Message & 0xff) << 8) |
  849. ((tmpSC->SCp.Status & 0xff) << 0);
  850. nsp_scsi_done(tmpSC);
  851. }
  852. return IRQ_HANDLED;
  853. }
  854. if (data->CurrentSC == NULL) {
  855. nsp_msg(KERN_ERR, "CurrentSC==NULL irq_status=0x%x phase=0x%x irq_phase=0x%x this can't be happen. reset everything", irq_status, phase, irq_phase);
  856. nsphw_init(data);
  857. nsp_bus_reset(data);
  858. return IRQ_HANDLED;
  859. }
  860. tmpSC = data->CurrentSC;
  861. target = tmpSC->device->id;
  862. lun = tmpSC->device->lun;
  863. sync_neg = &(data->Sync[target].SyncNegotiation);
  864. /*
  865. * parse hardware SCSI irq reasons register
  866. */
  867. if (irq_status & IRQSTATUS_SCSI) {
  868. if (irq_phase & RESELECT_IRQ) {
  869. nsp_dbg(NSP_DEBUG_INTR, "reselect");
  870. nsp_write(base, IRQCONTROL, IRQCONTROL_RESELECT_CLEAR);
  871. if (nsp_reselected(tmpSC) != FALSE) {
  872. return IRQ_HANDLED;
  873. }
  874. }
  875. if ((irq_phase & (PHASE_CHANGE_IRQ | LATCHED_BUS_FREE)) == 0) {
  876. return IRQ_HANDLED;
  877. }
  878. }
  879. //show_phase(tmpSC);
  880. switch(tmpSC->SCp.phase) {
  881. case PH_SELSTART:
  882. // *sync_neg = SYNC_NOT_YET;
  883. if ((phase & BUSMON_BSY) == 0) {
  884. //nsp_dbg(NSP_DEBUG_INTR, "selection count=%d", data->SelectionTimeOut);
  885. if (data->SelectionTimeOut >= NSP_SELTIMEOUT) {
  886. nsp_dbg(NSP_DEBUG_INTR, "selection time out");
  887. data->SelectionTimeOut = 0;
  888. nsp_index_write(base, SCSIBUSCTRL, 0);
  889. tmpSC->result = DID_TIME_OUT << 16;
  890. nsp_scsi_done(tmpSC);
  891. return IRQ_HANDLED;
  892. }
  893. data->SelectionTimeOut += 1;
  894. nsp_start_timer(tmpSC, 1000/51);
  895. return IRQ_HANDLED;
  896. }
  897. /* attention assert */
  898. //nsp_dbg(NSP_DEBUG_INTR, "attention assert");
  899. data->SelectionTimeOut = 0;
  900. tmpSC->SCp.phase = PH_SELECTED;
  901. nsp_index_write(base, SCSIBUSCTRL, SCSI_ATN);
  902. udelay(1);
  903. nsp_index_write(base, SCSIBUSCTRL, SCSI_ATN | AUTODIRECTION | ACKENB);
  904. return IRQ_HANDLED;
  905. break;
  906. case PH_RESELECT:
  907. //nsp_dbg(NSP_DEBUG_INTR, "phase reselect");
  908. // *sync_neg = SYNC_NOT_YET;
  909. if ((phase & BUSMON_PHASE_MASK) != BUSPHASE_MESSAGE_IN) {
  910. tmpSC->result = DID_ABORT << 16;
  911. nsp_scsi_done(tmpSC);
  912. return IRQ_HANDLED;
  913. }
  914. /* fall thru */
  915. default:
  916. if ((irq_status & (IRQSTATUS_SCSI | IRQSTATUS_FIFO)) == 0) {
  917. return IRQ_HANDLED;
  918. }
  919. break;
  920. }
  921. /*
  922. * SCSI sequencer
  923. */
  924. //nsp_dbg(NSP_DEBUG_INTR, "start scsi seq");
  925. /* normal disconnect */
  926. if (((tmpSC->SCp.phase == PH_MSG_IN) || (tmpSC->SCp.phase == PH_MSG_OUT)) &&
  927. (irq_phase & LATCHED_BUS_FREE) != 0 ) {
  928. nsp_dbg(NSP_DEBUG_INTR, "normal disconnect irq_status=0x%x, phase=0x%x, irq_phase=0x%x", irq_status, phase, irq_phase);
  929. //*sync_neg = SYNC_NOT_YET;
  930. if ((tmpSC->SCp.Message == MSG_COMMAND_COMPLETE)) { /* all command complete and return status */
  931. tmpSC->result = (DID_OK << 16) |
  932. ((tmpSC->SCp.Message & 0xff) << 8) |
  933. ((tmpSC->SCp.Status & 0xff) << 0);
  934. nsp_dbg(NSP_DEBUG_INTR, "command complete result=0x%x", tmpSC->result);
  935. nsp_scsi_done(tmpSC);
  936. return IRQ_HANDLED;
  937. }
  938. return IRQ_HANDLED;
  939. }
  940. /* check unexpected bus free state */
  941. if (phase == 0) {
  942. nsp_msg(KERN_DEBUG, "unexpected bus free. irq_status=0x%x, phase=0x%x, irq_phase=0x%x", irq_status, phase, irq_phase);
  943. *sync_neg = SYNC_NG;
  944. tmpSC->result = DID_ERROR << 16;
  945. nsp_scsi_done(tmpSC);
  946. return IRQ_HANDLED;
  947. }
  948. switch (phase & BUSMON_PHASE_MASK) {
  949. case BUSPHASE_COMMAND:
  950. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_COMMAND");
  951. if ((phase & BUSMON_REQ) == 0) {
  952. nsp_dbg(NSP_DEBUG_INTR, "REQ == 0");
  953. return IRQ_HANDLED;
  954. }
  955. tmpSC->SCp.phase = PH_COMMAND;
  956. nsp_nexus(tmpSC);
  957. /* write scsi command */
  958. nsp_dbg(NSP_DEBUG_INTR, "cmd_len=%d", tmpSC->cmd_len);
  959. nsp_index_write(base, COMMANDCTRL, CLEAR_COMMAND_POINTER);
  960. for (i = 0; i < tmpSC->cmd_len; i++) {
  961. nsp_index_write(base, COMMANDDATA, tmpSC->cmnd[i]);
  962. }
  963. nsp_index_write(base, COMMANDCTRL, CLEAR_COMMAND_POINTER | AUTO_COMMAND_GO);
  964. break;
  965. case BUSPHASE_DATA_OUT:
  966. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_DATA_OUT");
  967. tmpSC->SCp.phase = PH_DATA;
  968. tmpSC->SCp.have_data_in = IO_OUT;
  969. nsp_pio_write(tmpSC);
  970. break;
  971. case BUSPHASE_DATA_IN:
  972. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_DATA_IN");
  973. tmpSC->SCp.phase = PH_DATA;
  974. tmpSC->SCp.have_data_in = IO_IN;
  975. nsp_pio_read(tmpSC);
  976. break;
  977. case BUSPHASE_STATUS:
  978. nsp_dataphase_bypass(tmpSC);
  979. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_STATUS");
  980. tmpSC->SCp.phase = PH_STATUS;
  981. tmpSC->SCp.Status = nsp_index_read(base, SCSIDATAWITHACK);
  982. nsp_dbg(NSP_DEBUG_INTR, "message=0x%x status=0x%x", tmpSC->SCp.Message, tmpSC->SCp.Status);
  983. break;
  984. case BUSPHASE_MESSAGE_OUT:
  985. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_MESSAGE_OUT");
  986. if ((phase & BUSMON_REQ) == 0) {
  987. goto timer_out;
  988. }
  989. tmpSC->SCp.phase = PH_MSG_OUT;
  990. //*sync_neg = SYNC_NOT_YET;
  991. data->MsgLen = i = 0;
  992. data->MsgBuffer[i] = IDENTIFY(TRUE, lun); i++;
  993. if (*sync_neg == SYNC_NOT_YET) {
  994. data->Sync[target].SyncPeriod = 0;
  995. data->Sync[target].SyncOffset = 0;
  996. /**/
  997. data->MsgBuffer[i] = MSG_EXTENDED; i++;
  998. data->MsgBuffer[i] = 3; i++;
  999. data->MsgBuffer[i] = MSG_EXT_SDTR; i++;
  1000. data->MsgBuffer[i] = 0x0c; i++;
  1001. data->MsgBuffer[i] = 15; i++;
  1002. /**/
  1003. }
  1004. data->MsgLen = i;
  1005. nsp_analyze_sdtr(tmpSC);
  1006. show_message(data);
  1007. nsp_message_out(tmpSC);
  1008. break;
  1009. case BUSPHASE_MESSAGE_IN:
  1010. nsp_dataphase_bypass(tmpSC);
  1011. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE_MESSAGE_IN");
  1012. if ((phase & BUSMON_REQ) == 0) {
  1013. goto timer_out;
  1014. }
  1015. tmpSC->SCp.phase = PH_MSG_IN;
  1016. nsp_message_in(tmpSC);
  1017. /**/
  1018. if (*sync_neg == SYNC_NOT_YET) {
  1019. //nsp_dbg(NSP_DEBUG_INTR, "sync target=%d,lun=%d",target,lun);
  1020. if (data->MsgLen >= 5 &&
  1021. data->MsgBuffer[0] == MSG_EXTENDED &&
  1022. data->MsgBuffer[1] == 3 &&
  1023. data->MsgBuffer[2] == MSG_EXT_SDTR ) {
  1024. data->Sync[target].SyncPeriod = data->MsgBuffer[3];
  1025. data->Sync[target].SyncOffset = data->MsgBuffer[4];
  1026. //nsp_dbg(NSP_DEBUG_INTR, "sync ok, %d %d", data->MsgBuffer[3], data->MsgBuffer[4]);
  1027. *sync_neg = SYNC_OK;
  1028. } else {
  1029. data->Sync[target].SyncPeriod = 0;
  1030. data->Sync[target].SyncOffset = 0;
  1031. *sync_neg = SYNC_NG;
  1032. }
  1033. nsp_analyze_sdtr(tmpSC);
  1034. }
  1035. /**/
  1036. /* search last messeage byte */
  1037. tmp = -1;
  1038. for (i = 0; i < data->MsgLen; i++) {
  1039. tmp = data->MsgBuffer[i];
  1040. if (data->MsgBuffer[i] == MSG_EXTENDED) {
  1041. i += (1 + data->MsgBuffer[i+1]);
  1042. }
  1043. }
  1044. tmpSC->SCp.Message = tmp;
  1045. nsp_dbg(NSP_DEBUG_INTR, "message=0x%x len=%d", tmpSC->SCp.Message, data->MsgLen);
  1046. show_message(data);
  1047. break;
  1048. case BUSPHASE_SELECT:
  1049. default:
  1050. nsp_dbg(NSP_DEBUG_INTR, "BUSPHASE other");
  1051. break;
  1052. }
  1053. //nsp_dbg(NSP_DEBUG_INTR, "out");
  1054. return IRQ_HANDLED;
  1055. timer_out:
  1056. nsp_start_timer(tmpSC, 1000/102);
  1057. return IRQ_HANDLED;
  1058. }
  1059. #ifdef NSP_DEBUG
  1060. #include "nsp_debug.c"
  1061. #endif /* NSP_DEBUG */
  1062. /*----------------------------------------------------------------*/
  1063. /* look for ninja3 card and init if found */
  1064. /*----------------------------------------------------------------*/
  1065. static struct Scsi_Host *nsp_detect(struct scsi_host_template *sht)
  1066. {
  1067. struct Scsi_Host *host; /* registered host structure */
  1068. nsp_hw_data *data_b = &nsp_data_base, *data;
  1069. nsp_dbg(NSP_DEBUG_INIT, "this_id=%d", sht->this_id);
  1070. host = scsi_host_alloc(&nsp_driver_template, sizeof(nsp_hw_data));
  1071. if (host == NULL) {
  1072. nsp_dbg(NSP_DEBUG_INIT, "host failed");
  1073. return NULL;
  1074. }
  1075. memcpy(host->hostdata, data_b, sizeof(nsp_hw_data));
  1076. data = (nsp_hw_data *)host->hostdata;
  1077. data->ScsiInfo->host = host;
  1078. #ifdef NSP_DEBUG
  1079. data->CmdId = 0;
  1080. #endif
  1081. nsp_dbg(NSP_DEBUG_INIT, "irq=%d,%d", data_b->IrqNumber, ((nsp_hw_data *)host->hostdata)->IrqNumber);
  1082. host->unique_id = data->BaseAddress;
  1083. host->io_port = data->BaseAddress;
  1084. host->n_io_port = data->NumAddress;
  1085. host->irq = data->IrqNumber;
  1086. host->base = data->MmioAddress;
  1087. spin_lock_init(&(data->Lock));
  1088. snprintf(data->nspinfo,
  1089. sizeof(data->nspinfo),
  1090. "NinjaSCSI-3/32Bi Driver $Revision: 1.23 $ IO:0x%04lx-0x%04lx MMIO(virt addr):0x%04lx IRQ:%02d",
  1091. host->io_port, host->io_port + host->n_io_port - 1,
  1092. host->base,
  1093. host->irq);
  1094. sht->name = data->nspinfo;
  1095. nsp_dbg(NSP_DEBUG_INIT, "end");
  1096. return host; /* detect done. */
  1097. }
  1098. /*----------------------------------------------------------------*/
  1099. /* return info string */
  1100. /*----------------------------------------------------------------*/
  1101. static const char *nsp_info(struct Scsi_Host *shpnt)
  1102. {
  1103. nsp_hw_data *data = (nsp_hw_data *)shpnt->hostdata;
  1104. return data->nspinfo;
  1105. }
  1106. #undef SPRINTF
  1107. #define SPRINTF(args...) \
  1108. do { \
  1109. if(length > (pos - buffer)) { \
  1110. pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \
  1111. nsp_dbg(NSP_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\
  1112. } \
  1113. } while(0)
  1114. static int nsp_proc_info(struct Scsi_Host *host, char *buffer, char **start,
  1115. off_t offset, int length, int inout)
  1116. {
  1117. int id;
  1118. char *pos = buffer;
  1119. int thislength;
  1120. int speed;
  1121. unsigned long flags;
  1122. nsp_hw_data *data;
  1123. int hostno;
  1124. if (inout) {
  1125. return -EINVAL;
  1126. }
  1127. hostno = host->host_no;
  1128. data = (nsp_hw_data *)host->hostdata;
  1129. SPRINTF("NinjaSCSI status\n\n");
  1130. SPRINTF("Driver version: $Revision: 1.23 $\n");
  1131. SPRINTF("SCSI host No.: %d\n", hostno);
  1132. SPRINTF("IRQ: %d\n", host->irq);
  1133. SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
  1134. SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
  1135. SPRINTF("sg_tablesize: %d\n", host->sg_tablesize);
  1136. SPRINTF("burst transfer mode: ");
  1137. switch (nsp_burst_mode) {
  1138. case BURST_IO8:
  1139. SPRINTF("io8");
  1140. break;
  1141. case BURST_IO32:
  1142. SPRINTF("io32");
  1143. break;
  1144. case BURST_MEM32:
  1145. SPRINTF("mem32");
  1146. break;
  1147. default:
  1148. SPRINTF("???");
  1149. break;
  1150. }
  1151. SPRINTF("\n");
  1152. spin_lock_irqsave(&(data->Lock), flags);
  1153. SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC);
  1154. spin_unlock_irqrestore(&(data->Lock), flags);
  1155. SPRINTF("SDTR status\n");
  1156. for(id = 0; id < ARRAY_SIZE(data->Sync); id++) {
  1157. SPRINTF("id %d: ", id);
  1158. if (id == host->this_id) {
  1159. SPRINTF("----- NinjaSCSI-3 host adapter\n");
  1160. continue;
  1161. }
  1162. switch(data->Sync[id].SyncNegotiation) {
  1163. case SYNC_OK:
  1164. SPRINTF(" sync");
  1165. break;
  1166. case SYNC_NG:
  1167. SPRINTF("async");
  1168. break;
  1169. case SYNC_NOT_YET:
  1170. SPRINTF(" none");
  1171. break;
  1172. default:
  1173. SPRINTF("?????");
  1174. break;
  1175. }
  1176. if (data->Sync[id].SyncPeriod != 0) {
  1177. speed = 1000000 / (data->Sync[id].SyncPeriod * 4);
  1178. SPRINTF(" transfer %d.%dMB/s, offset %d",
  1179. speed / 1000,
  1180. speed % 1000,
  1181. data->Sync[id].SyncOffset
  1182. );
  1183. }
  1184. SPRINTF("\n");
  1185. }
  1186. thislength = pos - (buffer + offset);
  1187. if(thislength < 0) {
  1188. *start = NULL;
  1189. return 0;
  1190. }
  1191. thislength = min(thislength, length);
  1192. *start = buffer + offset;
  1193. return thislength;
  1194. }
  1195. #undef SPRINTF
  1196. /*---------------------------------------------------------------*/
  1197. /* error handler */
  1198. /*---------------------------------------------------------------*/
  1199. /*
  1200. static int nsp_eh_abort(struct scsi_cmnd *SCpnt)
  1201. {
  1202. nsp_dbg(NSP_DEBUG_BUSRESET, "SCpnt=0x%p", SCpnt);
  1203. return nsp_eh_bus_reset(SCpnt);
  1204. }*/
  1205. static int nsp_bus_reset(nsp_hw_data *data)
  1206. {
  1207. unsigned int base = data->BaseAddress;
  1208. int i;
  1209. nsp_write(base, IRQCONTROL, IRQCONTROL_ALLMASK);
  1210. nsp_index_write(base, SCSIBUSCTRL, SCSI_RST);
  1211. mdelay(100); /* 100ms */
  1212. nsp_index_write(base, SCSIBUSCTRL, 0);
  1213. for(i = 0; i < 5; i++) {
  1214. nsp_index_read(base, IRQPHASESENCE); /* dummy read */
  1215. }
  1216. nsphw_init_sync(data);
  1217. nsp_write(base, IRQCONTROL, IRQCONTROL_ALLCLEAR);
  1218. return SUCCESS;
  1219. }
  1220. static int nsp_eh_bus_reset(struct scsi_cmnd *SCpnt)
  1221. {
  1222. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  1223. nsp_dbg(NSP_DEBUG_BUSRESET, "SCpnt=0x%p", SCpnt);
  1224. return nsp_bus_reset(data);
  1225. }
  1226. static int nsp_eh_host_reset(struct scsi_cmnd *SCpnt)
  1227. {
  1228. nsp_hw_data *data = (nsp_hw_data *)SCpnt->device->host->hostdata;
  1229. nsp_dbg(NSP_DEBUG_BUSRESET, "in");
  1230. nsphw_init(data);
  1231. return SUCCESS;
  1232. }
  1233. /**********************************************************************
  1234. PCMCIA functions
  1235. **********************************************************************/
  1236. /*======================================================================
  1237. nsp_cs_attach() creates an "instance" of the driver, allocating
  1238. local data structures for one device. The device is registered
  1239. with Card Services.
  1240. The dev_link structure is initialized, but we don't actually
  1241. configure the card at this point -- we wait until we receive a
  1242. card insertion event.
  1243. ======================================================================*/
  1244. static int nsp_cs_probe(struct pcmcia_device *link)
  1245. {
  1246. scsi_info_t *info;
  1247. nsp_hw_data *data = &nsp_data_base;
  1248. int ret;
  1249. nsp_dbg(NSP_DEBUG_INIT, "in");
  1250. /* Create new SCSI device */
  1251. info = kzalloc(sizeof(*info), GFP_KERNEL);
  1252. if (info == NULL) { return -ENOMEM; }
  1253. info->p_dev = link;
  1254. link->priv = info;
  1255. data->ScsiInfo = info;
  1256. nsp_dbg(NSP_DEBUG_INIT, "info=0x%p", info);
  1257. /* The io structure describes IO port mapping */
  1258. link->io.NumPorts1 = 0x10;
  1259. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  1260. link->io.IOAddrLines = 10; /* not used */
  1261. /* Interrupt setup */
  1262. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
  1263. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  1264. /* Interrupt handler */
  1265. link->irq.Handler = &nspintr;
  1266. link->irq.Instance = info;
  1267. link->irq.Attributes |= IRQF_SHARED;
  1268. /* General socket configuration */
  1269. link->conf.Attributes = CONF_ENABLE_IRQ;
  1270. link->conf.IntType = INT_MEMORY_AND_IO;
  1271. ret = nsp_cs_config(link);
  1272. nsp_dbg(NSP_DEBUG_INIT, "link=0x%p", link);
  1273. return ret;
  1274. } /* nsp_cs_attach */
  1275. /*======================================================================
  1276. This deletes a driver "instance". The device is de-registered
  1277. with Card Services. If it has been released, all local data
  1278. structures are freed. Otherwise, the structures will be freed
  1279. when the device is released.
  1280. ======================================================================*/
  1281. static void nsp_cs_detach(struct pcmcia_device *link)
  1282. {
  1283. nsp_dbg(NSP_DEBUG_INIT, "in, link=0x%p", link);
  1284. ((scsi_info_t *)link->priv)->stop = 1;
  1285. nsp_cs_release(link);
  1286. kfree(link->priv);
  1287. link->priv = NULL;
  1288. } /* nsp_cs_detach */
  1289. /*======================================================================
  1290. nsp_cs_config() is scheduled to run after a CARD_INSERTION event
  1291. is received, to configure the PCMCIA socket, and to make the
  1292. ethernet device available to the system.
  1293. ======================================================================*/
  1294. #define CS_CHECK(fn, ret) \
  1295. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  1296. /*====================================================================*/
  1297. static int nsp_cs_config(struct pcmcia_device *link)
  1298. {
  1299. int ret;
  1300. scsi_info_t *info = link->priv;
  1301. tuple_t tuple;
  1302. cisparse_t parse;
  1303. int last_ret, last_fn;
  1304. unsigned char tuple_data[64];
  1305. config_info_t conf;
  1306. win_req_t req;
  1307. memreq_t map;
  1308. cistpl_cftable_entry_t dflt = { 0 };
  1309. struct Scsi_Host *host;
  1310. nsp_hw_data *data = &nsp_data_base;
  1311. nsp_dbg(NSP_DEBUG_INIT, "in");
  1312. tuple.Attributes = 0;
  1313. tuple.TupleData = tuple_data;
  1314. tuple.TupleDataMax = sizeof(tuple_data);
  1315. tuple.TupleOffset = 0;
  1316. /* Look up the current Vcc */
  1317. CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(link, &conf));
  1318. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  1319. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  1320. while (1) {
  1321. cistpl_cftable_entry_t *cfg = &(parse.cftable_entry);
  1322. if (pcmcia_get_tuple_data(link, &tuple) != 0 ||
  1323. pcmcia_parse_tuple(link, &tuple, &parse) != 0)
  1324. goto next_entry;
  1325. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) { dflt = *cfg; }
  1326. if (cfg->index == 0) { goto next_entry; }
  1327. link->conf.ConfigIndex = cfg->index;
  1328. /* Does this card need audio output? */
  1329. if (cfg->flags & CISTPL_CFTABLE_AUDIO) {
  1330. link->conf.Attributes |= CONF_ENABLE_SPKR;
  1331. link->conf.Status = CCSR_AUDIO_ENA;
  1332. }
  1333. /* Use power settings for Vcc and Vpp if present */
  1334. /* Note that the CIS values need to be rescaled */
  1335. if (cfg->vcc.present & (1<<CISTPL_POWER_VNOM)) {
  1336. if (conf.Vcc != cfg->vcc.param[CISTPL_POWER_VNOM]/10000) {
  1337. goto next_entry;
  1338. }
  1339. } else if (dflt.vcc.present & (1<<CISTPL_POWER_VNOM)) {
  1340. if (conf.Vcc != dflt.vcc.param[CISTPL_POWER_VNOM]/10000) {
  1341. goto next_entry;
  1342. }
  1343. }
  1344. if (cfg->vpp1.present & (1 << CISTPL_POWER_VNOM)) {
  1345. link->conf.Vpp =
  1346. cfg->vpp1.param[CISTPL_POWER_VNOM] / 10000;
  1347. } else if (dflt.vpp1.present & (1 << CISTPL_POWER_VNOM)) {
  1348. link->conf.Vpp =
  1349. dflt.vpp1.param[CISTPL_POWER_VNOM] / 10000;
  1350. }
  1351. /* Do we need to allocate an interrupt? */
  1352. if (cfg->irq.IRQInfo1 || dflt.irq.IRQInfo1) {
  1353. link->conf.Attributes |= CONF_ENABLE_IRQ;
  1354. }
  1355. /* IO window settings */
  1356. link->io.NumPorts1 = link->io.NumPorts2 = 0;
  1357. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  1358. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  1359. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  1360. if (!(io->flags & CISTPL_IO_8BIT))
  1361. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  1362. if (!(io->flags & CISTPL_IO_16BIT))
  1363. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  1364. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  1365. link->io.BasePort1 = io->win[0].base;
  1366. link->io.NumPorts1 = io->win[0].len;
  1367. if (io->nwin > 1) {
  1368. link->io.Attributes2 = link->io.Attributes1;
  1369. link->io.BasePort2 = io->win[1].base;
  1370. link->io.NumPorts2 = io->win[1].len;
  1371. }
  1372. /* This reserves IO space but doesn't actually enable it */
  1373. if (pcmcia_request_io(link, &link->io) != 0)
  1374. goto next_entry;
  1375. }
  1376. if ((cfg->mem.nwin > 0) || (dflt.mem.nwin > 0)) {
  1377. cistpl_mem_t *mem =
  1378. (cfg->mem.nwin) ? &cfg->mem : &dflt.mem;
  1379. req.Attributes = WIN_DATA_WIDTH_16|WIN_MEMORY_TYPE_CM;
  1380. req.Attributes |= WIN_ENABLE;
  1381. req.Base = mem->win[0].host_addr;
  1382. req.Size = mem->win[0].len;
  1383. if (req.Size < 0x1000) {
  1384. req.Size = 0x1000;
  1385. }
  1386. req.AccessSpeed = 0;
  1387. if (pcmcia_request_window(&link, &req, &link->win) != 0)
  1388. goto next_entry;
  1389. map.Page = 0; map.CardOffset = mem->win[0].card_addr;
  1390. if (pcmcia_map_mem_page(link->win, &map) != 0)
  1391. goto next_entry;
  1392. data->MmioAddress = (unsigned long)ioremap_nocache(req.Base, req.Size);
  1393. data->MmioLength = req.Size;
  1394. }
  1395. /* If we got this far, we're cool! */
  1396. break;
  1397. next_entry:
  1398. nsp_dbg(NSP_DEBUG_INIT, "next");
  1399. pcmcia_disable_device(link);
  1400. CS_CHECK(GetNextTuple, pcmcia_get_next_tuple(link, &tuple));
  1401. }
  1402. if (link->conf.Attributes & CONF_ENABLE_IRQ) {
  1403. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  1404. }
  1405. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  1406. if (free_ports) {
  1407. if (link->io.BasePort1) {
  1408. release_region(link->io.BasePort1, link->io.NumPorts1);
  1409. }
  1410. if (link->io.BasePort2) {
  1411. release_region(link->io.BasePort2, link->io.NumPorts2);
  1412. }
  1413. }
  1414. /* Set port and IRQ */
  1415. data->BaseAddress = link->io.BasePort1;
  1416. data->NumAddress = link->io.NumPorts1;
  1417. data->IrqNumber = link->irq.AssignedIRQ;
  1418. nsp_dbg(NSP_DEBUG_INIT, "I/O[0x%x+0x%x] IRQ %d",
  1419. data->BaseAddress, data->NumAddress, data->IrqNumber);
  1420. if(nsphw_init(data) == FALSE) {
  1421. goto cs_failed;
  1422. }
  1423. host = nsp_detect(&nsp_driver_template);
  1424. if (host == NULL) {
  1425. nsp_dbg(NSP_DEBUG_INIT, "detect failed");
  1426. goto cs_failed;
  1427. }
  1428. ret = scsi_add_host (host, NULL);
  1429. if (ret)
  1430. goto cs_failed;
  1431. scsi_scan_host(host);
  1432. snprintf(info->node.dev_name, sizeof(info->node.dev_name), "scsi%d", host->host_no);
  1433. link->dev_node = &info->node;
  1434. info->host = host;
  1435. /* Finally, report what we've done */
  1436. printk(KERN_INFO "nsp_cs: index 0x%02x: ",
  1437. link->conf.ConfigIndex);
  1438. if (link->conf.Vpp) {
  1439. printk(", Vpp %d.%d", link->conf.Vpp/10, link->conf.Vpp%10);
  1440. }
  1441. if (link->conf.Attributes & CONF_ENABLE_IRQ) {
  1442. printk(", irq %d", link->irq.AssignedIRQ);
  1443. }
  1444. if (link->io.NumPorts1) {
  1445. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  1446. link->io.BasePort1+link->io.NumPorts1-1);
  1447. }
  1448. if (link->io.NumPorts2)
  1449. printk(" & 0x%04x-0x%04x", link->io.BasePort2,
  1450. link->io.BasePort2+link->io.NumPorts2-1);
  1451. if (link->win)
  1452. printk(", mem 0x%06lx-0x%06lx", req.Base,
  1453. req.Base+req.Size-1);
  1454. printk("\n");
  1455. return 0;
  1456. cs_failed:
  1457. nsp_dbg(NSP_DEBUG_INIT, "config fail");
  1458. cs_error(link, last_fn, last_ret);
  1459. nsp_cs_release(link);
  1460. return -ENODEV;
  1461. } /* nsp_cs_config */
  1462. #undef CS_CHECK
  1463. /*======================================================================
  1464. After a card is removed, nsp_cs_release() will unregister the net
  1465. device, and release the PCMCIA configuration. If the device is
  1466. still open, this will be postponed until it is closed.
  1467. ======================================================================*/
  1468. static void nsp_cs_release(struct pcmcia_device *link)
  1469. {
  1470. scsi_info_t *info = link->priv;
  1471. nsp_hw_data *data = NULL;
  1472. if (info->host == NULL) {
  1473. nsp_msg(KERN_DEBUG, "unexpected card release call.");
  1474. } else {
  1475. data = (nsp_hw_data *)info->host->hostdata;
  1476. }
  1477. nsp_dbg(NSP_DEBUG_INIT, "link=0x%p", link);
  1478. /* Unlink the device chain */
  1479. if (info->host != NULL) {
  1480. scsi_remove_host(info->host);
  1481. }
  1482. link->dev_node = NULL;
  1483. if (link->win) {
  1484. if (data != NULL) {
  1485. iounmap((void *)(data->MmioAddress));
  1486. }
  1487. }
  1488. pcmcia_disable_device(link);
  1489. if (info->host != NULL) {
  1490. scsi_host_put(info->host);
  1491. }
  1492. } /* nsp_cs_release */
  1493. static int nsp_cs_suspend(struct pcmcia_device *link)
  1494. {
  1495. scsi_info_t *info = link->priv;
  1496. nsp_hw_data *data;
  1497. nsp_dbg(NSP_DEBUG_INIT, "event: suspend");
  1498. if (info->host != NULL) {
  1499. nsp_msg(KERN_INFO, "clear SDTR status");
  1500. data = (nsp_hw_data *)info->host->hostdata;
  1501. nsphw_init_sync(data);
  1502. }
  1503. info->stop = 1;
  1504. return 0;
  1505. }
  1506. static int nsp_cs_resume(struct pcmcia_device *link)
  1507. {
  1508. scsi_info_t *info = link->priv;
  1509. nsp_hw_data *data;
  1510. nsp_dbg(NSP_DEBUG_INIT, "event: resume");
  1511. info->stop = 0;
  1512. if (info->host != NULL) {
  1513. nsp_msg(KERN_INFO, "reset host and bus");
  1514. data = (nsp_hw_data *)info->host->hostdata;
  1515. nsphw_init (data);
  1516. nsp_bus_reset(data);
  1517. }
  1518. return 0;
  1519. }
  1520. /*======================================================================*
  1521. * module entry point
  1522. *====================================================================*/
  1523. static struct pcmcia_device_id nsp_cs_ids[] = {
  1524. PCMCIA_DEVICE_PROD_ID123("IO DATA", "CBSC16 ", "1", 0x547e66dc, 0x0d63a3fd, 0x51de003a),
  1525. PCMCIA_DEVICE_PROD_ID123("KME ", "SCSI-CARD-001", "1", 0x534c02bc, 0x52008408, 0x51de003a),
  1526. PCMCIA_DEVICE_PROD_ID123("KME ", "SCSI-CARD-002", "1", 0x534c02bc, 0xcb09d5b2, 0x51de003a),
  1527. PCMCIA_DEVICE_PROD_ID123("KME ", "SCSI-CARD-003", "1", 0x534c02bc, 0xbc0ee524, 0x51de003a),
  1528. PCMCIA_DEVICE_PROD_ID123("KME ", "SCSI-CARD-004", "1", 0x534c02bc, 0x226a7087, 0x51de003a),
  1529. PCMCIA_DEVICE_PROD_ID123("WBT", "NinjaSCSI-3", "R1.0", 0xc7ba805f, 0xfdc7c97d, 0x6973710e),
  1530. PCMCIA_DEVICE_PROD_ID123("WORKBIT", "UltraNinja-16", "1", 0x28191418, 0xb70f4b09, 0x51de003a),
  1531. PCMCIA_DEVICE_NULL
  1532. };
  1533. MODULE_DEVICE_TABLE(pcmcia, nsp_cs_ids);
  1534. static struct pcmcia_driver nsp_driver = {
  1535. .owner = THIS_MODULE,
  1536. .drv = {
  1537. .name = "nsp_cs",
  1538. },
  1539. .probe = nsp_cs_probe,
  1540. .remove = nsp_cs_detach,
  1541. .id_table = nsp_cs_ids,
  1542. .suspend = nsp_cs_suspend,
  1543. .resume = nsp_cs_resume,
  1544. };
  1545. static int __init nsp_cs_init(void)
  1546. {
  1547. nsp_msg(KERN_INFO, "loading...");
  1548. return pcmcia_register_driver(&nsp_driver);
  1549. }
  1550. static void __exit nsp_cs_exit(void)
  1551. {
  1552. nsp_msg(KERN_INFO, "unloading...");
  1553. pcmcia_unregister_driver(&nsp_driver);
  1554. }
  1555. module_init(nsp_cs_init)
  1556. module_exit(nsp_cs_exit)
  1557. /* end */