io_sch.h 5.1 KB

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  1. #ifndef S390_IO_SCH_H
  2. #define S390_IO_SCH_H
  3. #include <asm/schid.h>
  4. /*
  5. * command-mode operation request block
  6. */
  7. struct cmd_orb {
  8. u32 intparm; /* interruption parameter */
  9. u32 key : 4; /* flags, like key, suspend control, etc. */
  10. u32 spnd : 1; /* suspend control */
  11. u32 res1 : 1; /* reserved */
  12. u32 mod : 1; /* modification control */
  13. u32 sync : 1; /* synchronize control */
  14. u32 fmt : 1; /* format control */
  15. u32 pfch : 1; /* prefetch control */
  16. u32 isic : 1; /* initial-status-interruption control */
  17. u32 alcc : 1; /* address-limit-checking control */
  18. u32 ssic : 1; /* suppress-suspended-interr. control */
  19. u32 res2 : 1; /* reserved */
  20. u32 c64 : 1; /* IDAW/QDIO 64 bit control */
  21. u32 i2k : 1; /* IDAW 2/4kB block size control */
  22. u32 lpm : 8; /* logical path mask */
  23. u32 ils : 1; /* incorrect length */
  24. u32 zero : 6; /* reserved zeros */
  25. u32 orbx : 1; /* ORB extension control */
  26. u32 cpa; /* channel program address */
  27. } __attribute__ ((packed, aligned(4)));
  28. /*
  29. * transport-mode operation request block
  30. */
  31. struct tm_orb {
  32. u32 intparm;
  33. u32 key:4;
  34. u32 :9;
  35. u32 b:1;
  36. u32 :2;
  37. u32 lpm:8;
  38. u32 :7;
  39. u32 x:1;
  40. u32 tcw;
  41. u32 prio:8;
  42. u32 :8;
  43. u32 rsvpgm:8;
  44. u32 :8;
  45. u32 :32;
  46. u32 :32;
  47. u32 :32;
  48. u32 :32;
  49. } __attribute__ ((packed, aligned(4)));
  50. union orb {
  51. struct cmd_orb cmd;
  52. struct tm_orb tm;
  53. } __attribute__ ((packed, aligned(4)));
  54. struct io_subchannel_private {
  55. union orb orb; /* operation request block */
  56. struct ccw1 sense_ccw; /* static ccw for sense command */
  57. } __attribute__ ((aligned(8)));
  58. #define to_io_private(n) ((struct io_subchannel_private *)n->private)
  59. #define sch_get_cdev(n) (dev_get_drvdata(&n->dev))
  60. #define sch_set_cdev(n, c) (dev_set_drvdata(&n->dev, c))
  61. #define MAX_CIWS 8
  62. /*
  63. * sense-id response buffer layout
  64. */
  65. struct senseid {
  66. /* common part */
  67. u8 reserved; /* always 0x'FF' */
  68. u16 cu_type; /* control unit type */
  69. u8 cu_model; /* control unit model */
  70. u16 dev_type; /* device type */
  71. u8 dev_model; /* device model */
  72. u8 unused; /* padding byte */
  73. /* extended part */
  74. struct ciw ciw[MAX_CIWS]; /* variable # of CIWs */
  75. } __attribute__ ((packed, aligned(4)));
  76. struct ccw_device_private {
  77. struct ccw_device *cdev;
  78. struct subchannel *sch;
  79. int state; /* device state */
  80. atomic_t onoff;
  81. unsigned long registered;
  82. struct ccw_dev_id dev_id; /* device id */
  83. struct subchannel_id schid; /* subchannel number */
  84. u8 imask; /* lpm mask for SNID/SID/SPGID */
  85. int iretry; /* retry counter SNID/SID/SPGID */
  86. struct {
  87. unsigned int fast:1; /* post with "channel end" */
  88. unsigned int repall:1; /* report every interrupt status */
  89. unsigned int pgroup:1; /* do path grouping */
  90. unsigned int force:1; /* allow forced online */
  91. } __attribute__ ((packed)) options;
  92. struct {
  93. unsigned int pgid_single:1; /* use single path for Set PGID */
  94. unsigned int esid:1; /* Ext. SenseID supported by HW */
  95. unsigned int dosense:1; /* delayed SENSE required */
  96. unsigned int doverify:1; /* delayed path verification */
  97. unsigned int donotify:1; /* call notify function */
  98. unsigned int recog_done:1; /* dev. recog. complete */
  99. unsigned int fake_irb:1; /* deliver faked irb */
  100. unsigned int intretry:1; /* retry internal operation */
  101. } __attribute__((packed)) flags;
  102. unsigned long intparm; /* user interruption parameter */
  103. struct qdio_irq *qdio_data;
  104. struct irb irb; /* device status */
  105. struct senseid senseid; /* SenseID info */
  106. struct pgid pgid[8]; /* path group IDs per chpid*/
  107. struct ccw1 iccws[2]; /* ccws for SNID/SID/SPGID commands */
  108. struct work_struct kick_work;
  109. wait_queue_head_t wait_q;
  110. struct timer_list timer;
  111. void *cmb; /* measurement information */
  112. struct list_head cmb_list; /* list of measured devices */
  113. u64 cmb_start_time; /* clock value of cmb reset */
  114. void *cmb_wait; /* deferred cmb enable/disable */
  115. };
  116. static inline int ssch(struct subchannel_id schid, union orb *addr)
  117. {
  118. register struct subchannel_id reg1 asm("1") = schid;
  119. int ccode = -EIO;
  120. asm volatile(
  121. " ssch 0(%2)\n"
  122. "0: ipm %0\n"
  123. " srl %0,28\n"
  124. "1:\n"
  125. EX_TABLE(0b, 1b)
  126. : "+d" (ccode)
  127. : "d" (reg1), "a" (addr), "m" (*addr)
  128. : "cc", "memory");
  129. return ccode;
  130. }
  131. static inline int rsch(struct subchannel_id schid)
  132. {
  133. register struct subchannel_id reg1 asm("1") = schid;
  134. int ccode;
  135. asm volatile(
  136. " rsch\n"
  137. " ipm %0\n"
  138. " srl %0,28"
  139. : "=d" (ccode)
  140. : "d" (reg1)
  141. : "cc", "memory");
  142. return ccode;
  143. }
  144. static inline int csch(struct subchannel_id schid)
  145. {
  146. register struct subchannel_id reg1 asm("1") = schid;
  147. int ccode;
  148. asm volatile(
  149. " csch\n"
  150. " ipm %0\n"
  151. " srl %0,28"
  152. : "=d" (ccode)
  153. : "d" (reg1)
  154. : "cc");
  155. return ccode;
  156. }
  157. static inline int hsch(struct subchannel_id schid)
  158. {
  159. register struct subchannel_id reg1 asm("1") = schid;
  160. int ccode;
  161. asm volatile(
  162. " hsch\n"
  163. " ipm %0\n"
  164. " srl %0,28"
  165. : "=d" (ccode)
  166. : "d" (reg1)
  167. : "cc");
  168. return ccode;
  169. }
  170. static inline int xsch(struct subchannel_id schid)
  171. {
  172. register struct subchannel_id reg1 asm("1") = schid;
  173. int ccode;
  174. asm volatile(
  175. " .insn rre,0xb2760000,%1,0\n"
  176. " ipm %0\n"
  177. " srl %0,28"
  178. : "=d" (ccode)
  179. : "d" (reg1)
  180. : "cc");
  181. return ccode;
  182. }
  183. #endif