rtc-sh.c 18 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <asm/rtc.h>
  28. #define DRV_NAME "sh-rtc"
  29. #define DRV_VERSION "0.2.0"
  30. #define RTC_REG(r) ((r) * rtc_reg_size)
  31. #define R64CNT RTC_REG(0)
  32. #define RSECCNT RTC_REG(1) /* RTC sec */
  33. #define RMINCNT RTC_REG(2) /* RTC min */
  34. #define RHRCNT RTC_REG(3) /* RTC hour */
  35. #define RWKCNT RTC_REG(4) /* RTC week */
  36. #define RDAYCNT RTC_REG(5) /* RTC day */
  37. #define RMONCNT RTC_REG(6) /* RTC month */
  38. #define RYRCNT RTC_REG(7) /* RTC year */
  39. #define RSECAR RTC_REG(8) /* ALARM sec */
  40. #define RMINAR RTC_REG(9) /* ALARM min */
  41. #define RHRAR RTC_REG(10) /* ALARM hour */
  42. #define RWKAR RTC_REG(11) /* ALARM week */
  43. #define RDAYAR RTC_REG(12) /* ALARM day */
  44. #define RMONAR RTC_REG(13) /* ALARM month */
  45. #define RCR1 RTC_REG(14) /* Control */
  46. #define RCR2 RTC_REG(15) /* Control */
  47. /*
  48. * Note on RYRAR and RCR3: Up until this point most of the register
  49. * definitions are consistent across all of the available parts. However,
  50. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  51. * register used to control RYRCNT/RYRAR compare) varies considerably
  52. * across various parts, occasionally being mapped in to a completely
  53. * unrelated address space. For proper RYRAR support a separate resource
  54. * would have to be handed off, but as this is purely optional in
  55. * practice, we simply opt not to support it, thereby keeping the code
  56. * quite a bit more simplified.
  57. */
  58. /* ALARM Bits - or with BCD encoded value */
  59. #define AR_ENB 0x80 /* Enable for alarm cmp */
  60. /* Period Bits */
  61. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  62. #define PF_COUNT 0x200 /* Half periodic counter */
  63. #define PF_OXS 0x400 /* Periodic One x Second */
  64. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  65. #define PF_MASK 0xf00
  66. /* RCR1 Bits */
  67. #define RCR1_CF 0x80 /* Carry Flag */
  68. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  69. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  70. #define RCR1_AF 0x01 /* Alarm Flag */
  71. /* RCR2 Bits */
  72. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  73. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  74. #define RCR2_RTCEN 0x08 /* ENable RTC */
  75. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  76. #define RCR2_RESET 0x02 /* Reset bit */
  77. #define RCR2_START 0x01 /* Start bit */
  78. struct sh_rtc {
  79. void __iomem *regbase;
  80. unsigned long regsize;
  81. struct resource *res;
  82. unsigned int alarm_irq, periodic_irq, carry_irq;
  83. struct rtc_device *rtc_dev;
  84. spinlock_t lock;
  85. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  86. unsigned short periodic_freq;
  87. };
  88. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  89. {
  90. struct sh_rtc *rtc = dev_id;
  91. unsigned int tmp;
  92. spin_lock(&rtc->lock);
  93. tmp = readb(rtc->regbase + RCR1);
  94. tmp &= ~RCR1_CF;
  95. writeb(tmp, rtc->regbase + RCR1);
  96. /* Users have requested One x Second IRQ */
  97. if (rtc->periodic_freq & PF_OXS)
  98. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  99. spin_unlock(&rtc->lock);
  100. return IRQ_HANDLED;
  101. }
  102. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  103. {
  104. struct sh_rtc *rtc = dev_id;
  105. unsigned int tmp;
  106. spin_lock(&rtc->lock);
  107. tmp = readb(rtc->regbase + RCR1);
  108. tmp &= ~(RCR1_AF | RCR1_AIE);
  109. writeb(tmp, rtc->regbase + RCR1);
  110. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  111. spin_unlock(&rtc->lock);
  112. return IRQ_HANDLED;
  113. }
  114. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  115. {
  116. struct sh_rtc *rtc = dev_id;
  117. struct rtc_device *rtc_dev = rtc->rtc_dev;
  118. unsigned int tmp;
  119. spin_lock(&rtc->lock);
  120. tmp = readb(rtc->regbase + RCR2);
  121. tmp &= ~RCR2_PEF;
  122. writeb(tmp, rtc->regbase + RCR2);
  123. /* Half period enabled than one skipped and the next notified */
  124. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  125. rtc->periodic_freq &= ~PF_COUNT;
  126. else {
  127. if (rtc->periodic_freq & PF_HP)
  128. rtc->periodic_freq |= PF_COUNT;
  129. if (rtc->periodic_freq & PF_KOU) {
  130. spin_lock(&rtc_dev->irq_task_lock);
  131. if (rtc_dev->irq_task)
  132. rtc_dev->irq_task->func(rtc_dev->irq_task->private_data);
  133. spin_unlock(&rtc_dev->irq_task_lock);
  134. } else
  135. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  136. }
  137. spin_unlock(&rtc->lock);
  138. return IRQ_HANDLED;
  139. }
  140. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  141. {
  142. struct sh_rtc *rtc = dev_get_drvdata(dev);
  143. unsigned int tmp;
  144. spin_lock_irq(&rtc->lock);
  145. tmp = readb(rtc->regbase + RCR2);
  146. if (enable) {
  147. tmp &= ~RCR2_PEF; /* Clear PES bit */
  148. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  149. } else
  150. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  151. writeb(tmp, rtc->regbase + RCR2);
  152. spin_unlock_irq(&rtc->lock);
  153. }
  154. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  155. {
  156. struct sh_rtc *rtc = dev_get_drvdata(dev);
  157. int tmp, ret = 0;
  158. spin_lock_irq(&rtc->lock);
  159. tmp = rtc->periodic_freq & PF_MASK;
  160. switch (freq) {
  161. case 0:
  162. rtc->periodic_freq = 0x00;
  163. break;
  164. case 1:
  165. rtc->periodic_freq = 0x60;
  166. break;
  167. case 2:
  168. rtc->periodic_freq = 0x50;
  169. break;
  170. case 4:
  171. rtc->periodic_freq = 0x40;
  172. break;
  173. case 8:
  174. rtc->periodic_freq = 0x30 | PF_HP;
  175. break;
  176. case 16:
  177. rtc->periodic_freq = 0x30;
  178. break;
  179. case 32:
  180. rtc->periodic_freq = 0x20 | PF_HP;
  181. break;
  182. case 64:
  183. rtc->periodic_freq = 0x20;
  184. break;
  185. case 128:
  186. rtc->periodic_freq = 0x10 | PF_HP;
  187. break;
  188. case 256:
  189. rtc->periodic_freq = 0x10;
  190. break;
  191. default:
  192. ret = -ENOTSUPP;
  193. }
  194. if (ret == 0) {
  195. rtc->periodic_freq |= tmp;
  196. rtc->rtc_dev->irq_freq = freq;
  197. }
  198. spin_unlock_irq(&rtc->lock);
  199. return ret;
  200. }
  201. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  202. {
  203. struct sh_rtc *rtc = dev_get_drvdata(dev);
  204. unsigned int tmp;
  205. spin_lock_irq(&rtc->lock);
  206. tmp = readb(rtc->regbase + RCR1);
  207. if (!enable)
  208. tmp &= ~RCR1_AIE;
  209. else
  210. tmp |= RCR1_AIE;
  211. writeb(tmp, rtc->regbase + RCR1);
  212. spin_unlock_irq(&rtc->lock);
  213. }
  214. static void sh_rtc_release(struct device *dev)
  215. {
  216. sh_rtc_setpie(dev, 0);
  217. sh_rtc_setaie(dev, 0);
  218. }
  219. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  220. {
  221. struct sh_rtc *rtc = dev_get_drvdata(dev);
  222. unsigned int tmp;
  223. tmp = readb(rtc->regbase + RCR1);
  224. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  225. tmp = readb(rtc->regbase + RCR2);
  226. seq_printf(seq, "periodic_IRQ\t: %s\n",
  227. (tmp & RCR2_PESMASK) ? "yes" : "no");
  228. return 0;
  229. }
  230. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  231. {
  232. struct sh_rtc *rtc = dev_get_drvdata(dev);
  233. unsigned int ret = 0;
  234. switch (cmd) {
  235. case RTC_PIE_OFF:
  236. case RTC_PIE_ON:
  237. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  238. break;
  239. case RTC_AIE_OFF:
  240. case RTC_AIE_ON:
  241. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  242. break;
  243. case RTC_UIE_OFF:
  244. rtc->periodic_freq &= ~PF_OXS;
  245. break;
  246. case RTC_UIE_ON:
  247. rtc->periodic_freq |= PF_OXS;
  248. break;
  249. case RTC_IRQP_READ:
  250. ret = put_user(rtc->rtc_dev->irq_freq,
  251. (unsigned long __user *)arg);
  252. break;
  253. case RTC_IRQP_SET:
  254. ret = sh_rtc_setfreq(dev, arg);
  255. break;
  256. default:
  257. ret = -ENOIOCTLCMD;
  258. }
  259. return ret;
  260. }
  261. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  262. {
  263. struct platform_device *pdev = to_platform_device(dev);
  264. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  265. unsigned int sec128, sec2, yr, yr100, cf_bit;
  266. do {
  267. unsigned int tmp;
  268. spin_lock_irq(&rtc->lock);
  269. tmp = readb(rtc->regbase + RCR1);
  270. tmp &= ~RCR1_CF; /* Clear CF-bit */
  271. tmp |= RCR1_CIE;
  272. writeb(tmp, rtc->regbase + RCR1);
  273. sec128 = readb(rtc->regbase + R64CNT);
  274. tm->tm_sec = BCD2BIN(readb(rtc->regbase + RSECCNT));
  275. tm->tm_min = BCD2BIN(readb(rtc->regbase + RMINCNT));
  276. tm->tm_hour = BCD2BIN(readb(rtc->regbase + RHRCNT));
  277. tm->tm_wday = BCD2BIN(readb(rtc->regbase + RWKCNT));
  278. tm->tm_mday = BCD2BIN(readb(rtc->regbase + RDAYCNT));
  279. tm->tm_mon = BCD2BIN(readb(rtc->regbase + RMONCNT)) - 1;
  280. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  281. yr = readw(rtc->regbase + RYRCNT);
  282. yr100 = BCD2BIN(yr >> 8);
  283. yr &= 0xff;
  284. } else {
  285. yr = readb(rtc->regbase + RYRCNT);
  286. yr100 = BCD2BIN((yr == 0x99) ? 0x19 : 0x20);
  287. }
  288. tm->tm_year = (yr100 * 100 + BCD2BIN(yr)) - 1900;
  289. sec2 = readb(rtc->regbase + R64CNT);
  290. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  291. spin_unlock_irq(&rtc->lock);
  292. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  293. #if RTC_BIT_INVERTED != 0
  294. if ((sec128 & RTC_BIT_INVERTED))
  295. tm->tm_sec--;
  296. #endif
  297. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  298. "mday=%d, mon=%d, year=%d, wday=%d\n",
  299. __func__,
  300. tm->tm_sec, tm->tm_min, tm->tm_hour,
  301. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  302. if (rtc_valid_tm(tm) < 0) {
  303. dev_err(dev, "invalid date\n");
  304. rtc_time_to_tm(0, tm);
  305. }
  306. return 0;
  307. }
  308. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  309. {
  310. struct platform_device *pdev = to_platform_device(dev);
  311. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  312. unsigned int tmp;
  313. int year;
  314. spin_lock_irq(&rtc->lock);
  315. /* Reset pre-scaler & stop RTC */
  316. tmp = readb(rtc->regbase + RCR2);
  317. tmp |= RCR2_RESET;
  318. tmp &= ~RCR2_START;
  319. writeb(tmp, rtc->regbase + RCR2);
  320. writeb(BIN2BCD(tm->tm_sec), rtc->regbase + RSECCNT);
  321. writeb(BIN2BCD(tm->tm_min), rtc->regbase + RMINCNT);
  322. writeb(BIN2BCD(tm->tm_hour), rtc->regbase + RHRCNT);
  323. writeb(BIN2BCD(tm->tm_wday), rtc->regbase + RWKCNT);
  324. writeb(BIN2BCD(tm->tm_mday), rtc->regbase + RDAYCNT);
  325. writeb(BIN2BCD(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  326. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  327. year = (BIN2BCD((tm->tm_year + 1900) / 100) << 8) |
  328. BIN2BCD(tm->tm_year % 100);
  329. writew(year, rtc->regbase + RYRCNT);
  330. } else {
  331. year = tm->tm_year % 100;
  332. writeb(BIN2BCD(year), rtc->regbase + RYRCNT);
  333. }
  334. /* Start RTC */
  335. tmp = readb(rtc->regbase + RCR2);
  336. tmp &= ~RCR2_RESET;
  337. tmp |= RCR2_RTCEN | RCR2_START;
  338. writeb(tmp, rtc->regbase + RCR2);
  339. spin_unlock_irq(&rtc->lock);
  340. return 0;
  341. }
  342. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  343. {
  344. unsigned int byte;
  345. int value = 0xff; /* return 0xff for ignored values */
  346. byte = readb(rtc->regbase + reg_off);
  347. if (byte & AR_ENB) {
  348. byte &= ~AR_ENB; /* strip the enable bit */
  349. value = BCD2BIN(byte);
  350. }
  351. return value;
  352. }
  353. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  354. {
  355. struct platform_device *pdev = to_platform_device(dev);
  356. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  357. struct rtc_time *tm = &wkalrm->time;
  358. spin_lock_irq(&rtc->lock);
  359. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  360. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  361. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  362. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  363. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  364. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  365. if (tm->tm_mon > 0)
  366. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  367. tm->tm_year = 0xffff;
  368. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  369. spin_unlock_irq(&rtc->lock);
  370. return 0;
  371. }
  372. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  373. int value, int reg_off)
  374. {
  375. /* < 0 for a value that is ignored */
  376. if (value < 0)
  377. writeb(0, rtc->regbase + reg_off);
  378. else
  379. writeb(BIN2BCD(value) | AR_ENB, rtc->regbase + reg_off);
  380. }
  381. static int sh_rtc_check_alarm(struct rtc_time *tm)
  382. {
  383. /*
  384. * The original rtc says anything > 0xc0 is "don't care" or "match
  385. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  386. * The original rtc doesn't support years - some things use -1 and
  387. * some 0xffff. We use -1 to make out tests easier.
  388. */
  389. if (tm->tm_year == 0xffff)
  390. tm->tm_year = -1;
  391. if (tm->tm_mon >= 0xff)
  392. tm->tm_mon = -1;
  393. if (tm->tm_mday >= 0xff)
  394. tm->tm_mday = -1;
  395. if (tm->tm_wday >= 0xff)
  396. tm->tm_wday = -1;
  397. if (tm->tm_hour >= 0xff)
  398. tm->tm_hour = -1;
  399. if (tm->tm_min >= 0xff)
  400. tm->tm_min = -1;
  401. if (tm->tm_sec >= 0xff)
  402. tm->tm_sec = -1;
  403. if (tm->tm_year > 9999 ||
  404. tm->tm_mon >= 12 ||
  405. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  406. tm->tm_wday >= 7 ||
  407. tm->tm_hour >= 24 ||
  408. tm->tm_min >= 60 ||
  409. tm->tm_sec >= 60)
  410. return -EINVAL;
  411. return 0;
  412. }
  413. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  414. {
  415. struct platform_device *pdev = to_platform_device(dev);
  416. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  417. unsigned int rcr1;
  418. struct rtc_time *tm = &wkalrm->time;
  419. int mon, err;
  420. err = sh_rtc_check_alarm(tm);
  421. if (unlikely(err < 0))
  422. return err;
  423. spin_lock_irq(&rtc->lock);
  424. /* disable alarm interrupt and clear the alarm flag */
  425. rcr1 = readb(rtc->regbase + RCR1);
  426. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  427. writeb(rcr1, rtc->regbase + RCR1);
  428. /* set alarm time */
  429. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  430. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  431. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  432. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  433. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  434. mon = tm->tm_mon;
  435. if (mon >= 0)
  436. mon += 1;
  437. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  438. if (wkalrm->enabled) {
  439. rcr1 |= RCR1_AIE;
  440. writeb(rcr1, rtc->regbase + RCR1);
  441. }
  442. spin_unlock_irq(&rtc->lock);
  443. return 0;
  444. }
  445. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  446. {
  447. struct platform_device *pdev = to_platform_device(dev);
  448. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  449. if (enabled) {
  450. rtc->periodic_freq |= PF_KOU;
  451. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  452. } else {
  453. rtc->periodic_freq &= ~PF_KOU;
  454. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  455. }
  456. }
  457. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  458. {
  459. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  460. }
  461. static struct rtc_class_ops sh_rtc_ops = {
  462. .release = sh_rtc_release,
  463. .ioctl = sh_rtc_ioctl,
  464. .read_time = sh_rtc_read_time,
  465. .set_time = sh_rtc_set_time,
  466. .read_alarm = sh_rtc_read_alarm,
  467. .set_alarm = sh_rtc_set_alarm,
  468. .irq_set_state = sh_rtc_irq_set_state,
  469. .irq_set_freq = sh_rtc_irq_set_freq,
  470. .proc = sh_rtc_proc,
  471. };
  472. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  473. {
  474. struct sh_rtc *rtc;
  475. struct resource *res;
  476. unsigned int tmp;
  477. int ret = -ENOENT;
  478. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  479. if (unlikely(!rtc))
  480. return -ENOMEM;
  481. spin_lock_init(&rtc->lock);
  482. /* get periodic/carry/alarm irqs */
  483. rtc->periodic_irq = platform_get_irq(pdev, 0);
  484. if (unlikely(rtc->periodic_irq < 0)) {
  485. dev_err(&pdev->dev, "No IRQ for period\n");
  486. goto err_badres;
  487. }
  488. rtc->carry_irq = platform_get_irq(pdev, 1);
  489. if (unlikely(rtc->carry_irq < 0)) {
  490. dev_err(&pdev->dev, "No IRQ for carry\n");
  491. goto err_badres;
  492. }
  493. rtc->alarm_irq = platform_get_irq(pdev, 2);
  494. if (unlikely(rtc->alarm_irq < 0)) {
  495. dev_err(&pdev->dev, "No IRQ for alarm\n");
  496. goto err_badres;
  497. }
  498. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  499. if (unlikely(res == NULL)) {
  500. dev_err(&pdev->dev, "No IO resource\n");
  501. goto err_badres;
  502. }
  503. rtc->regsize = res->end - res->start + 1;
  504. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  505. if (unlikely(!rtc->res)) {
  506. ret = -EBUSY;
  507. goto err_badres;
  508. }
  509. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  510. if (unlikely(!rtc->regbase)) {
  511. ret = -EINVAL;
  512. goto err_badmap;
  513. }
  514. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  515. &sh_rtc_ops, THIS_MODULE);
  516. if (IS_ERR(rtc->rtc_dev)) {
  517. ret = PTR_ERR(rtc->rtc_dev);
  518. goto err_unmap;
  519. }
  520. rtc->capabilities = RTC_DEF_CAPABILITIES;
  521. if (pdev->dev.platform_data) {
  522. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  523. /*
  524. * Some CPUs have special capabilities in addition to the
  525. * default set. Add those in here.
  526. */
  527. rtc->capabilities |= pinfo->capabilities;
  528. }
  529. rtc->rtc_dev->max_user_freq = 256;
  530. rtc->rtc_dev->irq_freq = 1;
  531. rtc->periodic_freq = 0x60;
  532. platform_set_drvdata(pdev, rtc);
  533. /* register periodic/carry/alarm irqs */
  534. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED,
  535. "sh-rtc period", rtc);
  536. if (unlikely(ret)) {
  537. dev_err(&pdev->dev,
  538. "request period IRQ failed with %d, IRQ %d\n", ret,
  539. rtc->periodic_irq);
  540. goto err_unmap;
  541. }
  542. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
  543. "sh-rtc carry", rtc);
  544. if (unlikely(ret)) {
  545. dev_err(&pdev->dev,
  546. "request carry IRQ failed with %d, IRQ %d\n", ret,
  547. rtc->carry_irq);
  548. free_irq(rtc->periodic_irq, rtc);
  549. goto err_unmap;
  550. }
  551. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
  552. "sh-rtc alarm", rtc);
  553. if (unlikely(ret)) {
  554. dev_err(&pdev->dev,
  555. "request alarm IRQ failed with %d, IRQ %d\n", ret,
  556. rtc->alarm_irq);
  557. free_irq(rtc->carry_irq, rtc);
  558. free_irq(rtc->periodic_irq, rtc);
  559. goto err_unmap;
  560. }
  561. tmp = readb(rtc->regbase + RCR1);
  562. tmp &= ~RCR1_CF;
  563. tmp |= RCR1_CIE;
  564. writeb(tmp, rtc->regbase + RCR1);
  565. return 0;
  566. err_unmap:
  567. iounmap(rtc->regbase);
  568. err_badmap:
  569. release_resource(rtc->res);
  570. err_badres:
  571. kfree(rtc);
  572. return ret;
  573. }
  574. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  575. {
  576. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  577. if (likely(rtc->rtc_dev))
  578. rtc_device_unregister(rtc->rtc_dev);
  579. sh_rtc_setpie(&pdev->dev, 0);
  580. sh_rtc_setaie(&pdev->dev, 0);
  581. free_irq(rtc->carry_irq, rtc);
  582. free_irq(rtc->periodic_irq, rtc);
  583. free_irq(rtc->alarm_irq, rtc);
  584. release_resource(rtc->res);
  585. iounmap(rtc->regbase);
  586. platform_set_drvdata(pdev, NULL);
  587. kfree(rtc);
  588. return 0;
  589. }
  590. static struct platform_driver sh_rtc_platform_driver = {
  591. .driver = {
  592. .name = DRV_NAME,
  593. .owner = THIS_MODULE,
  594. },
  595. .probe = sh_rtc_probe,
  596. .remove = __devexit_p(sh_rtc_remove),
  597. };
  598. static int __init sh_rtc_init(void)
  599. {
  600. return platform_driver_register(&sh_rtc_platform_driver);
  601. }
  602. static void __exit sh_rtc_exit(void)
  603. {
  604. platform_driver_unregister(&sh_rtc_platform_driver);
  605. }
  606. module_init(sh_rtc_init);
  607. module_exit(sh_rtc_exit);
  608. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  609. MODULE_VERSION(DRV_VERSION);
  610. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  611. "Jamie Lenehan <lenehan@twibble.org>, "
  612. "Angelo Castello <angelo.castello@st.com>");
  613. MODULE_LICENSE("GPL");
  614. MODULE_ALIAS("platform:" DRV_NAME);