rtc-ds1511.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657
  1. /*
  2. * An rtc driver for the Dallas DS1511
  3. *
  4. * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
  5. * Copyright (C) 2007 Andrew Sharp <andy.sharp@onstor.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Real time clock driver for the Dallas 1511 chip, which also
  12. * contains a watchdog timer. There is a tiny amount of code that
  13. * platform code could use to mess with the watchdog device a little
  14. * bit, but not a full watchdog driver.
  15. */
  16. #include <linux/bcd.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/rtc.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/io.h>
  24. #define DRV_VERSION "0.6"
  25. enum ds1511reg {
  26. DS1511_SEC = 0x0,
  27. DS1511_MIN = 0x1,
  28. DS1511_HOUR = 0x2,
  29. DS1511_DOW = 0x3,
  30. DS1511_DOM = 0x4,
  31. DS1511_MONTH = 0x5,
  32. DS1511_YEAR = 0x6,
  33. DS1511_CENTURY = 0x7,
  34. DS1511_AM1_SEC = 0x8,
  35. DS1511_AM2_MIN = 0x9,
  36. DS1511_AM3_HOUR = 0xa,
  37. DS1511_AM4_DATE = 0xb,
  38. DS1511_WD_MSEC = 0xc,
  39. DS1511_WD_SEC = 0xd,
  40. DS1511_CONTROL_A = 0xe,
  41. DS1511_CONTROL_B = 0xf,
  42. DS1511_RAMADDR_LSB = 0x10,
  43. DS1511_RAMDATA = 0x13
  44. };
  45. #define DS1511_BLF1 0x80
  46. #define DS1511_BLF2 0x40
  47. #define DS1511_PRS 0x20
  48. #define DS1511_PAB 0x10
  49. #define DS1511_TDF 0x08
  50. #define DS1511_KSF 0x04
  51. #define DS1511_WDF 0x02
  52. #define DS1511_IRQF 0x01
  53. #define DS1511_TE 0x80
  54. #define DS1511_CS 0x40
  55. #define DS1511_BME 0x20
  56. #define DS1511_TPE 0x10
  57. #define DS1511_TIE 0x08
  58. #define DS1511_KIE 0x04
  59. #define DS1511_WDE 0x02
  60. #define DS1511_WDS 0x01
  61. #define DS1511_RAM_MAX 0xff
  62. #define RTC_CMD DS1511_CONTROL_B
  63. #define RTC_CMD1 DS1511_CONTROL_A
  64. #define RTC_ALARM_SEC DS1511_AM1_SEC
  65. #define RTC_ALARM_MIN DS1511_AM2_MIN
  66. #define RTC_ALARM_HOUR DS1511_AM3_HOUR
  67. #define RTC_ALARM_DATE DS1511_AM4_DATE
  68. #define RTC_SEC DS1511_SEC
  69. #define RTC_MIN DS1511_MIN
  70. #define RTC_HOUR DS1511_HOUR
  71. #define RTC_DOW DS1511_DOW
  72. #define RTC_DOM DS1511_DOM
  73. #define RTC_MON DS1511_MONTH
  74. #define RTC_YEAR DS1511_YEAR
  75. #define RTC_CENTURY DS1511_CENTURY
  76. #define RTC_TIE DS1511_TIE
  77. #define RTC_TE DS1511_TE
  78. struct rtc_plat_data {
  79. struct rtc_device *rtc;
  80. void __iomem *ioaddr; /* virtual base address */
  81. unsigned long baseaddr; /* physical base address */
  82. int size; /* amount of memory mapped */
  83. int irq;
  84. unsigned int irqen;
  85. int alrm_sec;
  86. int alrm_min;
  87. int alrm_hour;
  88. int alrm_mday;
  89. };
  90. static DEFINE_SPINLOCK(ds1511_lock);
  91. static __iomem char *ds1511_base;
  92. static u32 reg_spacing = 1;
  93. static noinline void
  94. rtc_write(uint8_t val, uint32_t reg)
  95. {
  96. writeb(val, ds1511_base + (reg * reg_spacing));
  97. }
  98. static inline void
  99. rtc_write_alarm(uint8_t val, enum ds1511reg reg)
  100. {
  101. rtc_write((val | 0x80), reg);
  102. }
  103. static noinline uint8_t
  104. rtc_read(enum ds1511reg reg)
  105. {
  106. return readb(ds1511_base + (reg * reg_spacing));
  107. }
  108. static inline void
  109. rtc_disable_update(void)
  110. {
  111. rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
  112. }
  113. static void
  114. rtc_enable_update(void)
  115. {
  116. rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
  117. }
  118. /*
  119. * #define DS1511_WDOG_RESET_SUPPORT
  120. *
  121. * Uncomment this if you want to use these routines in
  122. * some platform code.
  123. */
  124. #ifdef DS1511_WDOG_RESET_SUPPORT
  125. /*
  126. * just enough code to set the watchdog timer so that it
  127. * will reboot the system
  128. */
  129. void
  130. ds1511_wdog_set(unsigned long deciseconds)
  131. {
  132. /*
  133. * the wdog timer can take 99.99 seconds
  134. */
  135. deciseconds %= 10000;
  136. /*
  137. * set the wdog values in the wdog registers
  138. */
  139. rtc_write(BIN2BCD(deciseconds % 100), DS1511_WD_MSEC);
  140. rtc_write(BIN2BCD(deciseconds / 100), DS1511_WD_SEC);
  141. /*
  142. * set wdog enable and wdog 'steering' bit to issue a reset
  143. */
  144. rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
  145. }
  146. void
  147. ds1511_wdog_disable(void)
  148. {
  149. /*
  150. * clear wdog enable and wdog 'steering' bits
  151. */
  152. rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
  153. /*
  154. * clear the wdog counter
  155. */
  156. rtc_write(0, DS1511_WD_MSEC);
  157. rtc_write(0, DS1511_WD_SEC);
  158. }
  159. #endif
  160. /*
  161. * set the rtc chip's idea of the time.
  162. * stupidly, some callers call with year unmolested;
  163. * and some call with year = year - 1900. thanks.
  164. */
  165. static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
  166. {
  167. u8 mon, day, dow, hrs, min, sec, yrs, cen;
  168. unsigned long flags;
  169. /*
  170. * won't have to change this for a while
  171. */
  172. if (rtc_tm->tm_year < 1900) {
  173. rtc_tm->tm_year += 1900;
  174. }
  175. if (rtc_tm->tm_year < 1970) {
  176. return -EINVAL;
  177. }
  178. yrs = rtc_tm->tm_year % 100;
  179. cen = rtc_tm->tm_year / 100;
  180. mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
  181. day = rtc_tm->tm_mday;
  182. dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
  183. hrs = rtc_tm->tm_hour;
  184. min = rtc_tm->tm_min;
  185. sec = rtc_tm->tm_sec;
  186. if ((mon > 12) || (day == 0)) {
  187. return -EINVAL;
  188. }
  189. if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
  190. return -EINVAL;
  191. }
  192. if ((hrs >= 24) || (min >= 60) || (sec >= 60)) {
  193. return -EINVAL;
  194. }
  195. /*
  196. * each register is a different number of valid bits
  197. */
  198. sec = BIN2BCD(sec) & 0x7f;
  199. min = BIN2BCD(min) & 0x7f;
  200. hrs = BIN2BCD(hrs) & 0x3f;
  201. day = BIN2BCD(day) & 0x3f;
  202. mon = BIN2BCD(mon) & 0x1f;
  203. yrs = BIN2BCD(yrs) & 0xff;
  204. cen = BIN2BCD(cen) & 0xff;
  205. spin_lock_irqsave(&ds1511_lock, flags);
  206. rtc_disable_update();
  207. rtc_write(cen, RTC_CENTURY);
  208. rtc_write(yrs, RTC_YEAR);
  209. rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
  210. rtc_write(day, RTC_DOM);
  211. rtc_write(hrs, RTC_HOUR);
  212. rtc_write(min, RTC_MIN);
  213. rtc_write(sec, RTC_SEC);
  214. rtc_write(dow, RTC_DOW);
  215. rtc_enable_update();
  216. spin_unlock_irqrestore(&ds1511_lock, flags);
  217. return 0;
  218. }
  219. static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
  220. {
  221. unsigned int century;
  222. unsigned long flags;
  223. spin_lock_irqsave(&ds1511_lock, flags);
  224. rtc_disable_update();
  225. rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
  226. rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
  227. rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
  228. rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
  229. rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
  230. rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
  231. rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
  232. century = rtc_read(RTC_CENTURY);
  233. rtc_enable_update();
  234. spin_unlock_irqrestore(&ds1511_lock, flags);
  235. rtc_tm->tm_sec = BCD2BIN(rtc_tm->tm_sec);
  236. rtc_tm->tm_min = BCD2BIN(rtc_tm->tm_min);
  237. rtc_tm->tm_hour = BCD2BIN(rtc_tm->tm_hour);
  238. rtc_tm->tm_mday = BCD2BIN(rtc_tm->tm_mday);
  239. rtc_tm->tm_wday = BCD2BIN(rtc_tm->tm_wday);
  240. rtc_tm->tm_mon = BCD2BIN(rtc_tm->tm_mon);
  241. rtc_tm->tm_year = BCD2BIN(rtc_tm->tm_year);
  242. century = BCD2BIN(century) * 100;
  243. /*
  244. * Account for differences between how the RTC uses the values
  245. * and how they are defined in a struct rtc_time;
  246. */
  247. century += rtc_tm->tm_year;
  248. rtc_tm->tm_year = century - 1900;
  249. rtc_tm->tm_mon--;
  250. if (rtc_valid_tm(rtc_tm) < 0) {
  251. dev_err(dev, "retrieved date/time is not valid.\n");
  252. rtc_time_to_tm(0, rtc_tm);
  253. }
  254. return 0;
  255. }
  256. /*
  257. * write the alarm register settings
  258. *
  259. * we only have the use to interrupt every second, otherwise
  260. * known as the update interrupt, or the interrupt if the whole
  261. * date/hours/mins/secs matches. the ds1511 has many more
  262. * permutations, but the kernel doesn't.
  263. */
  264. static void
  265. ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
  266. {
  267. unsigned long flags;
  268. spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
  269. rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
  270. 0x80 : BIN2BCD(pdata->alrm_mday) & 0x3f,
  271. RTC_ALARM_DATE);
  272. rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
  273. 0x80 : BIN2BCD(pdata->alrm_hour) & 0x3f,
  274. RTC_ALARM_HOUR);
  275. rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
  276. 0x80 : BIN2BCD(pdata->alrm_min) & 0x7f,
  277. RTC_ALARM_MIN);
  278. rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
  279. 0x80 : BIN2BCD(pdata->alrm_sec) & 0x7f,
  280. RTC_ALARM_SEC);
  281. rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
  282. rtc_read(RTC_CMD1); /* clear interrupts */
  283. spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
  284. }
  285. static int
  286. ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  287. {
  288. struct platform_device *pdev = to_platform_device(dev);
  289. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  290. if (pdata->irq < 0) {
  291. return -EINVAL;
  292. }
  293. pdata->alrm_mday = alrm->time.tm_mday;
  294. pdata->alrm_hour = alrm->time.tm_hour;
  295. pdata->alrm_min = alrm->time.tm_min;
  296. pdata->alrm_sec = alrm->time.tm_sec;
  297. if (alrm->enabled) {
  298. pdata->irqen |= RTC_AF;
  299. }
  300. ds1511_rtc_update_alarm(pdata);
  301. return 0;
  302. }
  303. static int
  304. ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  305. {
  306. struct platform_device *pdev = to_platform_device(dev);
  307. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  308. if (pdata->irq < 0) {
  309. return -EINVAL;
  310. }
  311. alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
  312. alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
  313. alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
  314. alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
  315. alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
  316. return 0;
  317. }
  318. static irqreturn_t
  319. ds1511_interrupt(int irq, void *dev_id)
  320. {
  321. struct platform_device *pdev = dev_id;
  322. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  323. unsigned long events = RTC_IRQF;
  324. /*
  325. * read and clear interrupt
  326. */
  327. if (!(rtc_read(RTC_CMD1) & DS1511_IRQF)) {
  328. return IRQ_NONE;
  329. }
  330. if (rtc_read(RTC_ALARM_SEC) & 0x80) {
  331. events |= RTC_UF;
  332. } else {
  333. events |= RTC_AF;
  334. }
  335. rtc_update_irq(pdata->rtc, 1, events);
  336. return IRQ_HANDLED;
  337. }
  338. static void
  339. ds1511_rtc_release(struct device *dev)
  340. {
  341. struct platform_device *pdev = to_platform_device(dev);
  342. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  343. if (pdata->irq >= 0) {
  344. pdata->irqen = 0;
  345. ds1511_rtc_update_alarm(pdata);
  346. }
  347. }
  348. static int
  349. ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  350. {
  351. struct platform_device *pdev = to_platform_device(dev);
  352. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  353. if (pdata->irq < 0) {
  354. return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
  355. }
  356. switch (cmd) {
  357. case RTC_AIE_OFF:
  358. pdata->irqen &= ~RTC_AF;
  359. ds1511_rtc_update_alarm(pdata);
  360. break;
  361. case RTC_AIE_ON:
  362. pdata->irqen |= RTC_AF;
  363. ds1511_rtc_update_alarm(pdata);
  364. break;
  365. case RTC_UIE_OFF:
  366. pdata->irqen &= ~RTC_UF;
  367. ds1511_rtc_update_alarm(pdata);
  368. break;
  369. case RTC_UIE_ON:
  370. pdata->irqen |= RTC_UF;
  371. ds1511_rtc_update_alarm(pdata);
  372. break;
  373. default:
  374. return -ENOIOCTLCMD;
  375. }
  376. return 0;
  377. }
  378. static const struct rtc_class_ops ds1511_rtc_ops = {
  379. .read_time = ds1511_rtc_read_time,
  380. .set_time = ds1511_rtc_set_time,
  381. .read_alarm = ds1511_rtc_read_alarm,
  382. .set_alarm = ds1511_rtc_set_alarm,
  383. .release = ds1511_rtc_release,
  384. .ioctl = ds1511_rtc_ioctl,
  385. };
  386. static ssize_t
  387. ds1511_nvram_read(struct kobject *kobj, struct bin_attribute *ba,
  388. char *buf, loff_t pos, size_t size)
  389. {
  390. ssize_t count;
  391. /*
  392. * if count is more than one, turn on "burst" mode
  393. * turn it off when you're done
  394. */
  395. if (size > 1) {
  396. rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
  397. }
  398. if (pos > DS1511_RAM_MAX) {
  399. pos = DS1511_RAM_MAX;
  400. }
  401. if (size + pos > DS1511_RAM_MAX + 1) {
  402. size = DS1511_RAM_MAX - pos + 1;
  403. }
  404. rtc_write(pos, DS1511_RAMADDR_LSB);
  405. for (count = 0; size > 0; count++, size--) {
  406. *buf++ = rtc_read(DS1511_RAMDATA);
  407. }
  408. if (count > 1) {
  409. rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
  410. }
  411. return count;
  412. }
  413. static ssize_t
  414. ds1511_nvram_write(struct kobject *kobj, struct bin_attribute *bin_attr,
  415. char *buf, loff_t pos, size_t size)
  416. {
  417. ssize_t count;
  418. /*
  419. * if count is more than one, turn on "burst" mode
  420. * turn it off when you're done
  421. */
  422. if (size > 1) {
  423. rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
  424. }
  425. if (pos > DS1511_RAM_MAX) {
  426. pos = DS1511_RAM_MAX;
  427. }
  428. if (size + pos > DS1511_RAM_MAX + 1) {
  429. size = DS1511_RAM_MAX - pos + 1;
  430. }
  431. rtc_write(pos, DS1511_RAMADDR_LSB);
  432. for (count = 0; size > 0; count++, size--) {
  433. rtc_write(*buf++, DS1511_RAMDATA);
  434. }
  435. if (count > 1) {
  436. rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
  437. }
  438. return count;
  439. }
  440. static struct bin_attribute ds1511_nvram_attr = {
  441. .attr = {
  442. .name = "nvram",
  443. .mode = S_IRUGO | S_IWUGO,
  444. .owner = THIS_MODULE,
  445. },
  446. .size = DS1511_RAM_MAX,
  447. .read = ds1511_nvram_read,
  448. .write = ds1511_nvram_write,
  449. };
  450. static int __devinit
  451. ds1511_rtc_probe(struct platform_device *pdev)
  452. {
  453. struct rtc_device *rtc;
  454. struct resource *res;
  455. struct rtc_plat_data *pdata = NULL;
  456. int ret = 0;
  457. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  458. if (!res) {
  459. return -ENODEV;
  460. }
  461. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  462. if (!pdata) {
  463. return -ENOMEM;
  464. }
  465. pdata->irq = -1;
  466. pdata->size = res->end - res->start + 1;
  467. if (!request_mem_region(res->start, pdata->size, pdev->name)) {
  468. ret = -EBUSY;
  469. goto out;
  470. }
  471. pdata->baseaddr = res->start;
  472. pdata->size = pdata->size;
  473. ds1511_base = ioremap(pdata->baseaddr, pdata->size);
  474. if (!ds1511_base) {
  475. ret = -ENOMEM;
  476. goto out;
  477. }
  478. pdata->ioaddr = ds1511_base;
  479. pdata->irq = platform_get_irq(pdev, 0);
  480. /*
  481. * turn on the clock and the crystal, etc.
  482. */
  483. rtc_write(0, RTC_CMD);
  484. rtc_write(0, RTC_CMD1);
  485. /*
  486. * clear the wdog counter
  487. */
  488. rtc_write(0, DS1511_WD_MSEC);
  489. rtc_write(0, DS1511_WD_SEC);
  490. /*
  491. * start the clock
  492. */
  493. rtc_enable_update();
  494. /*
  495. * check for a dying bat-tree
  496. */
  497. if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
  498. dev_warn(&pdev->dev, "voltage-low detected.\n");
  499. }
  500. /*
  501. * if the platform has an interrupt in mind for this device,
  502. * then by all means, set it
  503. */
  504. if (pdata->irq >= 0) {
  505. rtc_read(RTC_CMD1);
  506. if (request_irq(pdata->irq, ds1511_interrupt,
  507. IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) {
  508. dev_warn(&pdev->dev, "interrupt not available.\n");
  509. pdata->irq = -1;
  510. }
  511. }
  512. rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops,
  513. THIS_MODULE);
  514. if (IS_ERR(rtc)) {
  515. ret = PTR_ERR(rtc);
  516. goto out;
  517. }
  518. pdata->rtc = rtc;
  519. platform_set_drvdata(pdev, pdata);
  520. ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  521. if (ret) {
  522. goto out;
  523. }
  524. return 0;
  525. out:
  526. if (pdata->rtc) {
  527. rtc_device_unregister(pdata->rtc);
  528. }
  529. if (pdata->irq >= 0) {
  530. free_irq(pdata->irq, pdev);
  531. }
  532. if (ds1511_base) {
  533. iounmap(ds1511_base);
  534. ds1511_base = NULL;
  535. }
  536. if (pdata->baseaddr) {
  537. release_mem_region(pdata->baseaddr, pdata->size);
  538. }
  539. kfree(pdata);
  540. return ret;
  541. }
  542. static int __devexit
  543. ds1511_rtc_remove(struct platform_device *pdev)
  544. {
  545. struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
  546. sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
  547. rtc_device_unregister(pdata->rtc);
  548. pdata->rtc = NULL;
  549. if (pdata->irq >= 0) {
  550. /*
  551. * disable the alarm interrupt
  552. */
  553. rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
  554. rtc_read(RTC_CMD1);
  555. free_irq(pdata->irq, pdev);
  556. }
  557. iounmap(pdata->ioaddr);
  558. ds1511_base = NULL;
  559. release_mem_region(pdata->baseaddr, pdata->size);
  560. kfree(pdata);
  561. return 0;
  562. }
  563. /* work with hotplug and coldplug */
  564. MODULE_ALIAS("platform:ds1511");
  565. static struct platform_driver ds1511_rtc_driver = {
  566. .probe = ds1511_rtc_probe,
  567. .remove = __devexit_p(ds1511_rtc_remove),
  568. .driver = {
  569. .name = "ds1511",
  570. .owner = THIS_MODULE,
  571. },
  572. };
  573. static int __init
  574. ds1511_rtc_init(void)
  575. {
  576. return platform_driver_register(&ds1511_rtc_driver);
  577. }
  578. static void __exit
  579. ds1511_rtc_exit(void)
  580. {
  581. return platform_driver_unregister(&ds1511_rtc_driver);
  582. }
  583. module_init(ds1511_rtc_init);
  584. module_exit(ds1511_rtc_exit);
  585. MODULE_AUTHOR("Andrew Sharp <andy.sharp@onstor.com>");
  586. MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
  587. MODULE_LICENSE("GPL");
  588. MODULE_VERSION(DRV_VERSION);