soc_common.h 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191
  1. /*
  2. * linux/drivers/pcmcia/soc_common.h
  3. *
  4. * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
  5. *
  6. * This file contains definitions for the PCMCIA support code common to
  7. * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
  8. */
  9. #ifndef _ASM_ARCH_PCMCIA
  10. #define _ASM_ARCH_PCMCIA
  11. /* include the world */
  12. #include <linux/cpufreq.h>
  13. #include <pcmcia/cs_types.h>
  14. #include <pcmcia/cs.h>
  15. #include <pcmcia/ss.h>
  16. #include <pcmcia/cistpl.h>
  17. #include "cs_internal.h"
  18. struct device;
  19. struct pcmcia_low_level;
  20. /*
  21. * This structure encapsulates per-socket state which we might need to
  22. * use when responding to a Card Services query of some kind.
  23. */
  24. struct soc_pcmcia_socket {
  25. struct pcmcia_socket socket;
  26. /*
  27. * Info from low level handler
  28. */
  29. struct device *dev;
  30. unsigned int nr;
  31. unsigned int irq;
  32. /*
  33. * Core PCMCIA state
  34. */
  35. struct pcmcia_low_level *ops;
  36. unsigned int status;
  37. socket_state_t cs_state;
  38. unsigned short spd_io[MAX_IO_WIN];
  39. unsigned short spd_mem[MAX_WIN];
  40. unsigned short spd_attr[MAX_WIN];
  41. struct resource res_skt;
  42. struct resource res_io;
  43. struct resource res_mem;
  44. struct resource res_attr;
  45. void __iomem *virt_io;
  46. unsigned int irq_state;
  47. struct timer_list poll_timer;
  48. struct list_head node;
  49. };
  50. struct pcmcia_state {
  51. unsigned detect: 1,
  52. ready: 1,
  53. bvd1: 1,
  54. bvd2: 1,
  55. wrprot: 1,
  56. vs_3v: 1,
  57. vs_Xv: 1;
  58. };
  59. struct pcmcia_low_level {
  60. struct module *owner;
  61. /* first socket in system */
  62. int first;
  63. /* nr of sockets */
  64. int nr;
  65. int (*hw_init)(struct soc_pcmcia_socket *);
  66. void (*hw_shutdown)(struct soc_pcmcia_socket *);
  67. void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  68. int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  69. /*
  70. * Enable card status IRQs on (re-)initialisation. This can
  71. * be called at initialisation, power management event, or
  72. * pcmcia event.
  73. */
  74. void (*socket_init)(struct soc_pcmcia_socket *);
  75. /*
  76. * Disable card status IRQs and PCMCIA bus on suspend.
  77. */
  78. void (*socket_suspend)(struct soc_pcmcia_socket *);
  79. /*
  80. * Hardware specific timing routines.
  81. * If provided, the get_timing routine overrides the SOC default.
  82. */
  83. unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
  84. int (*set_timing)(struct soc_pcmcia_socket *);
  85. int (*show_timing)(struct soc_pcmcia_socket *, char *);
  86. #ifdef CONFIG_CPU_FREQ
  87. /*
  88. * CPUFREQ support.
  89. */
  90. int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
  91. #endif
  92. };
  93. struct pcmcia_irqs {
  94. int sock;
  95. int irq;
  96. const char *str;
  97. };
  98. struct soc_pcmcia_timing {
  99. unsigned short io;
  100. unsigned short mem;
  101. unsigned short attr;
  102. };
  103. extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
  104. extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
  105. extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
  106. extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr);
  107. extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
  108. extern struct list_head soc_pcmcia_sockets;
  109. extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr);
  110. extern int soc_common_drv_pcmcia_remove(struct device *dev);
  111. #ifdef DEBUG
  112. extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
  113. int lvl, const char *fmt, ...);
  114. #define debug(skt, lvl, fmt, arg...) \
  115. soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
  116. #else
  117. #define debug(skt, lvl, fmt, arg...) do { } while (0)
  118. #endif
  119. /*
  120. * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
  121. * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
  122. * a minimum value of 165ns, as well. Section 4.7.2 (describing
  123. * common and attribute memory write timing) says that twWE has a
  124. * minimum value of 150ns for a 250ns cycle time (for 5V operation;
  125. * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
  126. * operation, also section 4.7.4). Section 4.7.3 says that taOE
  127. * has a maximum value of 150ns for a 300ns cycle time (for 5V
  128. * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
  129. *
  130. * When configuring memory maps, Card Services appears to adopt the policy
  131. * that a memory access time of "0" means "use the default." The default
  132. * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
  133. * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
  134. * memory command width time is 300ns.
  135. */
  136. #define SOC_PCMCIA_IO_ACCESS (165)
  137. #define SOC_PCMCIA_5V_MEM_ACCESS (150)
  138. #define SOC_PCMCIA_3V_MEM_ACCESS (300)
  139. #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
  140. /*
  141. * The socket driver actually works nicely in interrupt-driven form,
  142. * so the (relatively infrequent) polling is "just to be sure."
  143. */
  144. #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
  145. /* I/O pins replacing memory pins
  146. * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
  147. *
  148. * These signals change meaning when going from memory-only to
  149. * memory-or-I/O interface:
  150. */
  151. #define iostschg bvd1
  152. #define iospkr bvd2
  153. #endif