pxa2xx_base.c 6.7 KB

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  1. /*======================================================================
  2. Device driver for the PCMCIA control functionality of PXA2xx
  3. microprocessors.
  4. The contents of this file may be used under the
  5. terms of the GNU Public License version 2 (the "GPL")
  6. (c) Ian Molton (spyro@f2s.com) 2003
  7. (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4
  8. derived from sa11xx_base.c
  9. Portions created by John G. Dorsey are
  10. Copyright (C) 1999 John G. Dorsey.
  11. ======================================================================*/
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/cpufreq.h>
  15. #include <linux/ioport.h>
  16. #include <linux/kernel.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/platform_device.h>
  19. #include <mach/hardware.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include <asm/system.h>
  23. #include <mach/pxa-regs.h>
  24. #include <mach/pxa2xx-regs.h>
  25. #include <asm/mach-types.h>
  26. #include <pcmcia/cs_types.h>
  27. #include <pcmcia/ss.h>
  28. #include <pcmcia/cistpl.h>
  29. #include "cs_internal.h"
  30. #include "soc_common.h"
  31. #include "pxa2xx_base.h"
  32. #define MCXX_SETUP_MASK (0x7f)
  33. #define MCXX_ASST_MASK (0x1f)
  34. #define MCXX_HOLD_MASK (0x3f)
  35. #define MCXX_SETUP_SHIFT (0)
  36. #define MCXX_ASST_SHIFT (7)
  37. #define MCXX_HOLD_SHIFT (14)
  38. static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns,
  39. u_int mem_clk_10khz)
  40. {
  41. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  42. return (code / 300000) + ((code % 300000) ? 1 : 0) - 1;
  43. }
  44. static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns,
  45. u_int mem_clk_10khz)
  46. {
  47. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  48. return (code / 300000) + ((code % 300000) ? 1 : 0) + 1;
  49. }
  50. static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns,
  51. u_int mem_clk_10khz)
  52. {
  53. u_int code = pcmcia_cycle_ns * mem_clk_10khz;
  54. return (code / 100000) + ((code % 100000) ? 1 : 0) - 1;
  55. }
  56. /* This function returns the (approximate) command assertion period, in
  57. * nanoseconds, for a given CPU clock frequency and MCXX_ASST value:
  58. */
  59. static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz,
  60. u_int pcmcia_mcxx_asst)
  61. {
  62. return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz);
  63. }
  64. static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock )
  65. {
  66. MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  67. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  68. | ((pxa2xx_mcxx_asst(speed, clock)
  69. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  70. | ((pxa2xx_mcxx_hold(speed, clock)
  71. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  72. return 0;
  73. }
  74. static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock )
  75. {
  76. MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  77. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  78. | ((pxa2xx_mcxx_asst(speed, clock)
  79. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  80. | ((pxa2xx_mcxx_hold(speed, clock)
  81. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  82. return 0;
  83. }
  84. static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock )
  85. {
  86. MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock)
  87. & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT)
  88. | ((pxa2xx_mcxx_asst(speed, clock)
  89. & MCXX_ASST_MASK) << MCXX_ASST_SHIFT)
  90. | ((pxa2xx_mcxx_hold(speed, clock)
  91. & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT);
  92. return 0;
  93. }
  94. static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk)
  95. {
  96. struct soc_pcmcia_timing timing;
  97. int sock = skt->nr;
  98. soc_common_pcmcia_get_timing(skt, &timing);
  99. pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk);
  100. pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk);
  101. pxa2xx_pcmcia_set_mcio(sock, timing.io, clk);
  102. return 0;
  103. }
  104. static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
  105. {
  106. unsigned int clk = get_memclk_frequency_10khz();
  107. return pxa2xx_pcmcia_set_mcxx(skt, clk);
  108. }
  109. #ifdef CONFIG_CPU_FREQ
  110. static int
  111. pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt,
  112. unsigned long val,
  113. struct cpufreq_freqs *freqs)
  114. {
  115. #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock"
  116. switch (val) {
  117. case CPUFREQ_PRECHANGE:
  118. if (freqs->new > freqs->old) {
  119. debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, "
  120. "pre-updating\n",
  121. freqs->new / 1000, (freqs->new / 100) % 10,
  122. freqs->old / 1000, (freqs->old / 100) % 10);
  123. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  124. }
  125. break;
  126. case CPUFREQ_POSTCHANGE:
  127. if (freqs->new < freqs->old) {
  128. debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, "
  129. "post-updating\n",
  130. freqs->new / 1000, (freqs->new / 100) % 10,
  131. freqs->old / 1000, (freqs->old / 100) % 10);
  132. pxa2xx_pcmcia_set_mcxx(skt, freqs->new);
  133. }
  134. break;
  135. }
  136. return 0;
  137. }
  138. #endif
  139. static void pxa2xx_configure_sockets(struct device *dev)
  140. {
  141. struct pcmcia_low_level *ops = dev->platform_data;
  142. /*
  143. * We have at least one socket, so set MECR:CIT
  144. * (Card Is There)
  145. */
  146. MECR |= MECR_CIT;
  147. /* Set MECR:NOS (Number Of Sockets) */
  148. if (ops->nr > 1 || machine_is_viper())
  149. MECR |= MECR_NOS;
  150. else
  151. MECR &= ~MECR_NOS;
  152. }
  153. int __pxa2xx_drv_pcmcia_probe(struct device *dev)
  154. {
  155. int ret;
  156. struct pcmcia_low_level *ops;
  157. if (!dev || !dev->platform_data)
  158. return -ENODEV;
  159. ops = (struct pcmcia_low_level *)dev->platform_data;
  160. /* Provide our PXA2xx specific timing routines. */
  161. ops->set_timing = pxa2xx_pcmcia_set_timing;
  162. #ifdef CONFIG_CPU_FREQ
  163. ops->frequency_change = pxa2xx_pcmcia_frequency_change;
  164. #endif
  165. ret = soc_common_drv_pcmcia_probe(dev, ops, ops->first, ops->nr);
  166. if (!ret)
  167. pxa2xx_configure_sockets(dev);
  168. return ret;
  169. }
  170. EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe);
  171. static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
  172. {
  173. return __pxa2xx_drv_pcmcia_probe(&dev->dev);
  174. }
  175. static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev)
  176. {
  177. return soc_common_drv_pcmcia_remove(&dev->dev);
  178. }
  179. static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state)
  180. {
  181. return pcmcia_socket_dev_suspend(&dev->dev, state);
  182. }
  183. static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev)
  184. {
  185. pxa2xx_configure_sockets(&dev->dev);
  186. return pcmcia_socket_dev_resume(&dev->dev);
  187. }
  188. static struct platform_driver pxa2xx_pcmcia_driver = {
  189. .probe = pxa2xx_drv_pcmcia_probe,
  190. .remove = pxa2xx_drv_pcmcia_remove,
  191. .suspend = pxa2xx_drv_pcmcia_suspend,
  192. .resume = pxa2xx_drv_pcmcia_resume,
  193. .driver = {
  194. .name = "pxa2xx-pcmcia",
  195. .owner = THIS_MODULE,
  196. },
  197. };
  198. static int __init pxa2xx_pcmcia_init(void)
  199. {
  200. return platform_driver_register(&pxa2xx_pcmcia_driver);
  201. }
  202. static void __exit pxa2xx_pcmcia_exit(void)
  203. {
  204. platform_driver_unregister(&pxa2xx_pcmcia_driver);
  205. }
  206. fs_initcall(pxa2xx_pcmcia_init);
  207. module_exit(pxa2xx_pcmcia_exit);
  208. MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>");
  209. MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver");
  210. MODULE_LICENSE("GPL");
  211. MODULE_ALIAS("platform:pxa2xx-pcmcia");