hd64465_ss.c 24 KB

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  1. /*
  2. * Device driver for the PCMCIA controller module of the
  3. * Hitachi HD64465 handheld companion chip.
  4. *
  5. * Note that the HD64465 provides a very thin PCMCIA host bridge
  6. * layer, requiring a lot of the work of supporting cards to be
  7. * performed by the processor. For example: mapping of card
  8. * interrupts to processor IRQs is done by IRQ demuxing software;
  9. * IO and memory mappings are fixed; setting voltages according
  10. * to card Voltage Select pins etc is done in software.
  11. *
  12. * Note also that this driver uses only the simple, fixed,
  13. * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
  14. * HD64465. Larger mappings, smaller mappings, or mappings of
  15. * different width to the same socket, are all possible only by
  16. * involving the SH7750's MMU, which is considered unnecessary here.
  17. * The downside is that it may be possible for some drivers to
  18. * break because they need or expect 8-bit mappings.
  19. *
  20. * This driver currently supports only the following configuration:
  21. * SH7750 CPU, HD64465, TPS2206 voltage control chip.
  22. *
  23. * by Greg Banks <gbanks@pocketpenguins.com>
  24. * (c) 2000 PocketPenguins Inc
  25. */
  26. #include <linux/types.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/string.h>
  30. #include <linux/kernel.h>
  31. #include <linux/ioport.h>
  32. #include <linux/mm.h>
  33. #include <linux/vmalloc.h>
  34. #include <asm/errno.h>
  35. #include <linux/irq.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/platform_device.h>
  38. #include <asm/io.h>
  39. #include <asm/hd64465/hd64465.h>
  40. #include <asm/hd64465/io.h>
  41. #include <pcmcia/cs_types.h>
  42. #include <pcmcia/cs.h>
  43. #include <pcmcia/cistpl.h>
  44. #include <pcmcia/ds.h>
  45. #include <pcmcia/ss.h>
  46. #include "cs_internal.h"
  47. #define MODNAME "hd64465_ss"
  48. /* #define HD64465_DEBUG 1 */
  49. #if HD64465_DEBUG
  50. #define DPRINTK(args...) printk(MODNAME ": " args)
  51. #else
  52. #define DPRINTK(args...)
  53. #endif
  54. extern int hd64465_io_debug;
  55. extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
  56. extern void p3_iounmap(void *addr);
  57. /*============================================================*/
  58. #define HS_IO_MAP_SIZE (64*1024)
  59. typedef struct hs_socket_t
  60. {
  61. unsigned int number;
  62. u_int irq;
  63. u_long mem_base;
  64. void *io_base;
  65. u_long mem_length;
  66. u_int ctrl_base;
  67. socket_state_t state;
  68. pccard_io_map io_maps[MAX_IO_WIN];
  69. pccard_mem_map mem_maps[MAX_WIN];
  70. struct pcmcia_socket socket;
  71. } hs_socket_t;
  72. #define HS_MAX_SOCKETS 2
  73. static hs_socket_t hs_sockets[HS_MAX_SOCKETS];
  74. #define hs_in(sp, r) inb((sp)->ctrl_base + (r))
  75. #define hs_out(sp, v, r) outb(v, (sp)->ctrl_base + (r))
  76. /* translate a boolean value to a bit in a register */
  77. #define bool_to_regbit(sp, r, bi, bo) \
  78. do { \
  79. unsigned short v = hs_in(sp, r); \
  80. if (bo) \
  81. v |= (bi); \
  82. else \
  83. v &= ~(bi); \
  84. hs_out(sp, v, r); \
  85. } while(0)
  86. /* register offsets from HD64465_REG_PCC[01]ISR */
  87. #define ISR 0x0
  88. #define GCR 0x2
  89. #define CSCR 0x4
  90. #define CSCIER 0x6
  91. #define SCR 0x8
  92. /* Mask and values for CSCIER register */
  93. #define IER_MASK 0x80
  94. #define IER_ON 0x3f /* interrupts on */
  95. #define IER_OFF 0x00 /* interrupts off */
  96. /*============================================================*/
  97. #if HD64465_DEBUG > 10
  98. static void cis_hex_dump(const unsigned char *x, int len)
  99. {
  100. int i;
  101. for (i=0 ; i<len ; i++)
  102. {
  103. if (!(i & 0xf))
  104. printk("\n%08x", (unsigned)(x + i));
  105. printk(" %02x", *(volatile unsigned short*)x);
  106. x += 2;
  107. }
  108. printk("\n");
  109. }
  110. #endif
  111. /*============================================================*/
  112. /*
  113. * This code helps create the illusion that the IREQ line from
  114. * the PC card is mapped to one of the CPU's IRQ lines by the
  115. * host bridge hardware (which is how every host bridge *except*
  116. * the HD64465 works). In particular, it supports enabling
  117. * and disabling the IREQ line by code which knows nothing
  118. * about the host bridge (e.g. device drivers, IDE code) using
  119. * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
  120. * functions. Also, it supports sharing the mapped IRQ with
  121. * real hardware IRQs from the -IRL0-3 lines.
  122. */
  123. #define HS_NUM_MAPPED_IRQS 16 /* Limitation of the PCMCIA code */
  124. static struct
  125. {
  126. /* index is mapped irq number */
  127. hs_socket_t *sock;
  128. hw_irq_controller *old_handler;
  129. } hs_mapped_irq[HS_NUM_MAPPED_IRQS];
  130. static void hs_socket_enable_ireq(hs_socket_t *sp)
  131. {
  132. unsigned short cscier;
  133. DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);
  134. cscier = hs_in(sp, CSCIER);
  135. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  136. cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
  137. hs_out(sp, cscier, CSCIER);
  138. }
  139. static void hs_socket_disable_ireq(hs_socket_t *sp)
  140. {
  141. unsigned short cscier;
  142. DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
  143. cscier = hs_in(sp, CSCIER);
  144. cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
  145. hs_out(sp, cscier, CSCIER);
  146. }
  147. static unsigned int hs_startup_irq(unsigned int irq)
  148. {
  149. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  150. hs_mapped_irq[irq].old_handler->startup(irq);
  151. return 0;
  152. }
  153. static void hs_shutdown_irq(unsigned int irq)
  154. {
  155. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  156. hs_mapped_irq[irq].old_handler->shutdown(irq);
  157. }
  158. static void hs_enable_irq(unsigned int irq)
  159. {
  160. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  161. hs_mapped_irq[irq].old_handler->enable(irq);
  162. }
  163. static void hs_disable_irq(unsigned int irq)
  164. {
  165. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  166. hs_mapped_irq[irq].old_handler->disable(irq);
  167. }
  168. extern struct hw_interrupt_type no_irq_type;
  169. static void hs_mask_and_ack_irq(unsigned int irq)
  170. {
  171. hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
  172. /* ack_none() spuriously complains about an unexpected IRQ */
  173. if (hs_mapped_irq[irq].old_handler != &no_irq_type)
  174. hs_mapped_irq[irq].old_handler->ack(irq);
  175. }
  176. static void hs_end_irq(unsigned int irq)
  177. {
  178. hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
  179. hs_mapped_irq[irq].old_handler->end(irq);
  180. }
  181. static struct hw_interrupt_type hd64465_ss_irq_type = {
  182. .typename = "PCMCIA-IRQ",
  183. .startup = hs_startup_irq,
  184. .shutdown = hs_shutdown_irq,
  185. .enable = hs_enable_irq,
  186. .disable = hs_disable_irq,
  187. .ack = hs_mask_and_ack_irq,
  188. .end = hs_end_irq
  189. };
  190. /*
  191. * This function should only ever be called with interrupts disabled.
  192. */
  193. static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
  194. {
  195. DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
  196. if (irq >= HS_NUM_MAPPED_IRQS)
  197. return;
  198. hs_mapped_irq[irq].sock = sp;
  199. /* insert ourselves as the irq controller */
  200. hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
  201. irq_desc[irq].chip = &hd64465_ss_irq_type;
  202. }
  203. /*
  204. * This function should only ever be called with interrupts disabled.
  205. */
  206. static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
  207. {
  208. DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
  209. if (irq >= HS_NUM_MAPPED_IRQS)
  210. return;
  211. /* restore the original irq controller */
  212. irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
  213. }
  214. /*============================================================*/
  215. /*
  216. * Set Vpp and Vcc (in tenths of a Volt). Does not
  217. * support the hi-Z state.
  218. *
  219. * Note, this assumes the board uses a TPS2206 chip to control
  220. * the Vcc and Vpp voltages to the hs_sockets. If your board
  221. * uses the MIC2563 (also supported by the HD64465) then you
  222. * will have to modify this function.
  223. */
  224. /* 0V 3.3V 5.5V */
  225. static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
  226. static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };
  227. static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
  228. {
  229. u_int psr;
  230. u_int vcci = 0;
  231. u_int sock = sp->number;
  232. DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);
  233. switch (Vcc)
  234. {
  235. case 0: vcci = 0; break;
  236. case 33: vcci = 1; break;
  237. case 50: vcci = 2; break;
  238. default: return 0;
  239. }
  240. /* Note: Vpp = 120 not supported -- Greg Banks */
  241. if (Vpp != 0 && Vpp != Vcc)
  242. return 0;
  243. /* The PSR register holds 8 of the 9 bits which control
  244. * the TPS2206 via its serial interface.
  245. */
  246. psr = inw(HD64465_REG_PCCPSR);
  247. switch (sock)
  248. {
  249. case 0:
  250. psr &= 0x0f;
  251. psr |= hs_tps2206_avcc[vcci];
  252. psr |= (Vpp == 0 ? 0x00 : 0x02);
  253. break;
  254. case 1:
  255. psr &= 0xf0;
  256. psr |= hs_tps2206_bvcc[vcci];
  257. psr |= (Vpp == 0 ? 0x00 : 0x20);
  258. break;
  259. };
  260. outw(psr, HD64465_REG_PCCPSR);
  261. return 1;
  262. }
  263. /*============================================================*/
  264. /*
  265. * Drive the RESET line to the card.
  266. */
  267. static void hs_reset_socket(hs_socket_t *sp, int on)
  268. {
  269. unsigned short v;
  270. v = hs_in(sp, GCR);
  271. if (on)
  272. v |= HD64465_PCCGCR_PCCR;
  273. else
  274. v &= ~HD64465_PCCGCR_PCCR;
  275. hs_out(sp, v, GCR);
  276. }
  277. /*============================================================*/
  278. static int hs_init(struct pcmcia_socket *s)
  279. {
  280. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  281. DPRINTK("hs_init(%d)\n", sp->number);
  282. return 0;
  283. }
  284. /*============================================================*/
  285. static int hs_get_status(struct pcmcia_socket *s, u_int *value)
  286. {
  287. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  288. unsigned int isr;
  289. u_int status = 0;
  290. isr = hs_in(sp, ISR);
  291. /* Card is seated and powered when *both* CD pins are low */
  292. if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
  293. {
  294. status |= SS_DETECT; /* card present */
  295. switch (isr & HD64465_PCCISR_PBVD_MASK)
  296. {
  297. case HD64465_PCCISR_PBVD_BATGOOD:
  298. break;
  299. case HD64465_PCCISR_PBVD_BATWARN:
  300. status |= SS_BATWARN;
  301. break;
  302. default:
  303. status |= SS_BATDEAD;
  304. break;
  305. }
  306. if (isr & HD64465_PCCISR_PREADY)
  307. status |= SS_READY;
  308. if (isr & HD64465_PCCISR_PMWP)
  309. status |= SS_WRPROT;
  310. /* Voltage Select pins interpreted as per Table 4-5 of the std.
  311. * Assuming we have the TPS2206, the socket is a "Low Voltage
  312. * key, 3.3V and 5V available, no X.XV available".
  313. */
  314. switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
  315. {
  316. case HD64465_PCCISR_PVS1:
  317. printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
  318. status = 0;
  319. break;
  320. case 0:
  321. case HD64465_PCCISR_PVS2:
  322. /* 3.3V */
  323. status |= SS_3VCARD;
  324. break;
  325. case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
  326. /* 5V */
  327. break;
  328. }
  329. /* TODO: SS_POWERON */
  330. /* TODO: SS_STSCHG */
  331. }
  332. DPRINTK("hs_get_status(%d) = %x\n", sock, status);
  333. *value = status;
  334. return 0;
  335. }
  336. /*============================================================*/
  337. static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
  338. {
  339. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  340. u_long flags;
  341. u_int changed;
  342. unsigned short cscier;
  343. DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
  344. sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
  345. local_irq_save(flags); /* Don't want interrupts happening here */
  346. if (state->Vpp != sp->state.Vpp ||
  347. state->Vcc != sp->state.Vcc) {
  348. if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
  349. local_irq_restore(flags);
  350. return -EINVAL;
  351. }
  352. }
  353. /* hd64465_io_debug = 1; */
  354. /*
  355. * Handle changes in the Card Status Change mask,
  356. * by propagating to the CSCR register
  357. */
  358. changed = sp->state.csc_mask ^ state->csc_mask;
  359. cscier = hs_in(sp, CSCIER);
  360. if (changed & SS_DETECT) {
  361. if (state->csc_mask & SS_DETECT)
  362. cscier |= HD64465_PCCCSCIER_PCDE;
  363. else
  364. cscier &= ~HD64465_PCCCSCIER_PCDE;
  365. }
  366. if (changed & SS_READY) {
  367. if (state->csc_mask & SS_READY)
  368. cscier |= HD64465_PCCCSCIER_PRE;
  369. else
  370. cscier &= ~HD64465_PCCCSCIER_PRE;
  371. }
  372. if (changed & SS_BATDEAD) {
  373. if (state->csc_mask & SS_BATDEAD)
  374. cscier |= HD64465_PCCCSCIER_PBDE;
  375. else
  376. cscier &= ~HD64465_PCCCSCIER_PBDE;
  377. }
  378. if (changed & SS_BATWARN) {
  379. if (state->csc_mask & SS_BATWARN)
  380. cscier |= HD64465_PCCCSCIER_PBWE;
  381. else
  382. cscier &= ~HD64465_PCCCSCIER_PBWE;
  383. }
  384. if (changed & SS_STSCHG) {
  385. if (state->csc_mask & SS_STSCHG)
  386. cscier |= HD64465_PCCCSCIER_PSCE;
  387. else
  388. cscier &= ~HD64465_PCCCSCIER_PSCE;
  389. }
  390. hs_out(sp, cscier, CSCIER);
  391. if (sp->state.io_irq && !state->io_irq)
  392. hs_unmap_irq(sp, sp->state.io_irq);
  393. else if (!sp->state.io_irq && state->io_irq)
  394. hs_map_irq(sp, state->io_irq);
  395. /*
  396. * Handle changes in the flags field,
  397. * by propagating to config registers.
  398. */
  399. changed = sp->state.flags ^ state->flags;
  400. if (changed & SS_IOCARD) {
  401. DPRINTK("card type: %s\n",
  402. (state->flags & SS_IOCARD ? "i/o" : "memory" ));
  403. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
  404. state->flags & SS_IOCARD);
  405. }
  406. if (changed & SS_RESET) {
  407. DPRINTK("%s reset card\n",
  408. (state->flags & SS_RESET ? "start" : "stop"));
  409. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
  410. state->flags & SS_RESET);
  411. }
  412. if (changed & SS_OUTPUT_ENA) {
  413. DPRINTK("%sabling card output\n",
  414. (state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
  415. bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
  416. state->flags & SS_OUTPUT_ENA);
  417. }
  418. /* TODO: SS_SPKR_ENA */
  419. /* hd64465_io_debug = 0; */
  420. sp->state = *state;
  421. local_irq_restore(flags);
  422. #if HD64465_DEBUG > 10
  423. if (state->flags & SS_OUTPUT_ENA)
  424. cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
  425. #endif
  426. return 0;
  427. }
  428. /*============================================================*/
  429. static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
  430. {
  431. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  432. int map = io->map;
  433. int sock = sp->number;
  434. struct pccard_io_map *sio;
  435. pgprot_t prot;
  436. DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
  437. sock, map, io->flags, io->speed, io->start, io->stop);
  438. if (map >= MAX_IO_WIN)
  439. return -EINVAL;
  440. sio = &sp->io_maps[map];
  441. /* check for null changes */
  442. if (io->flags == sio->flags &&
  443. io->start == sio->start &&
  444. io->stop == sio->stop)
  445. return 0;
  446. if (io->flags & MAP_AUTOSZ)
  447. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
  448. else if (io->flags & MAP_16BIT)
  449. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
  450. else
  451. prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);
  452. /* TODO: handle MAP_USE_WAIT */
  453. if (io->flags & MAP_USE_WAIT)
  454. printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
  455. /* TODO: handle MAP_PREFETCH */
  456. if (io->flags & MAP_PREFETCH)
  457. printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
  458. /* TODO: handle MAP_WRPROT */
  459. if (io->flags & MAP_WRPROT)
  460. printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
  461. /* TODO: handle MAP_0WS */
  462. if (io->flags & MAP_0WS)
  463. printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");
  464. if (io->flags & MAP_ACTIVE) {
  465. unsigned long pstart, psize, paddrbase;
  466. paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
  467. pstart = io->start & PAGE_MASK;
  468. psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;
  469. /*
  470. * Change PTEs in only that portion of the mapping requested
  471. * by the caller. This means that most of the time, most of
  472. * the PTEs in the io_vma will be unmapped and only the bottom
  473. * page will be mapped. But the code allows for weird cards
  474. * that might want IO ports > 4K.
  475. */
  476. sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
  477. /*
  478. * Change the mapping used by inb() outb() etc
  479. */
  480. hd64465_port_map(io->start,
  481. io->stop - io->start + 1,
  482. (unsigned long)sp->io_base + io->start, 0);
  483. } else {
  484. hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
  485. p3_iounmap(sp->io_base);
  486. }
  487. *sio = *io;
  488. return 0;
  489. }
  490. /*============================================================*/
  491. static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
  492. {
  493. hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
  494. struct pccard_mem_map *smem;
  495. int map = mem->map;
  496. unsigned long paddr;
  497. #if 0
  498. DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
  499. sock, map, mem->flags, mem->card_start);
  500. #endif
  501. if (map >= MAX_WIN)
  502. return -EINVAL;
  503. smem = &sp->mem_maps[map];
  504. paddr = sp->mem_base; /* base of Attribute mapping */
  505. if (!(mem->flags & MAP_ATTRIB))
  506. paddr += HD64465_PCC_WINDOW; /* base of Common mapping */
  507. paddr += mem->card_start;
  508. /* Because we specified SS_CAP_STATIC_MAP, we are obliged
  509. * at this time to report the system address corresponding
  510. * to the card address requested. This is how Socket Services
  511. * queries our fixed mapping. I wish this fact had been
  512. * documented - Greg Banks.
  513. */
  514. mem->static_start = paddr;
  515. *smem = *mem;
  516. return 0;
  517. }
  518. /* TODO: do we need to use the MMU to access Common memory ??? */
  519. /*============================================================*/
  520. /*
  521. * This function is registered with the HD64465 glue code to do a
  522. * secondary demux step on the PCMCIA interrupts. It handles
  523. * mapping the IREQ request from the card to a standard Linux
  524. * IRQ, as requested by SocketServices.
  525. */
  526. static int hs_irq_demux(int irq, void *dev)
  527. {
  528. hs_socket_t *sp = dev;
  529. u_int cscr;
  530. DPRINTK("hs_irq_demux(irq=%d)\n", irq);
  531. if (sp->state.io_irq &&
  532. (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
  533. cscr &= ~HD64465_PCCCSCR_PIREQ;
  534. hs_out(sp, cscr, CSCR);
  535. return sp->state.io_irq;
  536. }
  537. return irq;
  538. }
  539. /*============================================================*/
  540. /*
  541. * Interrupt handling routine.
  542. */
  543. static irqreturn_t hs_interrupt(int irq, void *dev)
  544. {
  545. hs_socket_t *sp = dev;
  546. u_int events = 0;
  547. u_int cscr;
  548. cscr = hs_in(sp, CSCR);
  549. DPRINTK("hs_interrupt, cscr=%04x\n", cscr);
  550. /* check for bus-related changes to be reported to Socket Services */
  551. if (cscr & HD64465_PCCCSCR_PCDC) {
  552. /* double-check for a 16-bit card, as we don't support CardBus */
  553. if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
  554. printk(KERN_NOTICE MODNAME
  555. ": socket %d, card not a supported card type or not inserted correctly\n",
  556. sp->number);
  557. /* Don't do the rest unless a card is present */
  558. cscr &= ~(HD64465_PCCCSCR_PCDC|
  559. HD64465_PCCCSCR_PRC|
  560. HD64465_PCCCSCR_PBW|
  561. HD64465_PCCCSCR_PBD|
  562. HD64465_PCCCSCR_PSC);
  563. } else {
  564. cscr &= ~HD64465_PCCCSCR_PCDC;
  565. events |= SS_DETECT; /* card insertion or removal */
  566. }
  567. }
  568. if (cscr & HD64465_PCCCSCR_PRC) {
  569. cscr &= ~HD64465_PCCCSCR_PRC;
  570. events |= SS_READY; /* ready signal changed */
  571. }
  572. if (cscr & HD64465_PCCCSCR_PBW) {
  573. cscr &= ~HD64465_PCCCSCR_PSC;
  574. events |= SS_BATWARN; /* battery warning */
  575. }
  576. if (cscr & HD64465_PCCCSCR_PBD) {
  577. cscr &= ~HD64465_PCCCSCR_PSC;
  578. events |= SS_BATDEAD; /* battery dead */
  579. }
  580. if (cscr & HD64465_PCCCSCR_PSC) {
  581. cscr &= ~HD64465_PCCCSCR_PSC;
  582. events |= SS_STSCHG; /* STSCHG (status changed) signal */
  583. }
  584. if (cscr & HD64465_PCCCSCR_PIREQ) {
  585. cscr &= ~HD64465_PCCCSCR_PIREQ;
  586. /* This should have been dealt with during irq demux */
  587. printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
  588. }
  589. hs_out(sp, cscr, CSCR);
  590. if (events)
  591. pcmcia_parse_events(&sp->socket, events);
  592. return IRQ_HANDLED;
  593. }
  594. /*============================================================*/
  595. static struct pccard_operations hs_operations = {
  596. .init = hs_init,
  597. .get_status = hs_get_status,
  598. .set_socket = hs_set_socket,
  599. .set_io_map = hs_set_io_map,
  600. .set_mem_map = hs_set_mem_map,
  601. };
  602. static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
  603. unsigned int ctrl_base)
  604. {
  605. unsigned short v;
  606. int i, err;
  607. memset(sp, 0, sizeof(*sp));
  608. sp->irq = irq;
  609. sp->mem_base = mem_base;
  610. sp->mem_length = 4*HD64465_PCC_WINDOW; /* 16MB */
  611. sp->ctrl_base = ctrl_base;
  612. for (i=0 ; i<MAX_IO_WIN ; i++)
  613. sp->io_maps[i].map = i;
  614. for (i=0 ; i<MAX_WIN ; i++)
  615. sp->mem_maps[i].map = i;
  616. hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
  617. if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
  618. return err;
  619. if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
  620. sp->mem_base = 0;
  621. return -ENOMEM;
  622. }
  623. /* According to section 3.2 of the PCMCIA standard, low-voltage
  624. * capable cards must implement cold insertion, i.e. Vpp and
  625. * Vcc set to 0 before card is inserted.
  626. */
  627. /*hs_set_voltages(sp, 0, 0);*/
  628. /* hi-Z the outputs to the card and set 16MB map mode */
  629. v = hs_in(sp, GCR);
  630. v &= ~HD64465_PCCGCR_PCCT; /* memory-only card */
  631. hs_out(sp, v, GCR);
  632. v = hs_in(sp, GCR);
  633. v |= HD64465_PCCGCR_PDRV; /* enable outputs to card */
  634. hs_out(sp, v, GCR);
  635. v = hs_in(sp, GCR);
  636. v |= HD64465_PCCGCR_PMMOD; /* 16MB mapping mode */
  637. hs_out(sp, v, GCR);
  638. v = hs_in(sp, GCR);
  639. /* lowest 16MB of Common */
  640. v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24);
  641. hs_out(sp, v, GCR);
  642. hs_reset_socket(sp, 1);
  643. printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
  644. i, sp->mem_base, sp->irq);
  645. return 0;
  646. }
  647. static void hs_exit_socket(hs_socket_t *sp)
  648. {
  649. unsigned short cscier, gcr;
  650. unsigned long flags;
  651. local_irq_save(flags);
  652. /* turn off interrupts in hardware */
  653. cscier = hs_in(sp, CSCIER);
  654. cscier = (cscier & IER_MASK) | IER_OFF;
  655. hs_out(sp, cscier, CSCIER);
  656. /* hi-Z the outputs to the card */
  657. gcr = hs_in(sp, GCR);
  658. gcr &= HD64465_PCCGCR_PDRV;
  659. hs_out(sp, gcr, GCR);
  660. /* power the card down */
  661. hs_set_voltages(sp, 0, 0);
  662. if (sp->mem_base != 0)
  663. release_mem_region(sp->mem_base, sp->mem_length);
  664. if (sp->irq != 0) {
  665. free_irq(sp->irq, hs_interrupt);
  666. hd64465_unregister_irq_demux(sp->irq);
  667. }
  668. local_irq_restore(flags);
  669. }
  670. static struct device_driver hd64465_driver = {
  671. .name = "hd64465-pcmcia",
  672. .bus = &platform_bus_type,
  673. .suspend = pcmcia_socket_dev_suspend,
  674. .resume = pcmcia_socket_dev_resume,
  675. };
  676. static struct platform_device hd64465_device = {
  677. .name = "hd64465-pcmcia",
  678. .id = 0,
  679. };
  680. static int __init init_hs(void)
  681. {
  682. int i;
  683. unsigned short v;
  684. /* hd64465_io_debug = 1; */
  685. if (driver_register(&hd64465_driver))
  686. return -EINVAL;
  687. /* Wake both sockets out of STANDBY mode */
  688. /* TODO: wait 15ms */
  689. v = inw(HD64465_REG_SMSCR);
  690. v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
  691. outw(v, HD64465_REG_SMSCR);
  692. /* keep power controller out of shutdown mode */
  693. v = inb(HD64465_REG_PCC0SCR);
  694. v |= HD64465_PCCSCR_SHDN;
  695. outb(v, HD64465_REG_PCC0SCR);
  696. /* use serial (TPS2206) power controller */
  697. v = inb(HD64465_REG_PCC0CSCR);
  698. v |= HD64465_PCCCSCR_PSWSEL;
  699. outb(v, HD64465_REG_PCC0CSCR);
  700. /*
  701. * Setup hs_sockets[] structures and request system resources.
  702. * TODO: on memory allocation failure, power down the socket
  703. * before quitting.
  704. */
  705. for (i=0; i<HS_MAX_SOCKETS; i++) {
  706. hs_set_voltages(&hs_sockets[i], 0, 0);
  707. hs_sockets[i].socket.features |= SS_CAP_PCCARD | SS_CAP_STATIC_MAP; /* mappings are fixed in host memory */
  708. hs_sockets[i].socket.resource_ops = &pccard_static_ops;
  709. hs_sockets[i].socket.irq_mask = 0xffde;/*0xffff*/ /* IRQs mapped in s/w so can do any, really */
  710. hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW; /* 16MB fixed window size */
  711. hs_sockets[i].socket.owner = THIS_MODULE;
  712. hs_sockets[i].socket.ss_entry = &hs_operations;
  713. }
  714. i = hs_init_socket(&hs_sockets[0],
  715. HD64465_IRQ_PCMCIA0,
  716. HD64465_PCC0_BASE,
  717. HD64465_REG_PCC0ISR);
  718. if (i < 0) {
  719. unregister_driver(&hd64465_driver);
  720. return i;
  721. }
  722. i = hs_init_socket(&hs_sockets[1],
  723. HD64465_IRQ_PCMCIA1,
  724. HD64465_PCC1_BASE,
  725. HD64465_REG_PCC1ISR);
  726. if (i < 0) {
  727. unregister_driver(&hd64465_driver);
  728. return i;
  729. }
  730. /* hd64465_io_debug = 0; */
  731. platform_device_register(&hd64465_device);
  732. for (i=0; i<HS_MAX_SOCKETS; i++) {
  733. unsigned int ret;
  734. hs_sockets[i].socket.dev.parent = &hd64465_device.dev;
  735. hs_sockets[i].number = i;
  736. ret = pcmcia_register_socket(&hs_sockets[i].socket);
  737. if (ret && i)
  738. pcmcia_unregister_socket(&hs_sockets[0].socket);
  739. }
  740. return 0;
  741. }
  742. static void __exit exit_hs(void)
  743. {
  744. int i;
  745. for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
  746. pcmcia_unregister_socket(&hs_sockets[i].socket);
  747. hs_exit_socket(&hs_sockets[i]);
  748. }
  749. platform_device_unregister(&hd64465_device);
  750. unregister_driver(&hd64465_driver);
  751. }
  752. module_init(init_hs);
  753. module_exit(exit_hs);
  754. /*============================================================*/
  755. /*END*/