au1000_pb1x00.c 9.0 KB

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  1. /*
  2. *
  3. * Alchemy Semi Pb1x00 boards specific pcmcia routines.
  4. *
  5. * Copyright 2002 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * ########################################################################
  10. *
  11. * This program is free software; you can distribute it and/or modify it
  12. * under the terms of the GNU General Public License (Version 2) as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope it will be useful, but WITHOUT
  16. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  18. * for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License along
  21. * with this program; if not, write to the Free Software Foundation, Inc.,
  22. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/ioport.h>
  28. #include <linux/kernel.h>
  29. #include <linux/tqueue.h>
  30. #include <linux/timer.h>
  31. #include <linux/mm.h>
  32. #include <linux/proc_fs.h>
  33. #include <linux/types.h>
  34. #include <pcmcia/cs_types.h>
  35. #include <pcmcia/cs.h>
  36. #include <pcmcia/ss.h>
  37. #include <pcmcia/cistpl.h>
  38. #include <pcmcia/bus_ops.h>
  39. #include "cs_internal.h"
  40. #include <asm/io.h>
  41. #include <asm/irq.h>
  42. #include <asm/system.h>
  43. #include <asm/au1000.h>
  44. #include <asm/au1000_pcmcia.h>
  45. #define debug(fmt, arg...) do { } while (0)
  46. #ifdef CONFIG_MIPS_PB1000
  47. #include <asm/pb1000.h>
  48. #define PCMCIA_IRQ AU1000_GPIO_15
  49. #elif defined (CONFIG_MIPS_PB1500)
  50. #include <asm/pb1500.h>
  51. #define PCMCIA_IRQ AU1500_GPIO_203
  52. #elif defined (CONFIG_MIPS_PB1100)
  53. #include <asm/pb1100.h>
  54. #define PCMCIA_IRQ AU1000_GPIO_11
  55. #endif
  56. static int pb1x00_pcmcia_init(struct pcmcia_init *init)
  57. {
  58. #ifdef CONFIG_MIPS_PB1000
  59. u16 pcr;
  60. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  61. au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
  62. au_sync_delay(100);
  63. au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
  64. au_sync();
  65. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  66. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  67. au_writel(pcr, PB1000_PCR);
  68. au_sync_delay(20);
  69. return PCMCIA_NUM_SOCKS;
  70. #else /* fixme -- take care of the Pb1500 at some point */
  71. u16 pcr;
  72. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  73. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  74. au_writew(pcr, PCMCIA_BOARD_REG);
  75. au_sync_delay(500);
  76. return PCMCIA_NUM_SOCKS;
  77. #endif
  78. }
  79. static int pb1x00_pcmcia_shutdown(void)
  80. {
  81. #ifdef CONFIG_MIPS_PB1000
  82. u16 pcr;
  83. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  84. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  85. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  86. au_writel(pcr, PB1000_PCR);
  87. au_sync_delay(20);
  88. return 0;
  89. #else
  90. u16 pcr;
  91. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  92. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  93. au_writew(pcr, PCMCIA_BOARD_REG);
  94. au_sync_delay(2);
  95. return 0;
  96. #endif
  97. }
  98. static int
  99. pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
  100. {
  101. u32 inserted0, inserted1;
  102. u16 vs0, vs1;
  103. #ifdef CONFIG_MIPS_PB1000
  104. vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
  105. inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
  106. inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
  107. vs0 = (vs0 >> 4) & 0x3;
  108. vs1 = (vs1 >> 12) & 0x3;
  109. #else
  110. vs0 = (au_readw(BOARD_STATUS_REG) >> 4) & 0x3;
  111. #ifdef CONFIG_MIPS_PB1500
  112. inserted0 = !((au_readl(GPIO2_PINSTATE) >> 1) & 0x1); /* gpio 201 */
  113. #else /* Pb1100 */
  114. inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
  115. #endif
  116. inserted1 = 0;
  117. #endif
  118. state->ready = 0;
  119. state->vs_Xv = 0;
  120. state->vs_3v = 0;
  121. state->detect = 0;
  122. if (sock == 0) {
  123. if (inserted0) {
  124. switch (vs0) {
  125. case 0:
  126. case 2:
  127. state->vs_3v=1;
  128. break;
  129. case 3: /* 5V */
  130. break;
  131. default:
  132. /* return without setting 'detect' */
  133. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  134. vs0);
  135. return 0;
  136. }
  137. state->detect = 1;
  138. }
  139. }
  140. else {
  141. if (inserted1) {
  142. switch (vs1) {
  143. case 0:
  144. case 2:
  145. state->vs_3v=1;
  146. break;
  147. case 3: /* 5V */
  148. break;
  149. default:
  150. /* return without setting 'detect' */
  151. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  152. vs1);
  153. return 0;
  154. }
  155. state->detect = 1;
  156. }
  157. }
  158. if (state->detect) {
  159. state->ready = 1;
  160. }
  161. state->bvd1=1;
  162. state->bvd2=1;
  163. state->wrprot=0;
  164. return 1;
  165. }
  166. static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
  167. {
  168. if(info->sock > PCMCIA_MAX_SOCK) return -1;
  169. /*
  170. * Even in the case of the Pb1000, both sockets are connected
  171. * to the same irq line.
  172. */
  173. info->irq = PCMCIA_IRQ;
  174. return 0;
  175. }
  176. static int
  177. pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
  178. {
  179. u16 pcr;
  180. if(configure->sock > PCMCIA_MAX_SOCK) return -1;
  181. #ifdef CONFIG_MIPS_PB1000
  182. pcr = au_readl(PB1000_PCR);
  183. if (configure->sock == 0) {
  184. pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
  185. PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
  186. }
  187. else {
  188. pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
  189. PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
  190. }
  191. pcr &= ~PCR_SLOT_0_RST;
  192. debug("Vcc %dV Vpp %dV, pcr %x\n",
  193. configure->vcc, configure->vpp, pcr);
  194. switch(configure->vcc){
  195. case 0: /* Vcc 0 */
  196. switch(configure->vpp) {
  197. case 0:
  198. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
  199. configure->sock);
  200. break;
  201. case 12:
  202. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
  203. configure->sock);
  204. break;
  205. case 50:
  206. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
  207. configure->sock);
  208. break;
  209. case 33:
  210. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
  211. configure->sock);
  212. break;
  213. default:
  214. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  215. configure->sock);
  216. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  217. __func__,
  218. configure->vcc,
  219. configure->vpp);
  220. break;
  221. }
  222. break;
  223. case 50: /* Vcc 5V */
  224. switch(configure->vpp) {
  225. case 0:
  226. pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
  227. configure->sock);
  228. break;
  229. case 50:
  230. pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
  231. configure->sock);
  232. break;
  233. case 12:
  234. pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
  235. configure->sock);
  236. break;
  237. case 33:
  238. pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
  239. configure->sock);
  240. break;
  241. default:
  242. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  243. configure->sock);
  244. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  245. __func__,
  246. configure->vcc,
  247. configure->vpp);
  248. break;
  249. }
  250. break;
  251. case 33: /* Vcc 3.3V */
  252. switch(configure->vpp) {
  253. case 0:
  254. pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
  255. configure->sock);
  256. break;
  257. case 50:
  258. pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
  259. configure->sock);
  260. break;
  261. case 12:
  262. pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
  263. configure->sock);
  264. break;
  265. case 33:
  266. pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
  267. configure->sock);
  268. break;
  269. default:
  270. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  271. configure->sock);
  272. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  273. __func__,
  274. configure->vcc,
  275. configure->vpp);
  276. break;
  277. }
  278. break;
  279. default: /* what's this ? */
  280. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
  281. printk(KERN_ERR "%s: bad Vcc %d\n",
  282. __func__, configure->vcc);
  283. break;
  284. }
  285. if (configure->sock == 0) {
  286. pcr &= ~(PCR_SLOT_0_RST);
  287. if (configure->reset)
  288. pcr |= PCR_SLOT_0_RST;
  289. }
  290. else {
  291. pcr &= ~(PCR_SLOT_1_RST);
  292. if (configure->reset)
  293. pcr |= PCR_SLOT_1_RST;
  294. }
  295. au_writel(pcr, PB1000_PCR);
  296. au_sync_delay(300);
  297. #else
  298. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf;
  299. debug("Vcc %dV Vpp %dV, pcr %x, reset %d\n",
  300. configure->vcc, configure->vpp, pcr, configure->reset);
  301. switch(configure->vcc){
  302. case 0: /* Vcc 0 */
  303. pcr |= SET_VCC_VPP(0,0);
  304. break;
  305. case 50: /* Vcc 5V */
  306. switch(configure->vpp) {
  307. case 0:
  308. pcr |= SET_VCC_VPP(2,0);
  309. break;
  310. case 50:
  311. pcr |= SET_VCC_VPP(2,1);
  312. break;
  313. case 12:
  314. pcr |= SET_VCC_VPP(2,2);
  315. break;
  316. case 33:
  317. default:
  318. pcr |= SET_VCC_VPP(0,0);
  319. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  320. __func__,
  321. configure->vcc,
  322. configure->vpp);
  323. break;
  324. }
  325. break;
  326. case 33: /* Vcc 3.3V */
  327. switch(configure->vpp) {
  328. case 0:
  329. pcr |= SET_VCC_VPP(1,0);
  330. break;
  331. case 12:
  332. pcr |= SET_VCC_VPP(1,2);
  333. break;
  334. case 33:
  335. pcr |= SET_VCC_VPP(1,1);
  336. break;
  337. case 50:
  338. default:
  339. pcr |= SET_VCC_VPP(0,0);
  340. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  341. __func__,
  342. configure->vcc,
  343. configure->vpp);
  344. break;
  345. }
  346. break;
  347. default: /* what's this ? */
  348. pcr |= SET_VCC_VPP(0,0);
  349. printk(KERN_ERR "%s: bad Vcc %d\n",
  350. __func__, configure->vcc);
  351. break;
  352. }
  353. au_writew(pcr, PCMCIA_BOARD_REG);
  354. au_sync_delay(300);
  355. if (!configure->reset) {
  356. pcr |= PC_DRV_EN;
  357. au_writew(pcr, PCMCIA_BOARD_REG);
  358. au_sync_delay(100);
  359. pcr |= PC_DEASSERT_RST;
  360. au_writew(pcr, PCMCIA_BOARD_REG);
  361. au_sync_delay(100);
  362. }
  363. else {
  364. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  365. au_writew(pcr, PCMCIA_BOARD_REG);
  366. au_sync_delay(100);
  367. }
  368. #endif
  369. return 0;
  370. }
  371. struct pcmcia_low_level pb1x00_pcmcia_ops = {
  372. pb1x00_pcmcia_init,
  373. pb1x00_pcmcia_shutdown,
  374. pb1x00_pcmcia_socket_state,
  375. pb1x00_pcmcia_get_irq_info,
  376. pb1x00_pcmcia_configure_socket
  377. };