aerdrv_errprint.c 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248
  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_errprint.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Format error messages and print them to console.
  9. *
  10. * Copyright (C) 2006 Intel Corp.
  11. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  12. * Zhang Yanmin (yanmin.zhang@intel.com)
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/pci.h>
  17. #include <linux/kernel.h>
  18. #include <linux/errno.h>
  19. #include <linux/pm.h>
  20. #include <linux/suspend.h>
  21. #include "aerdrv.h"
  22. #define AER_AGENT_RECEIVER 0
  23. #define AER_AGENT_REQUESTER 1
  24. #define AER_AGENT_COMPLETER 2
  25. #define AER_AGENT_TRANSMITTER 3
  26. #define AER_AGENT_REQUESTER_MASK (PCI_ERR_UNC_COMP_TIME| \
  27. PCI_ERR_UNC_UNSUP)
  28. #define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT
  29. #define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \
  30. ((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER: 0)))
  31. #define AER_GET_AGENT(t, e) \
  32. ((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \
  33. (e & AER_AGENT_REQUESTER_MASK) ? AER_AGENT_REQUESTER : \
  34. (AER_AGENT_TRANSMITTER_MASK(t, e)) ? AER_AGENT_TRANSMITTER : \
  35. AER_AGENT_RECEIVER)
  36. #define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR
  37. #define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \
  38. (PCI_ERR_UNC_DLP| \
  39. PCI_ERR_COR_BAD_TLP| \
  40. PCI_ERR_COR_BAD_DLLP| \
  41. PCI_ERR_COR_REP_ROLL| \
  42. ((t == AER_CORRECTABLE) ? \
  43. PCI_ERR_COR_REP_TIMER: 0))
  44. #define AER_PHYSICAL_LAYER_ERROR 0
  45. #define AER_DATA_LINK_LAYER_ERROR 1
  46. #define AER_TRANSACTION_LAYER_ERROR 2
  47. #define AER_GET_LAYER_ERROR(t, e) \
  48. ((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \
  49. AER_PHYSICAL_LAYER_ERROR : \
  50. (e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \
  51. AER_DATA_LINK_LAYER_ERROR : \
  52. AER_TRANSACTION_LAYER_ERROR)
  53. /*
  54. * AER error strings
  55. */
  56. static char* aer_error_severity_string[] = {
  57. "Uncorrected (Non-Fatal)",
  58. "Uncorrected (Fatal)",
  59. "Corrected"
  60. };
  61. static char* aer_error_layer[] = {
  62. "Physical Layer",
  63. "Data Link Layer",
  64. "Transaction Layer"
  65. };
  66. static char* aer_correctable_error_string[] = {
  67. "Receiver Error ", /* Bit Position 0 */
  68. NULL,
  69. NULL,
  70. NULL,
  71. NULL,
  72. NULL,
  73. "Bad TLP ", /* Bit Position 6 */
  74. "Bad DLLP ", /* Bit Position 7 */
  75. "RELAY_NUM Rollover ", /* Bit Position 8 */
  76. NULL,
  77. NULL,
  78. NULL,
  79. "Replay Timer Timeout ", /* Bit Position 12 */
  80. "Advisory Non-Fatal ", /* Bit Position 13 */
  81. NULL,
  82. NULL,
  83. NULL,
  84. NULL,
  85. NULL,
  86. NULL,
  87. NULL,
  88. NULL,
  89. NULL,
  90. NULL,
  91. NULL,
  92. NULL,
  93. NULL,
  94. NULL,
  95. NULL,
  96. NULL,
  97. NULL,
  98. NULL,
  99. };
  100. static char* aer_uncorrectable_error_string[] = {
  101. NULL,
  102. NULL,
  103. NULL,
  104. NULL,
  105. "Data Link Protocol ", /* Bit Position 4 */
  106. NULL,
  107. NULL,
  108. NULL,
  109. NULL,
  110. NULL,
  111. NULL,
  112. NULL,
  113. "Poisoned TLP ", /* Bit Position 12 */
  114. "Flow Control Protocol ", /* Bit Position 13 */
  115. "Completion Timeout ", /* Bit Position 14 */
  116. "Completer Abort ", /* Bit Position 15 */
  117. "Unexpected Completion ", /* Bit Position 16 */
  118. "Receiver Overflow ", /* Bit Position 17 */
  119. "Malformed TLP ", /* Bit Position 18 */
  120. "ECRC ", /* Bit Position 19 */
  121. "Unsupported Request ", /* Bit Position 20 */
  122. NULL,
  123. NULL,
  124. NULL,
  125. NULL,
  126. NULL,
  127. NULL,
  128. NULL,
  129. NULL,
  130. NULL,
  131. NULL,
  132. NULL,
  133. };
  134. static char* aer_agent_string[] = {
  135. "Receiver ID",
  136. "Requester ID",
  137. "Completer ID",
  138. "Transmitter ID"
  139. };
  140. static char * aer_get_error_source_name(int severity,
  141. unsigned int status,
  142. char errmsg_buff[])
  143. {
  144. int i;
  145. char * errmsg = NULL;
  146. for (i = 0; i < 32; i++) {
  147. if (!(status & (1 << i)))
  148. continue;
  149. if (severity == AER_CORRECTABLE)
  150. errmsg = aer_correctable_error_string[i];
  151. else
  152. errmsg = aer_uncorrectable_error_string[i];
  153. if (!errmsg) {
  154. sprintf(errmsg_buff, "Unknown Error Bit %2d ", i);
  155. errmsg = errmsg_buff;
  156. }
  157. break;
  158. }
  159. return errmsg;
  160. }
  161. static DEFINE_SPINLOCK(logbuf_lock);
  162. static char errmsg_buff[100];
  163. void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
  164. {
  165. char * errmsg;
  166. int err_layer, agent;
  167. char * loglevel;
  168. if (info->severity == AER_CORRECTABLE)
  169. loglevel = KERN_WARNING;
  170. else
  171. loglevel = KERN_ERR;
  172. printk("%s+------ PCI-Express Device Error ------+\n", loglevel);
  173. printk("%sError Severity\t\t: %s\n", loglevel,
  174. aer_error_severity_string[info->severity]);
  175. if ( info->status == 0) {
  176. printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel);
  177. printk("%sUnaccessible Received\t: %s\n", loglevel,
  178. info->flags & AER_MULTI_ERROR_VALID_FLAG ?
  179. "Multiple" : "First");
  180. printk("%sUnregistered Agent ID\t: %04x\n", loglevel,
  181. (dev->bus->number << 8) | dev->devfn);
  182. } else {
  183. err_layer = AER_GET_LAYER_ERROR(info->severity, info->status);
  184. printk("%sPCIE Bus Error type\t: %s\n", loglevel,
  185. aer_error_layer[err_layer]);
  186. spin_lock(&logbuf_lock);
  187. errmsg = aer_get_error_source_name(info->severity,
  188. info->status,
  189. errmsg_buff);
  190. printk("%s%s\t: %s\n", loglevel, errmsg,
  191. info->flags & AER_MULTI_ERROR_VALID_FLAG ?
  192. "Multiple" : "First");
  193. spin_unlock(&logbuf_lock);
  194. agent = AER_GET_AGENT(info->severity, info->status);
  195. printk("%s%s\t\t: %04x\n", loglevel,
  196. aer_agent_string[agent],
  197. (dev->bus->number << 8) | dev->devfn);
  198. printk("%sVendorID=%04xh, DeviceID=%04xh,"
  199. " Bus=%02xh, Device=%02xh, Function=%02xh\n",
  200. loglevel,
  201. dev->vendor,
  202. dev->device,
  203. dev->bus->number,
  204. PCI_SLOT(dev->devfn),
  205. PCI_FUNC(dev->devfn));
  206. if (info->flags & AER_TLP_HEADER_VALID_FLAG) {
  207. unsigned char *tlp = (unsigned char *) &info->tlp;
  208. printk("%sTLB Header:\n", loglevel);
  209. printk("%s%02x%02x%02x%02x %02x%02x%02x%02x"
  210. " %02x%02x%02x%02x %02x%02x%02x%02x\n",
  211. loglevel,
  212. *(tlp + 3), *(tlp + 2), *(tlp + 1), *tlp,
  213. *(tlp + 7), *(tlp + 6), *(tlp + 5), *(tlp + 4),
  214. *(tlp + 11), *(tlp + 10), *(tlp + 9),
  215. *(tlp + 8), *(tlp + 15), *(tlp + 14),
  216. *(tlp + 13), *(tlp + 12));
  217. }
  218. }
  219. }