p54common.c 39 KB

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  1. /*
  2. * Common code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
  6. *
  7. * Based on the islsm (softmac prism54) driver, which is:
  8. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/firmware.h>
  16. #include <linux/etherdevice.h>
  17. #include <net/mac80211.h>
  18. #include "p54.h"
  19. #include "p54common.h"
  20. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  21. MODULE_DESCRIPTION("Softmac Prism54 common code");
  22. MODULE_LICENSE("GPL");
  23. MODULE_ALIAS("prism54common");
  24. static struct ieee80211_rate p54_bgrates[] = {
  25. { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  26. { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  27. { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  28. { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
  29. { .bitrate = 60, .hw_value = 4, },
  30. { .bitrate = 90, .hw_value = 5, },
  31. { .bitrate = 120, .hw_value = 6, },
  32. { .bitrate = 180, .hw_value = 7, },
  33. { .bitrate = 240, .hw_value = 8, },
  34. { .bitrate = 360, .hw_value = 9, },
  35. { .bitrate = 480, .hw_value = 10, },
  36. { .bitrate = 540, .hw_value = 11, },
  37. };
  38. static struct ieee80211_channel p54_bgchannels[] = {
  39. { .center_freq = 2412, .hw_value = 1, },
  40. { .center_freq = 2417, .hw_value = 2, },
  41. { .center_freq = 2422, .hw_value = 3, },
  42. { .center_freq = 2427, .hw_value = 4, },
  43. { .center_freq = 2432, .hw_value = 5, },
  44. { .center_freq = 2437, .hw_value = 6, },
  45. { .center_freq = 2442, .hw_value = 7, },
  46. { .center_freq = 2447, .hw_value = 8, },
  47. { .center_freq = 2452, .hw_value = 9, },
  48. { .center_freq = 2457, .hw_value = 10, },
  49. { .center_freq = 2462, .hw_value = 11, },
  50. { .center_freq = 2467, .hw_value = 12, },
  51. { .center_freq = 2472, .hw_value = 13, },
  52. { .center_freq = 2484, .hw_value = 14, },
  53. };
  54. static struct ieee80211_supported_band band_2GHz = {
  55. .channels = p54_bgchannels,
  56. .n_channels = ARRAY_SIZE(p54_bgchannels),
  57. .bitrates = p54_bgrates,
  58. .n_bitrates = ARRAY_SIZE(p54_bgrates),
  59. };
  60. static struct ieee80211_rate p54_arates[] = {
  61. { .bitrate = 60, .hw_value = 4, },
  62. { .bitrate = 90, .hw_value = 5, },
  63. { .bitrate = 120, .hw_value = 6, },
  64. { .bitrate = 180, .hw_value = 7, },
  65. { .bitrate = 240, .hw_value = 8, },
  66. { .bitrate = 360, .hw_value = 9, },
  67. { .bitrate = 480, .hw_value = 10, },
  68. { .bitrate = 540, .hw_value = 11, },
  69. };
  70. static struct ieee80211_channel p54_achannels[] = {
  71. { .center_freq = 4920 },
  72. { .center_freq = 4940 },
  73. { .center_freq = 4960 },
  74. { .center_freq = 4980 },
  75. { .center_freq = 5040 },
  76. { .center_freq = 5060 },
  77. { .center_freq = 5080 },
  78. { .center_freq = 5170 },
  79. { .center_freq = 5180 },
  80. { .center_freq = 5190 },
  81. { .center_freq = 5200 },
  82. { .center_freq = 5210 },
  83. { .center_freq = 5220 },
  84. { .center_freq = 5230 },
  85. { .center_freq = 5240 },
  86. { .center_freq = 5260 },
  87. { .center_freq = 5280 },
  88. { .center_freq = 5300 },
  89. { .center_freq = 5320 },
  90. { .center_freq = 5500 },
  91. { .center_freq = 5520 },
  92. { .center_freq = 5540 },
  93. { .center_freq = 5560 },
  94. { .center_freq = 5580 },
  95. { .center_freq = 5600 },
  96. { .center_freq = 5620 },
  97. { .center_freq = 5640 },
  98. { .center_freq = 5660 },
  99. { .center_freq = 5680 },
  100. { .center_freq = 5700 },
  101. { .center_freq = 5745 },
  102. { .center_freq = 5765 },
  103. { .center_freq = 5785 },
  104. { .center_freq = 5805 },
  105. { .center_freq = 5825 },
  106. };
  107. static struct ieee80211_supported_band band_5GHz = {
  108. .channels = p54_achannels,
  109. .n_channels = ARRAY_SIZE(p54_achannels),
  110. .bitrates = p54_arates,
  111. .n_bitrates = ARRAY_SIZE(p54_arates),
  112. };
  113. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  114. {
  115. struct p54_common *priv = dev->priv;
  116. struct bootrec_exp_if *exp_if;
  117. struct bootrec *bootrec;
  118. u32 *data = (u32 *)fw->data;
  119. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  120. u8 *fw_version = NULL;
  121. size_t len;
  122. int i;
  123. if (priv->rx_start)
  124. return 0;
  125. while (data < end_data && *data)
  126. data++;
  127. while (data < end_data && !*data)
  128. data++;
  129. bootrec = (struct bootrec *) data;
  130. while (bootrec->data <= end_data &&
  131. (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
  132. u32 code = le32_to_cpu(bootrec->code);
  133. switch (code) {
  134. case BR_CODE_COMPONENT_ID:
  135. priv->fw_interface = be32_to_cpup((__be32 *)
  136. bootrec->data);
  137. switch (priv->fw_interface) {
  138. case FW_FMAC:
  139. printk(KERN_INFO "p54: FreeMAC firmware\n");
  140. break;
  141. case FW_LM20:
  142. printk(KERN_INFO "p54: LM20 firmware\n");
  143. break;
  144. case FW_LM86:
  145. printk(KERN_INFO "p54: LM86 firmware\n");
  146. break;
  147. case FW_LM87:
  148. printk(KERN_INFO "p54: LM87 firmware\n");
  149. break;
  150. default:
  151. printk(KERN_INFO "p54: unknown firmware\n");
  152. break;
  153. }
  154. break;
  155. case BR_CODE_COMPONENT_VERSION:
  156. /* 24 bytes should be enough for all firmwares */
  157. if (strnlen((unsigned char*)bootrec->data, 24) < 24)
  158. fw_version = (unsigned char*)bootrec->data;
  159. break;
  160. case BR_CODE_DESCR: {
  161. struct bootrec_desc *desc =
  162. (struct bootrec_desc *)bootrec->data;
  163. priv->rx_start = le32_to_cpu(desc->rx_start);
  164. /* FIXME add sanity checking */
  165. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  166. priv->headroom = desc->headroom;
  167. priv->tailroom = desc->tailroom;
  168. if (le32_to_cpu(bootrec->len) == 11)
  169. priv->rx_mtu = le16_to_cpu(bootrec->rx_mtu);
  170. else
  171. priv->rx_mtu = (size_t)
  172. 0x620 - priv->tx_hdr_len;
  173. break;
  174. }
  175. case BR_CODE_EXPOSED_IF:
  176. exp_if = (struct bootrec_exp_if *) bootrec->data;
  177. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  178. if (exp_if[i].if_id == cpu_to_le16(0x1a))
  179. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  180. break;
  181. case BR_CODE_DEPENDENT_IF:
  182. break;
  183. case BR_CODE_END_OF_BRA:
  184. case LEGACY_BR_CODE_END_OF_BRA:
  185. end_data = NULL;
  186. break;
  187. default:
  188. break;
  189. }
  190. bootrec = (struct bootrec *)&bootrec->data[len];
  191. }
  192. if (fw_version)
  193. printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
  194. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  195. if (priv->fw_var >= 0x300) {
  196. /* Firmware supports QoS, use it! */
  197. priv->tx_stats[4].limit = 3;
  198. priv->tx_stats[5].limit = 4;
  199. priv->tx_stats[6].limit = 3;
  200. priv->tx_stats[7].limit = 1;
  201. dev->queues = 4;
  202. }
  203. return 0;
  204. }
  205. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  206. static int p54_convert_rev0(struct ieee80211_hw *dev,
  207. struct pda_pa_curve_data *curve_data)
  208. {
  209. struct p54_common *priv = dev->priv;
  210. struct p54_pa_curve_data_sample *dst;
  211. struct pda_pa_curve_data_sample_rev0 *src;
  212. size_t cd_len = sizeof(*curve_data) +
  213. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  214. curve_data->channels;
  215. unsigned int i, j;
  216. void *source, *target;
  217. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  218. if (!priv->curve_data)
  219. return -ENOMEM;
  220. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  221. source = curve_data->data;
  222. target = priv->curve_data->data;
  223. for (i = 0; i < curve_data->channels; i++) {
  224. __le16 *freq = source;
  225. source += sizeof(__le16);
  226. *((__le16 *)target) = *freq;
  227. target += sizeof(__le16);
  228. for (j = 0; j < curve_data->points_per_channel; j++) {
  229. dst = target;
  230. src = source;
  231. dst->rf_power = src->rf_power;
  232. dst->pa_detector = src->pa_detector;
  233. dst->data_64qam = src->pcv;
  234. /* "invent" the points for the other modulations */
  235. #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
  236. dst->data_16qam = SUB(src->pcv, 12);
  237. dst->data_qpsk = SUB(dst->data_16qam, 12);
  238. dst->data_bpsk = SUB(dst->data_qpsk, 12);
  239. dst->data_barker = SUB(dst->data_bpsk, 14);
  240. #undef SUB
  241. target += sizeof(*dst);
  242. source += sizeof(*src);
  243. }
  244. }
  245. return 0;
  246. }
  247. static int p54_convert_rev1(struct ieee80211_hw *dev,
  248. struct pda_pa_curve_data *curve_data)
  249. {
  250. struct p54_common *priv = dev->priv;
  251. struct p54_pa_curve_data_sample *dst;
  252. struct pda_pa_curve_data_sample_rev1 *src;
  253. size_t cd_len = sizeof(*curve_data) +
  254. (curve_data->points_per_channel*sizeof(*dst) + 2) *
  255. curve_data->channels;
  256. unsigned int i, j;
  257. void *source, *target;
  258. priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
  259. if (!priv->curve_data)
  260. return -ENOMEM;
  261. memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
  262. source = curve_data->data;
  263. target = priv->curve_data->data;
  264. for (i = 0; i < curve_data->channels; i++) {
  265. __le16 *freq = source;
  266. source += sizeof(__le16);
  267. *((__le16 *)target) = *freq;
  268. target += sizeof(__le16);
  269. for (j = 0; j < curve_data->points_per_channel; j++) {
  270. memcpy(target, source, sizeof(*src));
  271. target += sizeof(*dst);
  272. source += sizeof(*src);
  273. }
  274. source++;
  275. }
  276. return 0;
  277. }
  278. static const char *p54_rf_chips[] = { "NULL", "Indigo?", "Duette",
  279. "Frisbee", "Xbow", "Longbow" };
  280. static int p54_init_xbow_synth(struct ieee80211_hw *dev);
  281. static int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
  282. {
  283. struct p54_common *priv = dev->priv;
  284. struct eeprom_pda_wrap *wrap = NULL;
  285. struct pda_entry *entry;
  286. unsigned int data_len, entry_len;
  287. void *tmp;
  288. int err;
  289. u8 *end = (u8 *)eeprom + len;
  290. DECLARE_MAC_BUF(mac);
  291. wrap = (struct eeprom_pda_wrap *) eeprom;
  292. entry = (void *)wrap->data + le16_to_cpu(wrap->len);
  293. /* verify that at least the entry length/code fits */
  294. while ((u8 *)entry <= end - sizeof(*entry)) {
  295. entry_len = le16_to_cpu(entry->len);
  296. data_len = ((entry_len - 1) << 1);
  297. /* abort if entry exceeds whole structure */
  298. if ((u8 *)entry + sizeof(*entry) + data_len > end)
  299. break;
  300. switch (le16_to_cpu(entry->code)) {
  301. case PDR_MAC_ADDRESS:
  302. SET_IEEE80211_PERM_ADDR(dev, entry->data);
  303. break;
  304. case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
  305. if (data_len < 2) {
  306. err = -EINVAL;
  307. goto err;
  308. }
  309. if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
  310. err = -EINVAL;
  311. goto err;
  312. }
  313. priv->output_limit = kmalloc(entry->data[1] *
  314. sizeof(*priv->output_limit), GFP_KERNEL);
  315. if (!priv->output_limit) {
  316. err = -ENOMEM;
  317. goto err;
  318. }
  319. memcpy(priv->output_limit, &entry->data[2],
  320. entry->data[1]*sizeof(*priv->output_limit));
  321. priv->output_limit_len = entry->data[1];
  322. break;
  323. case PDR_PRISM_PA_CAL_CURVE_DATA: {
  324. struct pda_pa_curve_data *curve_data =
  325. (struct pda_pa_curve_data *)entry->data;
  326. if (data_len < sizeof(*curve_data)) {
  327. err = -EINVAL;
  328. goto err;
  329. }
  330. switch (curve_data->cal_method_rev) {
  331. case 0:
  332. err = p54_convert_rev0(dev, curve_data);
  333. break;
  334. case 1:
  335. err = p54_convert_rev1(dev, curve_data);
  336. break;
  337. default:
  338. printk(KERN_ERR "p54: unknown curve data "
  339. "revision %d\n",
  340. curve_data->cal_method_rev);
  341. err = -ENODEV;
  342. break;
  343. }
  344. if (err)
  345. goto err;
  346. }
  347. case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
  348. priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
  349. if (!priv->iq_autocal) {
  350. err = -ENOMEM;
  351. goto err;
  352. }
  353. memcpy(priv->iq_autocal, entry->data, data_len);
  354. priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
  355. break;
  356. case PDR_INTERFACE_LIST:
  357. tmp = entry->data;
  358. while ((u8 *)tmp < entry->data + data_len) {
  359. struct bootrec_exp_if *exp_if = tmp;
  360. if (le16_to_cpu(exp_if->if_id) == 0xF)
  361. priv->rxhw = le16_to_cpu(exp_if->variant) & 0x07;
  362. tmp += sizeof(struct bootrec_exp_if);
  363. }
  364. break;
  365. case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
  366. priv->version = *(u8 *)(entry->data + 1);
  367. break;
  368. case PDR_END:
  369. /* make it overrun */
  370. entry_len = len;
  371. break;
  372. default:
  373. printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n",
  374. le16_to_cpu(entry->code));
  375. break;
  376. }
  377. entry = (void *)entry + (entry_len + 1)*2;
  378. }
  379. if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
  380. printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
  381. err = -EINVAL;
  382. goto err;
  383. }
  384. switch (priv->rxhw) {
  385. case 4: /* XBow */
  386. p54_init_xbow_synth(dev);
  387. case 1: /* Indigo? */
  388. case 2: /* Duette */
  389. dev->wiphy->bands[IEEE80211_BAND_5GHZ] = &band_5GHz;
  390. case 3: /* Frisbee */
  391. case 5: /* Longbow */
  392. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz;
  393. break;
  394. default:
  395. printk(KERN_ERR "%s: unsupported RF-Chip\n",
  396. wiphy_name(dev->wiphy));
  397. err = -EINVAL;
  398. goto err;
  399. }
  400. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  401. u8 perm_addr[ETH_ALEN];
  402. printk(KERN_WARNING "%s: Invalid hwaddr! Using randomly generated MAC addr\n",
  403. wiphy_name(dev->wiphy));
  404. random_ether_addr(perm_addr);
  405. SET_IEEE80211_PERM_ADDR(dev, perm_addr);
  406. }
  407. printk(KERN_INFO "%s: hwaddr %s, MAC:isl38%02x RF:%s\n",
  408. wiphy_name(dev->wiphy),
  409. print_mac(mac, dev->wiphy->perm_addr),
  410. priv->version, p54_rf_chips[priv->rxhw]);
  411. return 0;
  412. err:
  413. if (priv->iq_autocal) {
  414. kfree(priv->iq_autocal);
  415. priv->iq_autocal = NULL;
  416. }
  417. if (priv->output_limit) {
  418. kfree(priv->output_limit);
  419. priv->output_limit = NULL;
  420. }
  421. if (priv->curve_data) {
  422. kfree(priv->curve_data);
  423. priv->curve_data = NULL;
  424. }
  425. printk(KERN_ERR "p54: eeprom parse failed!\n");
  426. return err;
  427. }
  428. EXPORT_SYMBOL_GPL(p54_parse_eeprom);
  429. static int p54_rssi_to_dbm(struct ieee80211_hw *dev, int rssi)
  430. {
  431. /* TODO: get the rssi_add & rssi_mul data from the eeprom */
  432. return ((rssi * 0x83) / 64 - 400) / 4;
  433. }
  434. static int p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
  435. {
  436. struct p54_common *priv = dev->priv;
  437. struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
  438. struct ieee80211_rx_status rx_status = {0};
  439. u16 freq = le16_to_cpu(hdr->freq);
  440. size_t header_len = sizeof(*hdr);
  441. u32 tsf32;
  442. if (!(hdr->magic & cpu_to_le16(0x0001))) {
  443. if (priv->filter_flags & FIF_FCSFAIL)
  444. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  445. else
  446. return 0;
  447. }
  448. rx_status.signal = p54_rssi_to_dbm(dev, hdr->rssi);
  449. rx_status.noise = priv->noise;
  450. /* XX correct? */
  451. rx_status.qual = (100 * hdr->rssi) / 127;
  452. rx_status.rate_idx = (dev->conf.channel->band == IEEE80211_BAND_2GHZ ?
  453. hdr->rate : (hdr->rate - 4)) & 0xf;
  454. rx_status.freq = freq;
  455. rx_status.band = dev->conf.channel->band;
  456. rx_status.antenna = hdr->antenna;
  457. tsf32 = le32_to_cpu(hdr->tsf32);
  458. if (tsf32 < priv->tsf_low32)
  459. priv->tsf_high32++;
  460. rx_status.mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
  461. priv->tsf_low32 = tsf32;
  462. rx_status.flag |= RX_FLAG_TSFT;
  463. if (hdr->magic & cpu_to_le16(0x4000))
  464. header_len += hdr->align[0];
  465. skb_pull(skb, header_len);
  466. skb_trim(skb, le16_to_cpu(hdr->len));
  467. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  468. return -1;
  469. }
  470. static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
  471. {
  472. struct p54_common *priv = dev->priv;
  473. int i;
  474. for (i = 0; i < dev->queues; i++)
  475. if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit)
  476. ieee80211_wake_queue(dev, i);
  477. }
  478. static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
  479. {
  480. struct p54_common *priv = dev->priv;
  481. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  482. struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
  483. struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
  484. u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
  485. struct memrecord *range = NULL;
  486. u32 freed = 0;
  487. u32 last_addr = priv->rx_start;
  488. unsigned long flags;
  489. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  490. while (entry != (struct sk_buff *)&priv->tx_queue) {
  491. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  492. range = (void *)info->driver_data;
  493. if (range->start_addr == addr) {
  494. struct p54_control_hdr *entry_hdr;
  495. struct p54_tx_control_allocdata *entry_data;
  496. int pad = 0;
  497. if (entry->next != (struct sk_buff *)&priv->tx_queue) {
  498. struct ieee80211_tx_info *ni;
  499. struct memrecord *mr;
  500. ni = IEEE80211_SKB_CB(entry->next);
  501. mr = (struct memrecord *)ni->driver_data;
  502. freed = mr->start_addr - last_addr;
  503. } else
  504. freed = priv->rx_end - last_addr;
  505. last_addr = range->end_addr;
  506. __skb_unlink(entry, &priv->tx_queue);
  507. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  508. memset(&info->status, 0, sizeof(info->status));
  509. entry_hdr = (struct p54_control_hdr *) entry->data;
  510. entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
  511. if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
  512. pad = entry_data->align[0];
  513. priv->tx_stats[entry_data->hw_queue].len--;
  514. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  515. if (!(payload->status & 0x01))
  516. info->flags |= IEEE80211_TX_STAT_ACK;
  517. else
  518. info->status.excessive_retries = 1;
  519. }
  520. info->status.retry_count = payload->retries - 1;
  521. info->status.ack_signal = p54_rssi_to_dbm(dev,
  522. le16_to_cpu(payload->ack_rssi));
  523. skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
  524. ieee80211_tx_status_irqsafe(dev, entry);
  525. goto out;
  526. } else
  527. last_addr = range->end_addr;
  528. entry = entry->next;
  529. }
  530. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  531. out:
  532. if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
  533. sizeof(struct p54_control_hdr))
  534. p54_wake_free_queues(dev);
  535. }
  536. static void p54_rx_eeprom_readback(struct ieee80211_hw *dev,
  537. struct sk_buff *skb)
  538. {
  539. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  540. struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
  541. struct p54_common *priv = dev->priv;
  542. if (!priv->eeprom)
  543. return ;
  544. memcpy(priv->eeprom, eeprom->data, le16_to_cpu(eeprom->len));
  545. complete(&priv->eeprom_comp);
  546. }
  547. static void p54_rx_stats(struct ieee80211_hw *dev, struct sk_buff *skb)
  548. {
  549. struct p54_common *priv = dev->priv;
  550. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  551. struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
  552. u32 tsf32 = le32_to_cpu(stats->tsf32);
  553. if (tsf32 < priv->tsf_low32)
  554. priv->tsf_high32++;
  555. priv->tsf_low32 = tsf32;
  556. priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
  557. priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
  558. priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
  559. priv->noise = p54_rssi_to_dbm(dev, le32_to_cpu(stats->noise));
  560. complete(&priv->stats_comp);
  561. mod_timer(&priv->stats_timer, jiffies + 5 * HZ);
  562. }
  563. static int p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
  564. {
  565. struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
  566. switch (le16_to_cpu(hdr->type)) {
  567. case P54_CONTROL_TYPE_TXDONE:
  568. p54_rx_frame_sent(dev, skb);
  569. break;
  570. case P54_CONTROL_TYPE_BBP:
  571. break;
  572. case P54_CONTROL_TYPE_STAT_READBACK:
  573. p54_rx_stats(dev, skb);
  574. break;
  575. case P54_CONTROL_TYPE_EEPROM_READBACK:
  576. p54_rx_eeprom_readback(dev, skb);
  577. break;
  578. default:
  579. printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
  580. wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
  581. break;
  582. }
  583. return 0;
  584. }
  585. /* returns zero if skb can be reused */
  586. int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
  587. {
  588. u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
  589. if (type == 0x80)
  590. return p54_rx_control(dev, skb);
  591. else
  592. return p54_rx_data(dev, skb);
  593. }
  594. EXPORT_SYMBOL_GPL(p54_rx);
  595. /*
  596. * So, the firmware is somewhat stupid and doesn't know what places in its
  597. * memory incoming data should go to. By poking around in the firmware, we
  598. * can find some unused memory to upload our packets to. However, data that we
  599. * want the card to TX needs to stay intact until the card has told us that
  600. * it is done with it. This function finds empty places we can upload to and
  601. * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
  602. * allocated areas.
  603. */
  604. static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
  605. struct p54_control_hdr *data, u32 len)
  606. {
  607. struct p54_common *priv = dev->priv;
  608. struct sk_buff *entry = priv->tx_queue.next;
  609. struct sk_buff *target_skb = NULL;
  610. u32 last_addr = priv->rx_start;
  611. u32 largest_hole = 0;
  612. u32 target_addr = priv->rx_start;
  613. unsigned long flags;
  614. unsigned int left;
  615. len = (len + priv->headroom + priv->tailroom + 3) & ~0x3;
  616. spin_lock_irqsave(&priv->tx_queue.lock, flags);
  617. left = skb_queue_len(&priv->tx_queue);
  618. while (left--) {
  619. u32 hole_size;
  620. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
  621. struct memrecord *range = (void *)info->driver_data;
  622. hole_size = range->start_addr - last_addr;
  623. if (!target_skb && hole_size >= len) {
  624. target_skb = entry->prev;
  625. hole_size -= len;
  626. target_addr = last_addr;
  627. }
  628. largest_hole = max(largest_hole, hole_size);
  629. last_addr = range->end_addr;
  630. entry = entry->next;
  631. }
  632. if (!target_skb && priv->rx_end - last_addr >= len) {
  633. target_skb = priv->tx_queue.prev;
  634. largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
  635. if (!skb_queue_empty(&priv->tx_queue)) {
  636. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb);
  637. struct memrecord *range = (void *)info->driver_data;
  638. target_addr = range->end_addr;
  639. }
  640. } else
  641. largest_hole = max(largest_hole, priv->rx_end - last_addr);
  642. if (skb) {
  643. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  644. struct memrecord *range = (void *)info->driver_data;
  645. range->start_addr = target_addr;
  646. range->end_addr = target_addr + len;
  647. __skb_queue_after(&priv->tx_queue, target_skb, skb);
  648. if (largest_hole < priv->rx_mtu + priv->headroom +
  649. priv->tailroom +
  650. sizeof(struct p54_control_hdr))
  651. ieee80211_stop_queues(dev);
  652. }
  653. spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
  654. data->req_id = cpu_to_le32(target_addr + priv->headroom);
  655. }
  656. int p54_read_eeprom(struct ieee80211_hw *dev)
  657. {
  658. struct p54_common *priv = dev->priv;
  659. struct p54_control_hdr *hdr = NULL;
  660. struct p54_eeprom_lm86 *eeprom_hdr;
  661. size_t eeprom_size = 0x2020, offset = 0, blocksize;
  662. int ret = -ENOMEM;
  663. void *eeprom = NULL;
  664. hdr = (struct p54_control_hdr *)kzalloc(sizeof(*hdr) +
  665. sizeof(*eeprom_hdr) + EEPROM_READBACK_LEN, GFP_KERNEL);
  666. if (!hdr)
  667. goto free;
  668. priv->eeprom = kzalloc(EEPROM_READBACK_LEN, GFP_KERNEL);
  669. if (!priv->eeprom)
  670. goto free;
  671. eeprom = kzalloc(eeprom_size, GFP_KERNEL);
  672. if (!eeprom)
  673. goto free;
  674. hdr->magic1 = cpu_to_le16(0x8000);
  675. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
  676. hdr->retry1 = hdr->retry2 = 0;
  677. eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
  678. while (eeprom_size) {
  679. blocksize = min(eeprom_size, (size_t)EEPROM_READBACK_LEN);
  680. hdr->len = cpu_to_le16(blocksize + sizeof(*eeprom_hdr));
  681. eeprom_hdr->offset = cpu_to_le16(offset);
  682. eeprom_hdr->len = cpu_to_le16(blocksize);
  683. p54_assign_address(dev, NULL, hdr, le16_to_cpu(hdr->len) +
  684. sizeof(*hdr));
  685. priv->tx(dev, hdr, le16_to_cpu(hdr->len) + sizeof(*hdr), 0);
  686. if (!wait_for_completion_interruptible_timeout(&priv->eeprom_comp, HZ)) {
  687. printk(KERN_ERR "%s: device does not respond!\n",
  688. wiphy_name(dev->wiphy));
  689. ret = -EBUSY;
  690. goto free;
  691. }
  692. memcpy(eeprom + offset, priv->eeprom, blocksize);
  693. offset += blocksize;
  694. eeprom_size -= blocksize;
  695. }
  696. ret = p54_parse_eeprom(dev, eeprom, offset);
  697. free:
  698. kfree(priv->eeprom);
  699. priv->eeprom = NULL;
  700. kfree(hdr);
  701. kfree(eeprom);
  702. return ret;
  703. }
  704. EXPORT_SYMBOL_GPL(p54_read_eeprom);
  705. static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
  706. {
  707. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  708. struct ieee80211_tx_queue_stats *current_queue;
  709. struct p54_common *priv = dev->priv;
  710. struct p54_control_hdr *hdr;
  711. struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  712. struct p54_tx_control_allocdata *txhdr;
  713. size_t padding, len;
  714. u8 rate;
  715. u8 cts_rate = 0x20;
  716. current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4];
  717. if (unlikely(current_queue->len > current_queue->limit))
  718. return NETDEV_TX_BUSY;
  719. current_queue->len++;
  720. current_queue->count++;
  721. if (current_queue->len == current_queue->limit)
  722. ieee80211_stop_queue(dev, skb_get_queue_mapping(skb));
  723. padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
  724. len = skb->len;
  725. txhdr = (struct p54_tx_control_allocdata *)
  726. skb_push(skb, sizeof(*txhdr) + padding);
  727. hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
  728. if (padding)
  729. hdr->magic1 = cpu_to_le16(0x4010);
  730. else
  731. hdr->magic1 = cpu_to_le16(0x0010);
  732. hdr->len = cpu_to_le16(len);
  733. hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1);
  734. hdr->retry1 = hdr->retry2 = info->control.retry_limit;
  735. /* TODO: add support for alternate retry TX rates */
  736. rate = ieee80211_get_tx_rate(dev, info)->hw_value;
  737. if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) {
  738. rate |= 0x10;
  739. cts_rate |= 0x10;
  740. }
  741. if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
  742. rate |= 0x40;
  743. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  744. } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
  745. rate |= 0x20;
  746. cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value;
  747. }
  748. memset(txhdr->rateset, rate, 8);
  749. txhdr->key_type = 0;
  750. txhdr->key_len = 0;
  751. txhdr->hw_queue = skb_get_queue_mapping(skb) + 4;
  752. txhdr->tx_antenna = (info->antenna_sel_tx == 0) ?
  753. 2 : info->antenna_sel_tx - 1;
  754. txhdr->output_power = priv->output_power;
  755. txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ?
  756. 0 : cts_rate;
  757. if (padding)
  758. txhdr->align[0] = padding;
  759. /* FIXME: The sequence that follows is needed for this driver to
  760. * work with mac80211 since "mac80211: fix TX sequence numbers".
  761. * As with the temporary code in rt2x00, changes will be needed
  762. * to get proper sequence numbers on beacons. In addition, this
  763. * patch places the sequence number in the hardware state, which
  764. * limits us to a single virtual state.
  765. */
  766. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  767. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  768. priv->seqno += 0x10;
  769. ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  770. ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  771. }
  772. /* modifies skb->cb and with it info, so must be last! */
  773. p54_assign_address(dev, skb, hdr, skb->len);
  774. priv->tx(dev, hdr, skb->len, 0);
  775. return 0;
  776. }
  777. static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
  778. const u8 *bssid)
  779. {
  780. struct p54_common *priv = dev->priv;
  781. struct p54_control_hdr *hdr;
  782. struct p54_tx_control_filter *filter;
  783. size_t data_len;
  784. hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
  785. priv->tx_hdr_len, GFP_ATOMIC);
  786. if (!hdr)
  787. return -ENOMEM;
  788. hdr = (void *)hdr + priv->tx_hdr_len;
  789. filter = (struct p54_tx_control_filter *) hdr->data;
  790. hdr->magic1 = cpu_to_le16(0x8001);
  791. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
  792. priv->filter_type = filter->filter_type = cpu_to_le16(filter_type);
  793. memcpy(filter->mac_addr, priv->mac_addr, ETH_ALEN);
  794. if (!bssid)
  795. memset(filter->bssid, ~0, ETH_ALEN);
  796. else
  797. memcpy(filter->bssid, bssid, ETH_ALEN);
  798. filter->rx_antenna = priv->rx_antenna;
  799. if (priv->fw_var < 0x500) {
  800. data_len = P54_TX_CONTROL_FILTER_V1_LEN;
  801. filter->v1.basic_rate_mask = cpu_to_le32(0x15F);
  802. filter->v1.rx_addr = cpu_to_le32(priv->rx_end);
  803. filter->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  804. filter->v1.rxhw = cpu_to_le16(priv->rxhw);
  805. filter->v1.wakeup_timer = cpu_to_le16(500);
  806. } else {
  807. data_len = P54_TX_CONTROL_FILTER_V2_LEN;
  808. filter->v2.rx_addr = cpu_to_le32(priv->rx_end);
  809. filter->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  810. filter->v2.rxhw = cpu_to_le16(priv->rxhw);
  811. filter->v2.timer = cpu_to_le16(1000);
  812. }
  813. hdr->len = cpu_to_le16(data_len);
  814. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  815. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  816. return 0;
  817. }
  818. static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
  819. {
  820. struct p54_common *priv = dev->priv;
  821. struct p54_control_hdr *hdr;
  822. struct p54_tx_control_channel *chan;
  823. unsigned int i;
  824. size_t data_len;
  825. void *entry;
  826. hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) +
  827. priv->tx_hdr_len, GFP_KERNEL);
  828. if (!hdr)
  829. return -ENOMEM;
  830. hdr = (void *)hdr + priv->tx_hdr_len;
  831. chan = (struct p54_tx_control_channel *) hdr->data;
  832. hdr->magic1 = cpu_to_le16(0x8001);
  833. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
  834. chan->flags = cpu_to_le16(0x1);
  835. chan->dwell = cpu_to_le16(0x0);
  836. for (i = 0; i < priv->iq_autocal_len; i++) {
  837. if (priv->iq_autocal[i].freq != freq)
  838. continue;
  839. memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
  840. sizeof(*priv->iq_autocal));
  841. break;
  842. }
  843. if (i == priv->iq_autocal_len)
  844. goto err;
  845. for (i = 0; i < priv->output_limit_len; i++) {
  846. if (priv->output_limit[i].freq != freq)
  847. continue;
  848. chan->val_barker = 0x38;
  849. chan->val_bpsk = chan->dup_bpsk =
  850. priv->output_limit[i].val_bpsk;
  851. chan->val_qpsk = chan->dup_qpsk =
  852. priv->output_limit[i].val_qpsk;
  853. chan->val_16qam = chan->dup_16qam =
  854. priv->output_limit[i].val_16qam;
  855. chan->val_64qam = chan->dup_64qam =
  856. priv->output_limit[i].val_64qam;
  857. break;
  858. }
  859. if (i == priv->output_limit_len)
  860. goto err;
  861. entry = priv->curve_data->data;
  862. for (i = 0; i < priv->curve_data->channels; i++) {
  863. if (*((__le16 *)entry) != freq) {
  864. entry += sizeof(__le16);
  865. entry += sizeof(struct p54_pa_curve_data_sample) *
  866. priv->curve_data->points_per_channel;
  867. continue;
  868. }
  869. entry += sizeof(__le16);
  870. chan->pa_points_per_curve =
  871. min(priv->curve_data->points_per_channel, (u8) 8);
  872. memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
  873. chan->pa_points_per_curve);
  874. break;
  875. }
  876. if (priv->fw_var < 0x500) {
  877. data_len = P54_TX_CONTROL_CHANNEL_V1_LEN;
  878. chan->v1.rssical_mul = cpu_to_le16(130);
  879. chan->v1.rssical_add = cpu_to_le16(0xfe70);
  880. } else {
  881. data_len = P54_TX_CONTROL_CHANNEL_V2_LEN;
  882. chan->v2.rssical_mul = cpu_to_le16(130);
  883. chan->v2.rssical_add = cpu_to_le16(0xfe70);
  884. chan->v2.basic_rate_mask = cpu_to_le32(0x15f);
  885. }
  886. hdr->len = cpu_to_le16(data_len);
  887. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + data_len);
  888. priv->tx(dev, hdr, sizeof(*hdr) + data_len, 1);
  889. return 0;
  890. err:
  891. printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
  892. kfree(hdr);
  893. return -EINVAL;
  894. }
  895. static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
  896. {
  897. struct p54_common *priv = dev->priv;
  898. struct p54_control_hdr *hdr;
  899. struct p54_tx_control_led *led;
  900. hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
  901. priv->tx_hdr_len, GFP_KERNEL);
  902. if (!hdr)
  903. return -ENOMEM;
  904. hdr = (void *)hdr + priv->tx_hdr_len;
  905. hdr->magic1 = cpu_to_le16(0x8001);
  906. hdr->len = cpu_to_le16(sizeof(*led));
  907. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
  908. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led));
  909. led = (struct p54_tx_control_led *) hdr->data;
  910. led->mode = cpu_to_le16(mode);
  911. led->led_permanent = cpu_to_le16(link);
  912. led->led_temporary = cpu_to_le16(act);
  913. led->duration = cpu_to_le16(1000);
  914. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
  915. return 0;
  916. }
  917. #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
  918. do { \
  919. queue.aifs = cpu_to_le16(ai_fs); \
  920. queue.cwmin = cpu_to_le16(cw_min); \
  921. queue.cwmax = cpu_to_le16(cw_max); \
  922. queue.txop = cpu_to_le16(_txop); \
  923. } while(0)
  924. static void p54_init_vdcf(struct ieee80211_hw *dev)
  925. {
  926. struct p54_common *priv = dev->priv;
  927. struct p54_control_hdr *hdr;
  928. struct p54_tx_control_vdcf *vdcf;
  929. /* all USB V1 adapters need a extra headroom */
  930. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  931. hdr->magic1 = cpu_to_le16(0x8001);
  932. hdr->len = cpu_to_le16(sizeof(*vdcf));
  933. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
  934. hdr->req_id = cpu_to_le32(priv->rx_start);
  935. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  936. P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47);
  937. P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94);
  938. P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0);
  939. P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0);
  940. }
  941. static void p54_set_vdcf(struct ieee80211_hw *dev)
  942. {
  943. struct p54_common *priv = dev->priv;
  944. struct p54_control_hdr *hdr;
  945. struct p54_tx_control_vdcf *vdcf;
  946. hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
  947. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf));
  948. vdcf = (struct p54_tx_control_vdcf *) hdr->data;
  949. if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  950. vdcf->slottime = 9;
  951. vdcf->magic1 = 0x10;
  952. vdcf->magic2 = 0x00;
  953. } else {
  954. vdcf->slottime = 20;
  955. vdcf->magic1 = 0x0a;
  956. vdcf->magic2 = 0x06;
  957. }
  958. /* (see prism54/isl_oid.h for further details) */
  959. vdcf->frameburst = cpu_to_le16(0);
  960. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
  961. }
  962. static int p54_start(struct ieee80211_hw *dev)
  963. {
  964. struct p54_common *priv = dev->priv;
  965. int err;
  966. if (!priv->cached_vdcf) {
  967. priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+
  968. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  969. GFP_KERNEL);
  970. if (!priv->cached_vdcf)
  971. return -ENOMEM;
  972. }
  973. if (!priv->cached_stats) {
  974. priv->cached_stats = kzalloc(sizeof(struct p54_statistics) +
  975. priv->tx_hdr_len + sizeof(struct p54_control_hdr),
  976. GFP_KERNEL);
  977. if (!priv->cached_stats) {
  978. kfree(priv->cached_vdcf);
  979. priv->cached_vdcf = NULL;
  980. return -ENOMEM;
  981. }
  982. }
  983. err = priv->open(dev);
  984. if (!err)
  985. priv->mode = NL80211_IFTYPE_MONITOR;
  986. p54_init_vdcf(dev);
  987. mod_timer(&priv->stats_timer, jiffies + HZ);
  988. return err;
  989. }
  990. static void p54_stop(struct ieee80211_hw *dev)
  991. {
  992. struct p54_common *priv = dev->priv;
  993. struct sk_buff *skb;
  994. del_timer(&priv->stats_timer);
  995. while ((skb = skb_dequeue(&priv->tx_queue)))
  996. kfree_skb(skb);
  997. priv->stop(dev);
  998. priv->tsf_high32 = priv->tsf_low32 = 0;
  999. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1000. }
  1001. static int p54_add_interface(struct ieee80211_hw *dev,
  1002. struct ieee80211_if_init_conf *conf)
  1003. {
  1004. struct p54_common *priv = dev->priv;
  1005. if (priv->mode != NL80211_IFTYPE_MONITOR)
  1006. return -EOPNOTSUPP;
  1007. switch (conf->type) {
  1008. case NL80211_IFTYPE_STATION:
  1009. priv->mode = conf->type;
  1010. break;
  1011. default:
  1012. return -EOPNOTSUPP;
  1013. }
  1014. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  1015. p54_set_filter(dev, 0, NULL);
  1016. switch (conf->type) {
  1017. case NL80211_IFTYPE_STATION:
  1018. p54_set_filter(dev, 1, NULL);
  1019. break;
  1020. default:
  1021. BUG(); /* impossible */
  1022. break;
  1023. }
  1024. p54_set_leds(dev, 1, 0, 0);
  1025. return 0;
  1026. }
  1027. static void p54_remove_interface(struct ieee80211_hw *dev,
  1028. struct ieee80211_if_init_conf *conf)
  1029. {
  1030. struct p54_common *priv = dev->priv;
  1031. priv->mode = NL80211_IFTYPE_MONITOR;
  1032. memset(priv->mac_addr, 0, ETH_ALEN);
  1033. p54_set_filter(dev, 0, NULL);
  1034. }
  1035. static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  1036. {
  1037. int ret;
  1038. struct p54_common *priv = dev->priv;
  1039. mutex_lock(&priv->conf_mutex);
  1040. priv->rx_antenna = (conf->antenna_sel_rx == 0) ?
  1041. 2 : conf->antenna_sel_tx - 1;
  1042. priv->output_power = conf->power_level << 2;
  1043. ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq));
  1044. p54_set_vdcf(dev);
  1045. mutex_unlock(&priv->conf_mutex);
  1046. return ret;
  1047. }
  1048. static int p54_config_interface(struct ieee80211_hw *dev,
  1049. struct ieee80211_vif *vif,
  1050. struct ieee80211_if_conf *conf)
  1051. {
  1052. struct p54_common *priv = dev->priv;
  1053. mutex_lock(&priv->conf_mutex);
  1054. p54_set_filter(dev, 0, conf->bssid);
  1055. p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
  1056. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  1057. mutex_unlock(&priv->conf_mutex);
  1058. return 0;
  1059. }
  1060. static void p54_configure_filter(struct ieee80211_hw *dev,
  1061. unsigned int changed_flags,
  1062. unsigned int *total_flags,
  1063. int mc_count, struct dev_mc_list *mclist)
  1064. {
  1065. struct p54_common *priv = dev->priv;
  1066. *total_flags &= FIF_BCN_PRBRESP_PROMISC |
  1067. FIF_PROMISC_IN_BSS |
  1068. FIF_FCSFAIL;
  1069. priv->filter_flags = *total_flags;
  1070. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1071. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1072. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1073. NULL);
  1074. else
  1075. p54_set_filter(dev, le16_to_cpu(priv->filter_type),
  1076. priv->bssid);
  1077. }
  1078. if (changed_flags & FIF_PROMISC_IN_BSS) {
  1079. if (*total_flags & FIF_PROMISC_IN_BSS)
  1080. p54_set_filter(dev, le16_to_cpu(priv->filter_type) |
  1081. 0x8, NULL);
  1082. else
  1083. p54_set_filter(dev, le16_to_cpu(priv->filter_type) &
  1084. ~0x8, priv->bssid);
  1085. }
  1086. }
  1087. static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue,
  1088. const struct ieee80211_tx_queue_params *params)
  1089. {
  1090. struct p54_common *priv = dev->priv;
  1091. struct p54_tx_control_vdcf *vdcf;
  1092. vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
  1093. ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
  1094. if ((params) && !(queue > 4)) {
  1095. P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
  1096. params->cw_min, params->cw_max, params->txop);
  1097. } else
  1098. return -EINVAL;
  1099. p54_set_vdcf(dev);
  1100. return 0;
  1101. }
  1102. static int p54_init_xbow_synth(struct ieee80211_hw *dev)
  1103. {
  1104. struct p54_common *priv = dev->priv;
  1105. struct p54_control_hdr *hdr;
  1106. struct p54_tx_control_xbow_synth *xbow;
  1107. hdr = kzalloc(sizeof(*hdr) + sizeof(*xbow) +
  1108. priv->tx_hdr_len, GFP_KERNEL);
  1109. if (!hdr)
  1110. return -ENOMEM;
  1111. hdr = (void *)hdr + priv->tx_hdr_len;
  1112. hdr->magic1 = cpu_to_le16(0x8001);
  1113. hdr->len = cpu_to_le16(sizeof(*xbow));
  1114. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_XBOW_SYNTH_CFG);
  1115. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*xbow));
  1116. xbow = (struct p54_tx_control_xbow_synth *) hdr->data;
  1117. xbow->magic1 = cpu_to_le16(0x1);
  1118. xbow->magic2 = cpu_to_le16(0x2);
  1119. xbow->freq = cpu_to_le16(5390);
  1120. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*xbow), 1);
  1121. return 0;
  1122. }
  1123. static void p54_statistics_timer(unsigned long data)
  1124. {
  1125. struct ieee80211_hw *dev = (struct ieee80211_hw *) data;
  1126. struct p54_common *priv = dev->priv;
  1127. struct p54_control_hdr *hdr;
  1128. struct p54_statistics *stats;
  1129. BUG_ON(!priv->cached_stats);
  1130. hdr = (void *)priv->cached_stats + priv->tx_hdr_len;
  1131. hdr->magic1 = cpu_to_le16(0x8000);
  1132. hdr->len = cpu_to_le16(sizeof(*stats));
  1133. hdr->type = cpu_to_le16(P54_CONTROL_TYPE_STAT_READBACK);
  1134. p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*stats));
  1135. priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*stats), 0);
  1136. }
  1137. static int p54_get_stats(struct ieee80211_hw *dev,
  1138. struct ieee80211_low_level_stats *stats)
  1139. {
  1140. struct p54_common *priv = dev->priv;
  1141. del_timer(&priv->stats_timer);
  1142. p54_statistics_timer((unsigned long)dev);
  1143. if (!wait_for_completion_interruptible_timeout(&priv->stats_comp, HZ)) {
  1144. printk(KERN_ERR "%s: device does not respond!\n",
  1145. wiphy_name(dev->wiphy));
  1146. return -EBUSY;
  1147. }
  1148. memcpy(stats, &priv->stats, sizeof(*stats));
  1149. return 0;
  1150. }
  1151. static int p54_get_tx_stats(struct ieee80211_hw *dev,
  1152. struct ieee80211_tx_queue_stats *stats)
  1153. {
  1154. struct p54_common *priv = dev->priv;
  1155. memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues);
  1156. return 0;
  1157. }
  1158. static const struct ieee80211_ops p54_ops = {
  1159. .tx = p54_tx,
  1160. .start = p54_start,
  1161. .stop = p54_stop,
  1162. .add_interface = p54_add_interface,
  1163. .remove_interface = p54_remove_interface,
  1164. .config = p54_config,
  1165. .config_interface = p54_config_interface,
  1166. .configure_filter = p54_configure_filter,
  1167. .conf_tx = p54_conf_tx,
  1168. .get_stats = p54_get_stats,
  1169. .get_tx_stats = p54_get_tx_stats
  1170. };
  1171. struct ieee80211_hw *p54_init_common(size_t priv_data_len)
  1172. {
  1173. struct ieee80211_hw *dev;
  1174. struct p54_common *priv;
  1175. dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
  1176. if (!dev)
  1177. return NULL;
  1178. priv = dev->priv;
  1179. priv->mode = NL80211_IFTYPE_UNSPECIFIED;
  1180. skb_queue_head_init(&priv->tx_queue);
  1181. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
  1182. IEEE80211_HW_RX_INCLUDES_FCS |
  1183. IEEE80211_HW_SIGNAL_DBM |
  1184. IEEE80211_HW_NOISE_DBM;
  1185. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  1186. dev->channel_change_time = 1000; /* TODO: find actual value */
  1187. priv->tx_stats[0].limit = 1;
  1188. priv->tx_stats[1].limit = 1;
  1189. priv->tx_stats[2].limit = 1;
  1190. priv->tx_stats[3].limit = 1;
  1191. priv->tx_stats[4].limit = 5;
  1192. dev->queues = 1;
  1193. priv->noise = -94;
  1194. dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
  1195. sizeof(struct p54_tx_control_allocdata);
  1196. mutex_init(&priv->conf_mutex);
  1197. init_completion(&priv->eeprom_comp);
  1198. init_completion(&priv->stats_comp);
  1199. setup_timer(&priv->stats_timer, p54_statistics_timer,
  1200. (unsigned long)dev);
  1201. return dev;
  1202. }
  1203. EXPORT_SYMBOL_GPL(p54_init_common);
  1204. void p54_free_common(struct ieee80211_hw *dev)
  1205. {
  1206. struct p54_common *priv = dev->priv;
  1207. kfree(priv->cached_stats);
  1208. kfree(priv->iq_autocal);
  1209. kfree(priv->output_limit);
  1210. kfree(priv->curve_data);
  1211. kfree(priv->cached_vdcf);
  1212. }
  1213. EXPORT_SYMBOL_GPL(p54_free_common);
  1214. static int __init p54_init(void)
  1215. {
  1216. return 0;
  1217. }
  1218. static void __exit p54_exit(void)
  1219. {
  1220. }
  1221. module_init(p54_init);
  1222. module_exit(p54_exit);