lmc_main.c 61 KB

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  1. /*
  2. * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
  3. * All rights reserved. www.lanmedia.com
  4. * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
  5. *
  6. * This code is written by:
  7. * Andrew Stanley-Jones (asj@cban.com)
  8. * Rob Braun (bbraun@vix.com),
  9. * Michael Graff (explorer@vix.com) and
  10. * Matt Thomas (matt@3am-software.com).
  11. *
  12. * With Help By:
  13. * David Boggs
  14. * Ron Crane
  15. * Alan Cox
  16. *
  17. * This software may be used and distributed according to the terms
  18. * of the GNU General Public License version 2, incorporated herein by reference.
  19. *
  20. * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
  21. *
  22. * To control link specific options lmcctl is required.
  23. * It can be obtained from ftp.lanmedia.com.
  24. *
  25. * Linux driver notes:
  26. * Linux uses the device struct lmc_private to pass private information
  27. * arround.
  28. *
  29. * The initialization portion of this driver (the lmc_reset() and the
  30. * lmc_dec_reset() functions, as well as the led controls and the
  31. * lmc_initcsrs() functions.
  32. *
  33. * The watchdog function runs every second and checks to see if
  34. * we still have link, and that the timing source is what we expected
  35. * it to be. If link is lost, the interface is marked down, and
  36. * we no longer can transmit.
  37. *
  38. */
  39. #include <linux/kernel.h>
  40. #include <linux/module.h>
  41. #include <linux/string.h>
  42. #include <linux/timer.h>
  43. #include <linux/ptrace.h>
  44. #include <linux/errno.h>
  45. #include <linux/ioport.h>
  46. #include <linux/slab.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/pci.h>
  49. #include <linux/delay.h>
  50. #include <linux/hdlc.h>
  51. #include <linux/init.h>
  52. #include <linux/in.h>
  53. #include <linux/if_arp.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/etherdevice.h>
  56. #include <linux/skbuff.h>
  57. #include <linux/inet.h>
  58. #include <linux/bitops.h>
  59. #include <asm/processor.h> /* Processor type for cache alignment. */
  60. #include <asm/io.h>
  61. #include <asm/dma.h>
  62. #include <asm/uaccess.h>
  63. //#include <asm/spinlock.h>
  64. #define DRIVER_MAJOR_VERSION 1
  65. #define DRIVER_MINOR_VERSION 34
  66. #define DRIVER_SUB_VERSION 0
  67. #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
  68. #include "lmc.h"
  69. #include "lmc_var.h"
  70. #include "lmc_ioctl.h"
  71. #include "lmc_debug.h"
  72. #include "lmc_proto.h"
  73. static int LMC_PKT_BUF_SZ = 1542;
  74. static struct pci_device_id lmc_pci_tbl[] = {
  75. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  76. PCI_VENDOR_ID_LMC, PCI_ANY_ID },
  77. { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
  78. PCI_ANY_ID, PCI_VENDOR_ID_LMC },
  79. { 0 }
  80. };
  81. MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
  82. MODULE_LICENSE("GPL v2");
  83. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev);
  84. static int lmc_rx (struct net_device *dev);
  85. static int lmc_open(struct net_device *dev);
  86. static int lmc_close(struct net_device *dev);
  87. static struct net_device_stats *lmc_get_stats(struct net_device *dev);
  88. static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
  89. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
  90. static void lmc_softreset(lmc_softc_t * const);
  91. static void lmc_running_reset(struct net_device *dev);
  92. static int lmc_ifdown(struct net_device * const);
  93. static void lmc_watchdog(unsigned long data);
  94. static void lmc_reset(lmc_softc_t * const sc);
  95. static void lmc_dec_reset(lmc_softc_t * const sc);
  96. static void lmc_driver_timeout(struct net_device *dev);
  97. /*
  98. * linux reserves 16 device specific IOCTLs. We call them
  99. * LMCIOC* to control various bits of our world.
  100. */
  101. int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
  102. {
  103. lmc_softc_t *sc = dev_to_sc(dev);
  104. lmc_ctl_t ctl;
  105. int ret = -EOPNOTSUPP;
  106. u16 regVal;
  107. unsigned long flags;
  108. lmc_trace(dev, "lmc_ioctl in");
  109. /*
  110. * Most functions mess with the structure
  111. * Disable interrupts while we do the polling
  112. */
  113. spin_lock_irqsave(&sc->lmc_lock, flags);
  114. switch (cmd) {
  115. /*
  116. * Return current driver state. Since we keep this up
  117. * To date internally, just copy this out to the user.
  118. */
  119. case LMCIOCGINFO: /*fold01*/
  120. if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
  121. ret = -EFAULT;
  122. else
  123. ret = 0;
  124. break;
  125. case LMCIOCSINFO: /*fold01*/
  126. if (!capable(CAP_NET_ADMIN)) {
  127. ret = -EPERM;
  128. break;
  129. }
  130. if(dev->flags & IFF_UP){
  131. ret = -EBUSY;
  132. break;
  133. }
  134. if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
  135. ret = -EFAULT;
  136. break;
  137. }
  138. sc->lmc_media->set_status (sc, &ctl);
  139. if(ctl.crc_length != sc->ictl.crc_length) {
  140. sc->lmc_media->set_crc_length(sc, ctl.crc_length);
  141. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
  142. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  143. else
  144. sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
  145. }
  146. ret = 0;
  147. break;
  148. case LMCIOCIFTYPE: /*fold01*/
  149. {
  150. u16 old_type = sc->if_type;
  151. u16 new_type;
  152. if (!capable(CAP_NET_ADMIN)) {
  153. ret = -EPERM;
  154. break;
  155. }
  156. if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
  157. ret = -EFAULT;
  158. break;
  159. }
  160. if (new_type == old_type)
  161. {
  162. ret = 0 ;
  163. break; /* no change */
  164. }
  165. lmc_proto_close(sc);
  166. sc->if_type = new_type;
  167. lmc_proto_attach(sc);
  168. ret = lmc_proto_open(sc);
  169. break;
  170. }
  171. case LMCIOCGETXINFO: /*fold01*/
  172. sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
  173. sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
  174. sc->lmc_xinfo.PciSlotNumber = 0;
  175. sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
  176. sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
  177. sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
  178. sc->lmc_xinfo.XilinxRevisionNumber =
  179. lmc_mii_readreg (sc, 0, 3) & 0xf;
  180. sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
  181. sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
  182. sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
  183. sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
  184. if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
  185. sizeof(struct lmc_xinfo)))
  186. ret = -EFAULT;
  187. else
  188. ret = 0;
  189. break;
  190. case LMCIOCGETLMCSTATS:
  191. if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
  192. lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
  193. sc->extra_stats.framingBitErrorCount +=
  194. lmc_mii_readreg(sc, 0, 18) & 0xff;
  195. lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
  196. sc->extra_stats.framingBitErrorCount +=
  197. (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
  198. lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
  199. sc->extra_stats.lineCodeViolationCount +=
  200. lmc_mii_readreg(sc, 0, 18) & 0xff;
  201. lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
  202. sc->extra_stats.lineCodeViolationCount +=
  203. (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
  204. lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
  205. regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
  206. sc->extra_stats.lossOfFrameCount +=
  207. (regVal & T1FRAMER_LOF_MASK) >> 4;
  208. sc->extra_stats.changeOfFrameAlignmentCount +=
  209. (regVal & T1FRAMER_COFA_MASK) >> 2;
  210. sc->extra_stats.severelyErroredFrameCount +=
  211. regVal & T1FRAMER_SEF_MASK;
  212. }
  213. if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
  214. sizeof(sc->lmc_device->stats)) ||
  215. copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
  216. &sc->extra_stats, sizeof(sc->extra_stats)))
  217. ret = -EFAULT;
  218. else
  219. ret = 0;
  220. break;
  221. case LMCIOCCLEARLMCSTATS:
  222. if (!capable(CAP_NET_ADMIN)) {
  223. ret = -EPERM;
  224. break;
  225. }
  226. memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
  227. memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
  228. sc->extra_stats.check = STATCHECK;
  229. sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
  230. sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
  231. sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
  232. ret = 0;
  233. break;
  234. case LMCIOCSETCIRCUIT: /*fold01*/
  235. if (!capable(CAP_NET_ADMIN)){
  236. ret = -EPERM;
  237. break;
  238. }
  239. if(dev->flags & IFF_UP){
  240. ret = -EBUSY;
  241. break;
  242. }
  243. if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
  244. ret = -EFAULT;
  245. break;
  246. }
  247. sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
  248. sc->ictl.circuit_type = ctl.circuit_type;
  249. ret = 0;
  250. break;
  251. case LMCIOCRESET: /*fold01*/
  252. if (!capable(CAP_NET_ADMIN)){
  253. ret = -EPERM;
  254. break;
  255. }
  256. /* Reset driver and bring back to current state */
  257. printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  258. lmc_running_reset (dev);
  259. printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
  260. LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  261. ret = 0;
  262. break;
  263. #ifdef DEBUG
  264. case LMCIOCDUMPEVENTLOG:
  265. if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
  266. ret = -EFAULT;
  267. break;
  268. }
  269. if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
  270. sizeof(lmcEventLogBuf)))
  271. ret = -EFAULT;
  272. else
  273. ret = 0;
  274. break;
  275. #endif /* end ifdef _DBG_EVENTLOG */
  276. case LMCIOCT1CONTROL: /*fold01*/
  277. if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
  278. ret = -EOPNOTSUPP;
  279. break;
  280. }
  281. break;
  282. case LMCIOCXILINX: /*fold01*/
  283. {
  284. struct lmc_xilinx_control xc; /*fold02*/
  285. if (!capable(CAP_NET_ADMIN)){
  286. ret = -EPERM;
  287. break;
  288. }
  289. /*
  290. * Stop the xwitter whlie we restart the hardware
  291. */
  292. netif_stop_queue(dev);
  293. if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
  294. ret = -EFAULT;
  295. break;
  296. }
  297. switch(xc.command){
  298. case lmc_xilinx_reset: /*fold02*/
  299. {
  300. u16 mii;
  301. mii = lmc_mii_readreg (sc, 0, 16);
  302. /*
  303. * Make all of them 0 and make input
  304. */
  305. lmc_gpio_mkinput(sc, 0xff);
  306. /*
  307. * make the reset output
  308. */
  309. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  310. /*
  311. * RESET low to force configuration. This also forces
  312. * the transmitter clock to be internal, but we expect to reset
  313. * that later anyway.
  314. */
  315. sc->lmc_gpio &= ~LMC_GEP_RESET;
  316. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  317. /*
  318. * hold for more than 10 microseconds
  319. */
  320. udelay(50);
  321. sc->lmc_gpio |= LMC_GEP_RESET;
  322. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  323. /*
  324. * stop driving Xilinx-related signals
  325. */
  326. lmc_gpio_mkinput(sc, 0xff);
  327. /* Reset the frammer hardware */
  328. sc->lmc_media->set_link_status (sc, 1);
  329. sc->lmc_media->set_status (sc, NULL);
  330. // lmc_softreset(sc);
  331. {
  332. int i;
  333. for(i = 0; i < 5; i++){
  334. lmc_led_on(sc, LMC_DS3_LED0);
  335. mdelay(100);
  336. lmc_led_off(sc, LMC_DS3_LED0);
  337. lmc_led_on(sc, LMC_DS3_LED1);
  338. mdelay(100);
  339. lmc_led_off(sc, LMC_DS3_LED1);
  340. lmc_led_on(sc, LMC_DS3_LED3);
  341. mdelay(100);
  342. lmc_led_off(sc, LMC_DS3_LED3);
  343. lmc_led_on(sc, LMC_DS3_LED2);
  344. mdelay(100);
  345. lmc_led_off(sc, LMC_DS3_LED2);
  346. }
  347. }
  348. ret = 0x0;
  349. }
  350. break;
  351. case lmc_xilinx_load_prom: /*fold02*/
  352. {
  353. u16 mii;
  354. int timeout = 500000;
  355. mii = lmc_mii_readreg (sc, 0, 16);
  356. /*
  357. * Make all of them 0 and make input
  358. */
  359. lmc_gpio_mkinput(sc, 0xff);
  360. /*
  361. * make the reset output
  362. */
  363. lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  364. /*
  365. * RESET low to force configuration. This also forces
  366. * the transmitter clock to be internal, but we expect to reset
  367. * that later anyway.
  368. */
  369. sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
  370. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  371. /*
  372. * hold for more than 10 microseconds
  373. */
  374. udelay(50);
  375. sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
  376. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  377. /*
  378. * busy wait for the chip to reset
  379. */
  380. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  381. (timeout-- > 0))
  382. ;
  383. /*
  384. * stop driving Xilinx-related signals
  385. */
  386. lmc_gpio_mkinput(sc, 0xff);
  387. ret = 0x0;
  388. break;
  389. }
  390. case lmc_xilinx_load: /*fold02*/
  391. {
  392. char *data;
  393. int pos;
  394. int timeout = 500000;
  395. if (!xc.data) {
  396. ret = -EINVAL;
  397. break;
  398. }
  399. data = kmalloc(xc.len, GFP_KERNEL);
  400. if (!data) {
  401. printk(KERN_WARNING "%s: Failed to allocate memory for copy\n", dev->name);
  402. ret = -ENOMEM;
  403. break;
  404. }
  405. if(copy_from_user(data, xc.data, xc.len))
  406. {
  407. kfree(data);
  408. ret = -ENOMEM;
  409. break;
  410. }
  411. printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
  412. lmc_gpio_mkinput(sc, 0xff);
  413. /*
  414. * Clear the Xilinx and start prgramming from the DEC
  415. */
  416. /*
  417. * Set ouput as:
  418. * Reset: 0 (active)
  419. * DP: 0 (active)
  420. * Mode: 1
  421. *
  422. */
  423. sc->lmc_gpio = 0x00;
  424. sc->lmc_gpio &= ~LMC_GEP_DP;
  425. sc->lmc_gpio &= ~LMC_GEP_RESET;
  426. sc->lmc_gpio |= LMC_GEP_MODE;
  427. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  428. lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
  429. /*
  430. * Wait at least 10 us 20 to be safe
  431. */
  432. udelay(50);
  433. /*
  434. * Clear reset and activate programming lines
  435. * Reset: Input
  436. * DP: Input
  437. * Clock: Output
  438. * Data: Output
  439. * Mode: Output
  440. */
  441. lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
  442. /*
  443. * Set LOAD, DATA, Clock to 1
  444. */
  445. sc->lmc_gpio = 0x00;
  446. sc->lmc_gpio |= LMC_GEP_MODE;
  447. sc->lmc_gpio |= LMC_GEP_DATA;
  448. sc->lmc_gpio |= LMC_GEP_CLK;
  449. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  450. lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
  451. /*
  452. * busy wait for the chip to reset
  453. */
  454. while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
  455. (timeout-- > 0))
  456. ;
  457. printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
  458. for(pos = 0; pos < xc.len; pos++){
  459. switch(data[pos]){
  460. case 0:
  461. sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
  462. break;
  463. case 1:
  464. sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
  465. break;
  466. default:
  467. printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
  468. sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
  469. }
  470. sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
  471. sc->lmc_gpio |= LMC_GEP_MODE;
  472. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  473. udelay(1);
  474. sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
  475. sc->lmc_gpio |= LMC_GEP_MODE;
  476. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  477. udelay(1);
  478. }
  479. if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
  480. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
  481. }
  482. else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
  483. printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
  484. }
  485. else {
  486. printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
  487. }
  488. lmc_gpio_mkinput(sc, 0xff);
  489. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  490. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  491. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  492. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  493. kfree(data);
  494. ret = 0;
  495. break;
  496. }
  497. default: /*fold02*/
  498. ret = -EBADE;
  499. break;
  500. }
  501. netif_wake_queue(dev);
  502. sc->lmc_txfull = 0;
  503. }
  504. break;
  505. default: /*fold01*/
  506. /* If we don't know what to do, give the protocol a shot. */
  507. ret = lmc_proto_ioctl (sc, ifr, cmd);
  508. break;
  509. }
  510. spin_unlock_irqrestore(&sc->lmc_lock, flags); /*fold01*/
  511. lmc_trace(dev, "lmc_ioctl out");
  512. return ret;
  513. }
  514. /* the watchdog process that cruises around */
  515. static void lmc_watchdog (unsigned long data) /*fold00*/
  516. {
  517. struct net_device *dev = (struct net_device *)data;
  518. lmc_softc_t *sc = dev_to_sc(dev);
  519. int link_status;
  520. u32 ticks;
  521. unsigned long flags;
  522. lmc_trace(dev, "lmc_watchdog in");
  523. spin_lock_irqsave(&sc->lmc_lock, flags);
  524. if(sc->check != 0xBEAFCAFE){
  525. printk("LMC: Corrupt net_device struct, breaking out\n");
  526. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  527. return;
  528. }
  529. /* Make sure the tx jabber and rx watchdog are off,
  530. * and the transmit and receive processes are running.
  531. */
  532. LMC_CSR_WRITE (sc, csr_15, 0x00000011);
  533. sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
  534. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  535. if (sc->lmc_ok == 0)
  536. goto kick_timer;
  537. LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
  538. /* --- begin time out check -----------------------------------
  539. * check for a transmit interrupt timeout
  540. * Has the packet xmt vs xmt serviced threshold been exceeded */
  541. if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  542. sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
  543. sc->tx_TimeoutInd == 0)
  544. {
  545. /* wait for the watchdog to come around again */
  546. sc->tx_TimeoutInd = 1;
  547. }
  548. else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
  549. sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
  550. sc->tx_TimeoutInd)
  551. {
  552. LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
  553. sc->tx_TimeoutDisplay = 1;
  554. sc->extra_stats.tx_TimeoutCnt++;
  555. /* DEC chip is stuck, hit it with a RESET!!!! */
  556. lmc_running_reset (dev);
  557. /* look at receive & transmit process state to make sure they are running */
  558. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  559. /* look at: DSR - 02 for Reg 16
  560. * CTS - 08
  561. * DCD - 10
  562. * RI - 20
  563. * for Reg 17
  564. */
  565. LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
  566. /* reset the transmit timeout detection flag */
  567. sc->tx_TimeoutInd = 0;
  568. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  569. sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
  570. } else {
  571. sc->tx_TimeoutInd = 0;
  572. sc->lastlmc_taint_tx = sc->lmc_taint_tx;
  573. sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
  574. }
  575. /* --- end time out check ----------------------------------- */
  576. link_status = sc->lmc_media->get_link_status (sc);
  577. /*
  578. * hardware level link lost, but the interface is marked as up.
  579. * Mark it as down.
  580. */
  581. if ((link_status == 0) && (sc->last_link_status != 0)) {
  582. printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
  583. sc->last_link_status = 0;
  584. /* lmc_reset (sc); Why reset??? The link can go down ok */
  585. /* Inform the world that link has been lost */
  586. netif_carrier_off(dev);
  587. }
  588. /*
  589. * hardware link is up, but the interface is marked as down.
  590. * Bring it back up again.
  591. */
  592. if (link_status != 0 && sc->last_link_status == 0) {
  593. printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
  594. sc->last_link_status = 1;
  595. /* lmc_reset (sc); Again why reset??? */
  596. netif_carrier_on(dev);
  597. }
  598. /* Call media specific watchdog functions */
  599. sc->lmc_media->watchdog(sc);
  600. /*
  601. * Poke the transmitter to make sure it
  602. * never stops, even if we run out of mem
  603. */
  604. LMC_CSR_WRITE(sc, csr_rxpoll, 0);
  605. /*
  606. * Check for code that failed
  607. * and try and fix it as appropriate
  608. */
  609. if(sc->failed_ring == 1){
  610. /*
  611. * Failed to setup the recv/xmit rin
  612. * Try again
  613. */
  614. sc->failed_ring = 0;
  615. lmc_softreset(sc);
  616. }
  617. if(sc->failed_recv_alloc == 1){
  618. /*
  619. * We failed to alloc mem in the
  620. * interrupt handler, go through the rings
  621. * and rebuild them
  622. */
  623. sc->failed_recv_alloc = 0;
  624. lmc_softreset(sc);
  625. }
  626. /*
  627. * remember the timer value
  628. */
  629. kick_timer:
  630. ticks = LMC_CSR_READ (sc, csr_gp_timer);
  631. LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
  632. sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
  633. /*
  634. * restart this timer.
  635. */
  636. sc->timer.expires = jiffies + (HZ);
  637. add_timer (&sc->timer);
  638. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  639. lmc_trace(dev, "lmc_watchdog out");
  640. }
  641. static int lmc_attach(struct net_device *dev, unsigned short encoding,
  642. unsigned short parity)
  643. {
  644. if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
  645. return 0;
  646. return -EINVAL;
  647. }
  648. static int __devinit lmc_init_one(struct pci_dev *pdev,
  649. const struct pci_device_id *ent)
  650. {
  651. lmc_softc_t *sc;
  652. struct net_device *dev;
  653. u16 subdevice;
  654. u16 AdapModelNum;
  655. int err;
  656. static int cards_found;
  657. /* lmc_trace(dev, "lmc_init_one in"); */
  658. err = pci_enable_device(pdev);
  659. if (err) {
  660. printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
  661. return err;
  662. }
  663. err = pci_request_regions(pdev, "lmc");
  664. if (err) {
  665. printk(KERN_ERR "lmc: pci_request_region failed\n");
  666. goto err_req_io;
  667. }
  668. /*
  669. * Allocate our own device structure
  670. */
  671. sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL);
  672. if (!sc) {
  673. err = -ENOMEM;
  674. goto err_kzalloc;
  675. }
  676. dev = alloc_hdlcdev(sc);
  677. if (!dev) {
  678. printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
  679. goto err_hdlcdev;
  680. }
  681. dev->type = ARPHRD_HDLC;
  682. dev_to_hdlc(dev)->xmit = lmc_start_xmit;
  683. dev_to_hdlc(dev)->attach = lmc_attach;
  684. dev->open = lmc_open;
  685. dev->stop = lmc_close;
  686. dev->get_stats = lmc_get_stats;
  687. dev->do_ioctl = lmc_ioctl;
  688. dev->tx_timeout = lmc_driver_timeout;
  689. dev->watchdog_timeo = HZ; /* 1 second */
  690. dev->tx_queue_len = 100;
  691. sc->lmc_device = dev;
  692. sc->name = dev->name;
  693. sc->if_type = LMC_PPP;
  694. sc->check = 0xBEAFCAFE;
  695. dev->base_addr = pci_resource_start(pdev, 0);
  696. dev->irq = pdev->irq;
  697. pci_set_drvdata(pdev, dev);
  698. SET_NETDEV_DEV(dev, &pdev->dev);
  699. /*
  700. * This will get the protocol layer ready and do any 1 time init's
  701. * Must have a valid sc and dev structure
  702. */
  703. lmc_proto_attach(sc);
  704. /* Init the spin lock so can call it latter */
  705. spin_lock_init(&sc->lmc_lock);
  706. pci_set_master(pdev);
  707. printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
  708. dev->base_addr, dev->irq);
  709. err = register_hdlc_device(dev);
  710. if (err) {
  711. printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
  712. free_netdev(dev);
  713. goto err_hdlcdev;
  714. }
  715. sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
  716. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
  717. /*
  718. *
  719. * Check either the subvendor or the subdevice, some systems reverse
  720. * the setting in the bois, seems to be version and arch dependent?
  721. * Fix the error, exchange the two values
  722. */
  723. if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
  724. subdevice = pdev->subsystem_vendor;
  725. switch (subdevice) {
  726. case PCI_DEVICE_ID_LMC_HSSI:
  727. printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
  728. sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
  729. sc->lmc_media = &lmc_hssi_media;
  730. break;
  731. case PCI_DEVICE_ID_LMC_DS3:
  732. printk(KERN_INFO "%s: LMC DS3\n", dev->name);
  733. sc->lmc_cardtype = LMC_CARDTYPE_DS3;
  734. sc->lmc_media = &lmc_ds3_media;
  735. break;
  736. case PCI_DEVICE_ID_LMC_SSI:
  737. printk(KERN_INFO "%s: LMC SSI\n", dev->name);
  738. sc->lmc_cardtype = LMC_CARDTYPE_SSI;
  739. sc->lmc_media = &lmc_ssi_media;
  740. break;
  741. case PCI_DEVICE_ID_LMC_T1:
  742. printk(KERN_INFO "%s: LMC T1\n", dev->name);
  743. sc->lmc_cardtype = LMC_CARDTYPE_T1;
  744. sc->lmc_media = &lmc_t1_media;
  745. break;
  746. default:
  747. printk(KERN_WARNING "%s: LMC UNKOWN CARD!\n", dev->name);
  748. break;
  749. }
  750. lmc_initcsrs (sc, dev->base_addr, 8);
  751. lmc_gpio_mkinput (sc, 0xff);
  752. sc->lmc_gpio = 0; /* drive no signals yet */
  753. sc->lmc_media->defaults (sc);
  754. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  755. /* verify that the PCI Sub System ID matches the Adapter Model number
  756. * from the MII register
  757. */
  758. AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
  759. if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
  760. subdevice != PCI_DEVICE_ID_LMC_T1) &&
  761. (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
  762. subdevice != PCI_DEVICE_ID_LMC_SSI) &&
  763. (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
  764. subdevice != PCI_DEVICE_ID_LMC_DS3) &&
  765. (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
  766. subdevice != PCI_DEVICE_ID_LMC_HSSI))
  767. printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
  768. " Subsystem ID = 0x%04x\n",
  769. dev->name, AdapModelNum, subdevice);
  770. /*
  771. * reset clock
  772. */
  773. LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
  774. sc->board_idx = cards_found++;
  775. sc->extra_stats.check = STATCHECK;
  776. sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
  777. sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
  778. sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
  779. sc->lmc_ok = 0;
  780. sc->last_link_status = 0;
  781. lmc_trace(dev, "lmc_init_one out");
  782. return 0;
  783. err_hdlcdev:
  784. pci_set_drvdata(pdev, NULL);
  785. kfree(sc);
  786. err_kzalloc:
  787. pci_release_regions(pdev);
  788. err_req_io:
  789. pci_disable_device(pdev);
  790. return err;
  791. }
  792. /*
  793. * Called from pci when removing module.
  794. */
  795. static void __devexit lmc_remove_one(struct pci_dev *pdev)
  796. {
  797. struct net_device *dev = pci_get_drvdata(pdev);
  798. if (dev) {
  799. printk(KERN_DEBUG "%s: removing...\n", dev->name);
  800. unregister_hdlc_device(dev);
  801. free_netdev(dev);
  802. pci_release_regions(pdev);
  803. pci_disable_device(pdev);
  804. pci_set_drvdata(pdev, NULL);
  805. }
  806. }
  807. /* After this is called, packets can be sent.
  808. * Does not initialize the addresses
  809. */
  810. static int lmc_open(struct net_device *dev)
  811. {
  812. lmc_softc_t *sc = dev_to_sc(dev);
  813. int err;
  814. lmc_trace(dev, "lmc_open in");
  815. lmc_led_on(sc, LMC_DS3_LED0);
  816. lmc_dec_reset(sc);
  817. lmc_reset(sc);
  818. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
  819. LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
  820. lmc_mii_readreg(sc, 0, 17));
  821. if (sc->lmc_ok){
  822. lmc_trace(dev, "lmc_open lmc_ok out");
  823. return (0);
  824. }
  825. lmc_softreset (sc);
  826. /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
  827. if (request_irq (dev->irq, &lmc_interrupt, IRQF_SHARED, dev->name, dev)){
  828. printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
  829. lmc_trace(dev, "lmc_open irq failed out");
  830. return -EAGAIN;
  831. }
  832. sc->got_irq = 1;
  833. /* Assert Terminal Active */
  834. sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
  835. sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
  836. /*
  837. * reset to last state.
  838. */
  839. sc->lmc_media->set_status (sc, NULL);
  840. /* setup default bits to be used in tulip_desc_t transmit descriptor
  841. * -baz */
  842. sc->TxDescriptControlInit = (
  843. LMC_TDES_INTERRUPT_ON_COMPLETION
  844. | LMC_TDES_FIRST_SEGMENT
  845. | LMC_TDES_LAST_SEGMENT
  846. | LMC_TDES_SECOND_ADDR_CHAINED
  847. | LMC_TDES_DISABLE_PADDING
  848. );
  849. if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
  850. /* disable 32 bit CRC generated by ASIC */
  851. sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
  852. }
  853. sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
  854. /* Acknoledge the Terminal Active and light LEDs */
  855. /* dev->flags |= IFF_UP; */
  856. if ((err = lmc_proto_open(sc)) != 0)
  857. return err;
  858. dev->do_ioctl = lmc_ioctl;
  859. netif_start_queue(dev);
  860. sc->extra_stats.tx_tbusy0++;
  861. /*
  862. * select what interrupts we want to get
  863. */
  864. sc->lmc_intrmask = 0;
  865. /* Should be using the default interrupt mask defined in the .h file. */
  866. sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
  867. | TULIP_STS_RXINTR
  868. | TULIP_STS_TXINTR
  869. | TULIP_STS_ABNRMLINTR
  870. | TULIP_STS_SYSERROR
  871. | TULIP_STS_TXSTOPPED
  872. | TULIP_STS_TXUNDERFLOW
  873. | TULIP_STS_RXSTOPPED
  874. | TULIP_STS_RXNOBUF
  875. );
  876. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  877. sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
  878. sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
  879. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  880. sc->lmc_ok = 1; /* Run watchdog */
  881. /*
  882. * Set the if up now - pfb
  883. */
  884. sc->last_link_status = 1;
  885. /*
  886. * Setup a timer for the watchdog on probe, and start it running.
  887. * Since lmc_ok == 0, it will be a NOP for now.
  888. */
  889. init_timer (&sc->timer);
  890. sc->timer.expires = jiffies + HZ;
  891. sc->timer.data = (unsigned long) dev;
  892. sc->timer.function = &lmc_watchdog;
  893. add_timer (&sc->timer);
  894. lmc_trace(dev, "lmc_open out");
  895. return (0);
  896. }
  897. /* Total reset to compensate for the AdTran DSU doing bad things
  898. * under heavy load
  899. */
  900. static void lmc_running_reset (struct net_device *dev) /*fold00*/
  901. {
  902. lmc_softc_t *sc = dev_to_sc(dev);
  903. lmc_trace(dev, "lmc_runnig_reset in");
  904. /* stop interrupts */
  905. /* Clear the interrupt mask */
  906. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  907. lmc_dec_reset (sc);
  908. lmc_reset (sc);
  909. lmc_softreset (sc);
  910. /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
  911. sc->lmc_media->set_link_status (sc, 1);
  912. sc->lmc_media->set_status (sc, NULL);
  913. netif_wake_queue(dev);
  914. sc->lmc_txfull = 0;
  915. sc->extra_stats.tx_tbusy0++;
  916. sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
  917. LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
  918. sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
  919. LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
  920. lmc_trace(dev, "lmc_runnin_reset_out");
  921. }
  922. /* This is what is called when you ifconfig down a device.
  923. * This disables the timer for the watchdog and keepalives,
  924. * and disables the irq for dev.
  925. */
  926. static int lmc_close(struct net_device *dev)
  927. {
  928. /* not calling release_region() as we should */
  929. lmc_softc_t *sc = dev_to_sc(dev);
  930. lmc_trace(dev, "lmc_close in");
  931. sc->lmc_ok = 0;
  932. sc->lmc_media->set_link_status (sc, 0);
  933. del_timer (&sc->timer);
  934. lmc_proto_close(sc);
  935. lmc_ifdown (dev);
  936. lmc_trace(dev, "lmc_close out");
  937. return 0;
  938. }
  939. /* Ends the transfer of packets */
  940. /* When the interface goes down, this is called */
  941. static int lmc_ifdown (struct net_device *dev) /*fold00*/
  942. {
  943. lmc_softc_t *sc = dev_to_sc(dev);
  944. u32 csr6;
  945. int i;
  946. lmc_trace(dev, "lmc_ifdown in");
  947. /* Don't let anything else go on right now */
  948. // dev->start = 0;
  949. netif_stop_queue(dev);
  950. sc->extra_stats.tx_tbusy1++;
  951. /* stop interrupts */
  952. /* Clear the interrupt mask */
  953. LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
  954. /* Stop Tx and Rx on the chip */
  955. csr6 = LMC_CSR_READ (sc, csr_command);
  956. csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
  957. csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
  958. LMC_CSR_WRITE (sc, csr_command, csr6);
  959. sc->lmc_device->stats.rx_missed_errors +=
  960. LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
  961. /* release the interrupt */
  962. if(sc->got_irq == 1){
  963. free_irq (dev->irq, dev);
  964. sc->got_irq = 0;
  965. }
  966. /* free skbuffs in the Rx queue */
  967. for (i = 0; i < LMC_RXDESCS; i++)
  968. {
  969. struct sk_buff *skb = sc->lmc_rxq[i];
  970. sc->lmc_rxq[i] = NULL;
  971. sc->lmc_rxring[i].status = 0;
  972. sc->lmc_rxring[i].length = 0;
  973. sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
  974. if (skb != NULL)
  975. dev_kfree_skb(skb);
  976. sc->lmc_rxq[i] = NULL;
  977. }
  978. for (i = 0; i < LMC_TXDESCS; i++)
  979. {
  980. if (sc->lmc_txq[i] != NULL)
  981. dev_kfree_skb(sc->lmc_txq[i]);
  982. sc->lmc_txq[i] = NULL;
  983. }
  984. lmc_led_off (sc, LMC_MII16_LED_ALL);
  985. netif_wake_queue(dev);
  986. sc->extra_stats.tx_tbusy0++;
  987. lmc_trace(dev, "lmc_ifdown out");
  988. return 0;
  989. }
  990. /* Interrupt handling routine. This will take an incoming packet, or clean
  991. * up after a trasmit.
  992. */
  993. static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
  994. {
  995. struct net_device *dev = (struct net_device *) dev_instance;
  996. lmc_softc_t *sc = dev_to_sc(dev);
  997. u32 csr;
  998. int i;
  999. s32 stat;
  1000. unsigned int badtx;
  1001. u32 firstcsr;
  1002. int max_work = LMC_RXDESCS;
  1003. int handled = 0;
  1004. lmc_trace(dev, "lmc_interrupt in");
  1005. spin_lock(&sc->lmc_lock);
  1006. /*
  1007. * Read the csr to find what interrupts we have (if any)
  1008. */
  1009. csr = LMC_CSR_READ (sc, csr_status);
  1010. /*
  1011. * Make sure this is our interrupt
  1012. */
  1013. if ( ! (csr & sc->lmc_intrmask)) {
  1014. goto lmc_int_fail_out;
  1015. }
  1016. firstcsr = csr;
  1017. /* always go through this loop at least once */
  1018. while (csr & sc->lmc_intrmask) {
  1019. handled = 1;
  1020. /*
  1021. * Clear interrupt bits, we handle all case below
  1022. */
  1023. LMC_CSR_WRITE (sc, csr_status, csr);
  1024. /*
  1025. * One of
  1026. * - Transmit process timed out CSR5<1>
  1027. * - Transmit jabber timeout CSR5<3>
  1028. * - Transmit underflow CSR5<5>
  1029. * - Transmit Receiver buffer unavailable CSR5<7>
  1030. * - Receive process stopped CSR5<8>
  1031. * - Receive watchdog timeout CSR5<9>
  1032. * - Early transmit interrupt CSR5<10>
  1033. *
  1034. * Is this really right? Should we do a running reset for jabber?
  1035. * (being a WAN card and all)
  1036. */
  1037. if (csr & TULIP_STS_ABNRMLINTR){
  1038. lmc_running_reset (dev);
  1039. break;
  1040. }
  1041. if (csr & TULIP_STS_RXINTR){
  1042. lmc_trace(dev, "rx interrupt");
  1043. lmc_rx (dev);
  1044. }
  1045. if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
  1046. int n_compl = 0 ;
  1047. /* reset the transmit timeout detection flag -baz */
  1048. sc->extra_stats.tx_NoCompleteCnt = 0;
  1049. badtx = sc->lmc_taint_tx;
  1050. i = badtx % LMC_TXDESCS;
  1051. while ((badtx < sc->lmc_next_tx)) {
  1052. stat = sc->lmc_txring[i].status;
  1053. LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
  1054. sc->lmc_txring[i].length);
  1055. /*
  1056. * If bit 31 is 1 the tulip owns it break out of the loop
  1057. */
  1058. if (stat & 0x80000000)
  1059. break;
  1060. n_compl++ ; /* i.e., have an empty slot in ring */
  1061. /*
  1062. * If we have no skbuff or have cleared it
  1063. * Already continue to the next buffer
  1064. */
  1065. if (sc->lmc_txq[i] == NULL)
  1066. continue;
  1067. /*
  1068. * Check the total error summary to look for any errors
  1069. */
  1070. if (stat & 0x8000) {
  1071. sc->lmc_device->stats.tx_errors++;
  1072. if (stat & 0x4104)
  1073. sc->lmc_device->stats.tx_aborted_errors++;
  1074. if (stat & 0x0C00)
  1075. sc->lmc_device->stats.tx_carrier_errors++;
  1076. if (stat & 0x0200)
  1077. sc->lmc_device->stats.tx_window_errors++;
  1078. if (stat & 0x0002)
  1079. sc->lmc_device->stats.tx_fifo_errors++;
  1080. } else {
  1081. sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
  1082. sc->lmc_device->stats.tx_packets++;
  1083. }
  1084. // dev_kfree_skb(sc->lmc_txq[i]);
  1085. dev_kfree_skb_irq(sc->lmc_txq[i]);
  1086. sc->lmc_txq[i] = NULL;
  1087. badtx++;
  1088. i = badtx % LMC_TXDESCS;
  1089. }
  1090. if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
  1091. {
  1092. printk ("%s: out of sync pointer\n", dev->name);
  1093. badtx += LMC_TXDESCS;
  1094. }
  1095. LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
  1096. sc->lmc_txfull = 0;
  1097. netif_wake_queue(dev);
  1098. sc->extra_stats.tx_tbusy0++;
  1099. #ifdef DEBUG
  1100. sc->extra_stats.dirtyTx = badtx;
  1101. sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
  1102. sc->extra_stats.lmc_txfull = sc->lmc_txfull;
  1103. #endif
  1104. sc->lmc_taint_tx = badtx;
  1105. /*
  1106. * Why was there a break here???
  1107. */
  1108. } /* end handle transmit interrupt */
  1109. if (csr & TULIP_STS_SYSERROR) {
  1110. u32 error;
  1111. printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
  1112. error = csr>>23 & 0x7;
  1113. switch(error){
  1114. case 0x000:
  1115. printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
  1116. break;
  1117. case 0x001:
  1118. printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
  1119. break;
  1120. case 0x010:
  1121. printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
  1122. break;
  1123. default:
  1124. printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
  1125. }
  1126. lmc_dec_reset (sc);
  1127. lmc_reset (sc);
  1128. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1129. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1130. lmc_mii_readreg (sc, 0, 16),
  1131. lmc_mii_readreg (sc, 0, 17));
  1132. }
  1133. if(max_work-- <= 0)
  1134. break;
  1135. /*
  1136. * Get current csr status to make sure
  1137. * we've cleared all interrupts
  1138. */
  1139. csr = LMC_CSR_READ (sc, csr_status);
  1140. } /* end interrupt loop */
  1141. LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
  1142. lmc_int_fail_out:
  1143. spin_unlock(&sc->lmc_lock);
  1144. lmc_trace(dev, "lmc_interrupt out");
  1145. return IRQ_RETVAL(handled);
  1146. }
  1147. static int lmc_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1148. {
  1149. lmc_softc_t *sc = dev_to_sc(dev);
  1150. u32 flag;
  1151. int entry;
  1152. int ret = 0;
  1153. unsigned long flags;
  1154. lmc_trace(dev, "lmc_start_xmit in");
  1155. spin_lock_irqsave(&sc->lmc_lock, flags);
  1156. /* normal path, tbusy known to be zero */
  1157. entry = sc->lmc_next_tx % LMC_TXDESCS;
  1158. sc->lmc_txq[entry] = skb;
  1159. sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
  1160. LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
  1161. #ifndef GCOM
  1162. /* If the queue is less than half full, don't interrupt */
  1163. if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
  1164. {
  1165. /* Do not interrupt on completion of this packet */
  1166. flag = 0x60000000;
  1167. netif_wake_queue(dev);
  1168. }
  1169. else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
  1170. {
  1171. /* This generates an interrupt on completion of this packet */
  1172. flag = 0xe0000000;
  1173. netif_wake_queue(dev);
  1174. }
  1175. else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
  1176. {
  1177. /* Do not interrupt on completion of this packet */
  1178. flag = 0x60000000;
  1179. netif_wake_queue(dev);
  1180. }
  1181. else
  1182. {
  1183. /* This generates an interrupt on completion of this packet */
  1184. flag = 0xe0000000;
  1185. sc->lmc_txfull = 1;
  1186. netif_stop_queue(dev);
  1187. }
  1188. #else
  1189. flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
  1190. if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
  1191. { /* ring full, go busy */
  1192. sc->lmc_txfull = 1;
  1193. netif_stop_queue(dev);
  1194. sc->extra_stats.tx_tbusy1++;
  1195. LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
  1196. }
  1197. #endif
  1198. if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
  1199. flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
  1200. /* don't pad small packets either */
  1201. flag = sc->lmc_txring[entry].length = (skb->len) | flag |
  1202. sc->TxDescriptControlInit;
  1203. /* set the transmit timeout flag to be checked in
  1204. * the watchdog timer handler. -baz
  1205. */
  1206. sc->extra_stats.tx_NoCompleteCnt++;
  1207. sc->lmc_next_tx++;
  1208. /* give ownership to the chip */
  1209. LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
  1210. sc->lmc_txring[entry].status = 0x80000000;
  1211. /* send now! */
  1212. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1213. dev->trans_start = jiffies;
  1214. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1215. lmc_trace(dev, "lmc_start_xmit_out");
  1216. return ret;
  1217. }
  1218. static int lmc_rx(struct net_device *dev)
  1219. {
  1220. lmc_softc_t *sc = dev_to_sc(dev);
  1221. int i;
  1222. int rx_work_limit = LMC_RXDESCS;
  1223. unsigned int next_rx;
  1224. int rxIntLoopCnt; /* debug -baz */
  1225. int localLengthErrCnt = 0;
  1226. long stat;
  1227. struct sk_buff *skb, *nsb;
  1228. u16 len;
  1229. lmc_trace(dev, "lmc_rx in");
  1230. lmc_led_on(sc, LMC_DS3_LED3);
  1231. rxIntLoopCnt = 0; /* debug -baz */
  1232. i = sc->lmc_next_rx % LMC_RXDESCS;
  1233. next_rx = sc->lmc_next_rx;
  1234. while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
  1235. {
  1236. rxIntLoopCnt++; /* debug -baz */
  1237. len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
  1238. if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
  1239. if ((stat & 0x0000ffff) != 0x7fff) {
  1240. /* Oversized frame */
  1241. sc->lmc_device->stats.rx_length_errors++;
  1242. goto skip_packet;
  1243. }
  1244. }
  1245. if (stat & 0x00000008) { /* Catch a dribbling bit error */
  1246. sc->lmc_device->stats.rx_errors++;
  1247. sc->lmc_device->stats.rx_frame_errors++;
  1248. goto skip_packet;
  1249. }
  1250. if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
  1251. sc->lmc_device->stats.rx_errors++;
  1252. sc->lmc_device->stats.rx_crc_errors++;
  1253. goto skip_packet;
  1254. }
  1255. if (len > LMC_PKT_BUF_SZ) {
  1256. sc->lmc_device->stats.rx_length_errors++;
  1257. localLengthErrCnt++;
  1258. goto skip_packet;
  1259. }
  1260. if (len < sc->lmc_crcSize + 2) {
  1261. sc->lmc_device->stats.rx_length_errors++;
  1262. sc->extra_stats.rx_SmallPktCnt++;
  1263. localLengthErrCnt++;
  1264. goto skip_packet;
  1265. }
  1266. if(stat & 0x00004000){
  1267. printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
  1268. }
  1269. len -= sc->lmc_crcSize;
  1270. skb = sc->lmc_rxq[i];
  1271. /*
  1272. * We ran out of memory at some point
  1273. * just allocate an skb buff and continue.
  1274. */
  1275. if (!skb) {
  1276. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1277. if (nsb) {
  1278. sc->lmc_rxq[i] = nsb;
  1279. nsb->dev = dev;
  1280. sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
  1281. }
  1282. sc->failed_recv_alloc = 1;
  1283. goto skip_packet;
  1284. }
  1285. dev->last_rx = jiffies;
  1286. sc->lmc_device->stats.rx_packets++;
  1287. sc->lmc_device->stats.rx_bytes += len;
  1288. LMC_CONSOLE_LOG("recv", skb->data, len);
  1289. /*
  1290. * I'm not sure of the sanity of this
  1291. * Packets could be arriving at a constant
  1292. * 44.210mbits/sec and we're going to copy
  1293. * them into a new buffer??
  1294. */
  1295. if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
  1296. /*
  1297. * If it's a large packet don't copy it just hand it up
  1298. */
  1299. give_it_anyways:
  1300. sc->lmc_rxq[i] = NULL;
  1301. sc->lmc_rxring[i].buffer1 = 0x0;
  1302. skb_put (skb, len);
  1303. skb->protocol = lmc_proto_type(sc, skb);
  1304. skb_reset_mac_header(skb);
  1305. /* skb_reset_network_header(skb); */
  1306. skb->dev = dev;
  1307. lmc_proto_netif(sc, skb);
  1308. /*
  1309. * This skb will be destroyed by the upper layers, make a new one
  1310. */
  1311. nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1312. if (nsb) {
  1313. sc->lmc_rxq[i] = nsb;
  1314. nsb->dev = dev;
  1315. sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
  1316. /* Transferred to 21140 below */
  1317. }
  1318. else {
  1319. /*
  1320. * We've run out of memory, stop trying to allocate
  1321. * memory and exit the interrupt handler
  1322. *
  1323. * The chip may run out of receivers and stop
  1324. * in which care we'll try to allocate the buffer
  1325. * again. (once a second)
  1326. */
  1327. sc->extra_stats.rx_BuffAllocErr++;
  1328. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1329. sc->failed_recv_alloc = 1;
  1330. goto skip_out_of_mem;
  1331. }
  1332. }
  1333. else {
  1334. nsb = dev_alloc_skb(len);
  1335. if(!nsb) {
  1336. goto give_it_anyways;
  1337. }
  1338. skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
  1339. nsb->protocol = lmc_proto_type(sc, skb);
  1340. skb_reset_mac_header(nsb);
  1341. /* skb_reset_network_header(nsb); */
  1342. nsb->dev = dev;
  1343. lmc_proto_netif(sc, nsb);
  1344. }
  1345. skip_packet:
  1346. LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
  1347. sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
  1348. sc->lmc_next_rx++;
  1349. i = sc->lmc_next_rx % LMC_RXDESCS;
  1350. rx_work_limit--;
  1351. if (rx_work_limit < 0)
  1352. break;
  1353. }
  1354. /* detect condition for LMC1000 where DSU cable attaches and fills
  1355. * descriptors with bogus packets
  1356. *
  1357. if (localLengthErrCnt > LMC_RXDESCS - 3) {
  1358. sc->extra_stats.rx_BadPktSurgeCnt++;
  1359. LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
  1360. sc->extra_stats.rx_BadPktSurgeCnt);
  1361. } */
  1362. /* save max count of receive descriptors serviced */
  1363. if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
  1364. sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
  1365. #ifdef DEBUG
  1366. if (rxIntLoopCnt == 0)
  1367. {
  1368. for (i = 0; i < LMC_RXDESCS; i++)
  1369. {
  1370. if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
  1371. != DESC_OWNED_BY_DC21X4)
  1372. {
  1373. rxIntLoopCnt++;
  1374. }
  1375. }
  1376. LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
  1377. }
  1378. #endif
  1379. lmc_led_off(sc, LMC_DS3_LED3);
  1380. skip_out_of_mem:
  1381. lmc_trace(dev, "lmc_rx out");
  1382. return 0;
  1383. }
  1384. static struct net_device_stats *lmc_get_stats(struct net_device *dev)
  1385. {
  1386. lmc_softc_t *sc = dev_to_sc(dev);
  1387. unsigned long flags;
  1388. lmc_trace(dev, "lmc_get_stats in");
  1389. spin_lock_irqsave(&sc->lmc_lock, flags);
  1390. sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
  1391. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1392. lmc_trace(dev, "lmc_get_stats out");
  1393. return &sc->lmc_device->stats;
  1394. }
  1395. static struct pci_driver lmc_driver = {
  1396. .name = "lmc",
  1397. .id_table = lmc_pci_tbl,
  1398. .probe = lmc_init_one,
  1399. .remove = __devexit_p(lmc_remove_one),
  1400. };
  1401. static int __init init_lmc(void)
  1402. {
  1403. return pci_register_driver(&lmc_driver);
  1404. }
  1405. static void __exit exit_lmc(void)
  1406. {
  1407. pci_unregister_driver(&lmc_driver);
  1408. }
  1409. module_init(init_lmc);
  1410. module_exit(exit_lmc);
  1411. unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
  1412. {
  1413. int i;
  1414. int command = (0xf6 << 10) | (devaddr << 5) | regno;
  1415. int retval = 0;
  1416. lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
  1417. LMC_MII_SYNC (sc);
  1418. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
  1419. for (i = 15; i >= 0; i--)
  1420. {
  1421. int dataval = (command & (1 << i)) ? 0x20000 : 0;
  1422. LMC_CSR_WRITE (sc, csr_9, dataval);
  1423. lmc_delay ();
  1424. /* __SLOW_DOWN_IO; */
  1425. LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
  1426. lmc_delay ();
  1427. /* __SLOW_DOWN_IO; */
  1428. }
  1429. lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
  1430. for (i = 19; i > 0; i--)
  1431. {
  1432. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1433. lmc_delay ();
  1434. /* __SLOW_DOWN_IO; */
  1435. retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
  1436. LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
  1437. lmc_delay ();
  1438. /* __SLOW_DOWN_IO; */
  1439. }
  1440. lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
  1441. return (retval >> 1) & 0xffff;
  1442. }
  1443. void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
  1444. {
  1445. int i = 32;
  1446. int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
  1447. lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
  1448. LMC_MII_SYNC (sc);
  1449. i = 31;
  1450. while (i >= 0)
  1451. {
  1452. int datav;
  1453. if (command & (1 << i))
  1454. datav = 0x20000;
  1455. else
  1456. datav = 0x00000;
  1457. LMC_CSR_WRITE (sc, csr_9, datav);
  1458. lmc_delay ();
  1459. /* __SLOW_DOWN_IO; */
  1460. LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
  1461. lmc_delay ();
  1462. /* __SLOW_DOWN_IO; */
  1463. i--;
  1464. }
  1465. i = 2;
  1466. while (i > 0)
  1467. {
  1468. LMC_CSR_WRITE (sc, csr_9, 0x40000);
  1469. lmc_delay ();
  1470. /* __SLOW_DOWN_IO; */
  1471. LMC_CSR_WRITE (sc, csr_9, 0x50000);
  1472. lmc_delay ();
  1473. /* __SLOW_DOWN_IO; */
  1474. i--;
  1475. }
  1476. lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
  1477. }
  1478. static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
  1479. {
  1480. int i;
  1481. lmc_trace(sc->lmc_device, "lmc_softreset in");
  1482. /* Initialize the receive rings and buffers. */
  1483. sc->lmc_txfull = 0;
  1484. sc->lmc_next_rx = 0;
  1485. sc->lmc_next_tx = 0;
  1486. sc->lmc_taint_rx = 0;
  1487. sc->lmc_taint_tx = 0;
  1488. /*
  1489. * Setup each one of the receiver buffers
  1490. * allocate an skbuff for each one, setup the descriptor table
  1491. * and point each buffer at the next one
  1492. */
  1493. for (i = 0; i < LMC_RXDESCS; i++)
  1494. {
  1495. struct sk_buff *skb;
  1496. if (sc->lmc_rxq[i] == NULL)
  1497. {
  1498. skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
  1499. if(skb == NULL){
  1500. printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
  1501. sc->failed_ring = 1;
  1502. break;
  1503. }
  1504. else{
  1505. sc->lmc_rxq[i] = skb;
  1506. }
  1507. }
  1508. else
  1509. {
  1510. skb = sc->lmc_rxq[i];
  1511. }
  1512. skb->dev = sc->lmc_device;
  1513. /* owned by 21140 */
  1514. sc->lmc_rxring[i].status = 0x80000000;
  1515. /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
  1516. sc->lmc_rxring[i].length = skb_tailroom(skb);
  1517. /* use to be tail which is dumb since you're thinking why write
  1518. * to the end of the packj,et but since there's nothing there tail == data
  1519. */
  1520. sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
  1521. /* This is fair since the structure is static and we have the next address */
  1522. sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
  1523. }
  1524. /*
  1525. * Sets end of ring
  1526. */
  1527. sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
  1528. sc->lmc_rxring[i - 1].buffer2 = virt_to_bus (&sc->lmc_rxring[0]); /* Point back to the start */
  1529. LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
  1530. /* Initialize the transmit rings and buffers */
  1531. for (i = 0; i < LMC_TXDESCS; i++)
  1532. {
  1533. if (sc->lmc_txq[i] != NULL){ /* have buffer */
  1534. dev_kfree_skb(sc->lmc_txq[i]); /* free it */
  1535. sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
  1536. }
  1537. sc->lmc_txq[i] = NULL;
  1538. sc->lmc_txring[i].status = 0x00000000;
  1539. sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
  1540. }
  1541. sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
  1542. LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
  1543. lmc_trace(sc->lmc_device, "lmc_softreset out");
  1544. }
  1545. void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
  1546. {
  1547. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
  1548. sc->lmc_gpio_io &= ~bits;
  1549. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1550. lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
  1551. }
  1552. void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
  1553. {
  1554. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
  1555. sc->lmc_gpio_io |= bits;
  1556. LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
  1557. lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
  1558. }
  1559. void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
  1560. {
  1561. lmc_trace(sc->lmc_device, "lmc_led_on in");
  1562. if((~sc->lmc_miireg16) & led){ /* Already on! */
  1563. lmc_trace(sc->lmc_device, "lmc_led_on aon out");
  1564. return;
  1565. }
  1566. sc->lmc_miireg16 &= ~led;
  1567. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1568. lmc_trace(sc->lmc_device, "lmc_led_on out");
  1569. }
  1570. void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
  1571. {
  1572. lmc_trace(sc->lmc_device, "lmc_led_off in");
  1573. if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
  1574. lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
  1575. return;
  1576. }
  1577. sc->lmc_miireg16 |= led;
  1578. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1579. lmc_trace(sc->lmc_device, "lmc_led_off out");
  1580. }
  1581. static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
  1582. {
  1583. lmc_trace(sc->lmc_device, "lmc_reset in");
  1584. sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
  1585. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1586. sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
  1587. lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
  1588. /*
  1589. * make some of the GPIO pins be outputs
  1590. */
  1591. lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
  1592. /*
  1593. * RESET low to force state reset. This also forces
  1594. * the transmitter clock to be internal, but we expect to reset
  1595. * that later anyway.
  1596. */
  1597. sc->lmc_gpio &= ~(LMC_GEP_RESET);
  1598. LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
  1599. /*
  1600. * hold for more than 10 microseconds
  1601. */
  1602. udelay(50);
  1603. /*
  1604. * stop driving Xilinx-related signals
  1605. */
  1606. lmc_gpio_mkinput(sc, LMC_GEP_RESET);
  1607. /*
  1608. * Call media specific init routine
  1609. */
  1610. sc->lmc_media->init(sc);
  1611. sc->extra_stats.resetCount++;
  1612. lmc_trace(sc->lmc_device, "lmc_reset out");
  1613. }
  1614. static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
  1615. {
  1616. u32 val;
  1617. lmc_trace(sc->lmc_device, "lmc_dec_reset in");
  1618. /*
  1619. * disable all interrupts
  1620. */
  1621. sc->lmc_intrmask = 0;
  1622. LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
  1623. /*
  1624. * Reset the chip with a software reset command.
  1625. * Wait 10 microseconds (actually 50 PCI cycles but at
  1626. * 33MHz that comes to two microseconds but wait a
  1627. * bit longer anyways)
  1628. */
  1629. LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
  1630. udelay(25);
  1631. #ifdef __sparc__
  1632. sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
  1633. sc->lmc_busmode = 0x00100000;
  1634. sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
  1635. LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
  1636. #endif
  1637. sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
  1638. /*
  1639. * We want:
  1640. * no ethernet address in frames we write
  1641. * disable padding (txdesc, padding disable)
  1642. * ignore runt frames (rdes0 bit 15)
  1643. * no receiver watchdog or transmitter jabber timer
  1644. * (csr15 bit 0,14 == 1)
  1645. * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
  1646. */
  1647. sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
  1648. | TULIP_CMD_FULLDUPLEX
  1649. | TULIP_CMD_PASSBADPKT
  1650. | TULIP_CMD_NOHEARTBEAT
  1651. | TULIP_CMD_PORTSELECT
  1652. | TULIP_CMD_RECEIVEALL
  1653. | TULIP_CMD_MUSTBEONE
  1654. );
  1655. sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
  1656. | TULIP_CMD_THRESHOLDCTL
  1657. | TULIP_CMD_STOREFWD
  1658. | TULIP_CMD_TXTHRSHLDCTL
  1659. );
  1660. LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
  1661. /*
  1662. * disable receiver watchdog and transmit jabber
  1663. */
  1664. val = LMC_CSR_READ(sc, csr_sia_general);
  1665. val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
  1666. LMC_CSR_WRITE(sc, csr_sia_general, val);
  1667. lmc_trace(sc->lmc_device, "lmc_dec_reset out");
  1668. }
  1669. static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
  1670. size_t csr_size)
  1671. {
  1672. lmc_trace(sc->lmc_device, "lmc_initcsrs in");
  1673. sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
  1674. sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
  1675. sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
  1676. sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
  1677. sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
  1678. sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
  1679. sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
  1680. sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
  1681. sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
  1682. sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
  1683. sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
  1684. sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
  1685. sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
  1686. sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
  1687. sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
  1688. sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
  1689. lmc_trace(sc->lmc_device, "lmc_initcsrs out");
  1690. }
  1691. static void lmc_driver_timeout(struct net_device *dev)
  1692. {
  1693. lmc_softc_t *sc = dev_to_sc(dev);
  1694. u32 csr6;
  1695. unsigned long flags;
  1696. lmc_trace(dev, "lmc_driver_timeout in");
  1697. spin_lock_irqsave(&sc->lmc_lock, flags);
  1698. printk("%s: Xmitter busy|\n", dev->name);
  1699. sc->extra_stats.tx_tbusy_calls++;
  1700. if (jiffies - dev->trans_start < TX_TIMEOUT)
  1701. goto bug_out;
  1702. /*
  1703. * Chip seems to have locked up
  1704. * Reset it
  1705. * This whips out all our decriptor
  1706. * table and starts from scartch
  1707. */
  1708. LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
  1709. LMC_CSR_READ (sc, csr_status),
  1710. sc->extra_stats.tx_ProcTimeout);
  1711. lmc_running_reset (dev);
  1712. LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
  1713. LMC_EVENT_LOG(LMC_EVENT_RESET2,
  1714. lmc_mii_readreg (sc, 0, 16),
  1715. lmc_mii_readreg (sc, 0, 17));
  1716. /* restart the tx processes */
  1717. csr6 = LMC_CSR_READ (sc, csr_command);
  1718. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
  1719. LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
  1720. /* immediate transmit */
  1721. LMC_CSR_WRITE (sc, csr_txpoll, 0);
  1722. sc->lmc_device->stats.tx_errors++;
  1723. sc->extra_stats.tx_ProcTimeout++; /* -baz */
  1724. dev->trans_start = jiffies;
  1725. bug_out:
  1726. spin_unlock_irqrestore(&sc->lmc_lock, flags);
  1727. lmc_trace(dev, "lmc_driver_timout out");
  1728. }