edb7312.c 5.1 KB

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  1. /*
  2. * drivers/mtd/nand/edb7312.c
  3. *
  4. * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
  5. *
  6. * Derived from drivers/mtd/nand/autcpu12.c
  7. * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * Overview:
  14. * This is a device driver for the NAND flash device found on the
  15. * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
  16. * a 64Mibit (8MiB x 8 bits) NAND flash device.
  17. */
  18. #include <linux/slab.h>
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/nand.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <asm/io.h>
  25. #include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
  26. #include <asm/sizes.h>
  27. #include <asm/hardware/clps7111.h>
  28. /*
  29. * MTD structure for EDB7312 board
  30. */
  31. static struct mtd_info *ep7312_mtd = NULL;
  32. /*
  33. * Values specific to the EDB7312 board (used with EP7312 processor)
  34. */
  35. #define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
  36. #define EP7312_PXDR 0x0001 /*
  37. * IO offset to Port B data register
  38. * where the CLE, ALE and NCE pins
  39. * are wired to.
  40. */
  41. #define EP7312_PXDDR 0x0041 /*
  42. * IO offset to Port B data direction
  43. * register so we can control the IO
  44. * lines.
  45. */
  46. /*
  47. * Module stuff
  48. */
  49. static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
  50. static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
  51. static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
  52. #ifdef CONFIG_MTD_PARTITIONS
  53. /*
  54. * Define static partitions for flash device
  55. */
  56. static struct mtd_partition partition_info[] = {
  57. {.name = "EP7312 Nand Flash",
  58. .offset = 0,
  59. .size = 8 * 1024 * 1024}
  60. };
  61. #define NUM_PARTITIONS 1
  62. #endif
  63. /*
  64. * hardware specific access to control-lines
  65. *
  66. * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
  67. * NAND_CLE: bit 1 -> bit 4
  68. * NAND_ALE: bit 2 -> bit 5
  69. */
  70. static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  71. {
  72. struct nand_chip *chip = mtd->priv;
  73. if (ctrl & NAND_CTRL_CHANGE) {
  74. unsigned char bits = 0x80;
  75. bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
  76. bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
  77. clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
  78. ep7312_pxdr);
  79. }
  80. if (cmd != NAND_CMD_NONE)
  81. writeb(cmd, chip->IO_ADDR_W);
  82. }
  83. /*
  84. * read device ready pin
  85. */
  86. static int ep7312_device_ready(struct mtd_info *mtd)
  87. {
  88. return 1;
  89. }
  90. #ifdef CONFIG_MTD_PARTITIONS
  91. const char *part_probes[] = { "cmdlinepart", NULL };
  92. #endif
  93. /*
  94. * Main initialization routine
  95. */
  96. static int __init ep7312_init(void)
  97. {
  98. struct nand_chip *this;
  99. const char *part_type = 0;
  100. int mtd_parts_nb = 0;
  101. struct mtd_partition *mtd_parts = 0;
  102. void __iomem *ep7312_fio_base;
  103. /* Allocate memory for MTD device structure and private data */
  104. ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
  105. if (!ep7312_mtd) {
  106. printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
  107. return -ENOMEM;
  108. }
  109. /* map physical address */
  110. ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
  111. if (!ep7312_fio_base) {
  112. printk("ioremap EDB7312 NAND flash failed\n");
  113. kfree(ep7312_mtd);
  114. return -EIO;
  115. }
  116. /* Get pointer to private data */
  117. this = (struct nand_chip *)(&ep7312_mtd[1]);
  118. /* Initialize structures */
  119. memset(ep7312_mtd, 0, sizeof(struct mtd_info));
  120. memset(this, 0, sizeof(struct nand_chip));
  121. /* Link the private data with the MTD structure */
  122. ep7312_mtd->priv = this;
  123. ep7312_mtd->owner = THIS_MODULE;
  124. /*
  125. * Set GPIO Port B control register so that the pins are configured
  126. * to be outputs for controlling the NAND flash.
  127. */
  128. clps_writeb(0xf0, ep7312_pxddr);
  129. /* insert callbacks */
  130. this->IO_ADDR_R = ep7312_fio_base;
  131. this->IO_ADDR_W = ep7312_fio_base;
  132. this->cmd_ctrl = ep7312_hwcontrol;
  133. this->dev_ready = ep7312_device_ready;
  134. /* 15 us command delay time */
  135. this->chip_delay = 15;
  136. /* Scan to find existence of the device */
  137. if (nand_scan(ep7312_mtd, 1)) {
  138. iounmap((void *)ep7312_fio_base);
  139. kfree(ep7312_mtd);
  140. return -ENXIO;
  141. }
  142. #ifdef CONFIG_MTD_PARTITIONS
  143. ep7312_mtd->name = "edb7312-nand";
  144. mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
  145. if (mtd_parts_nb > 0)
  146. part_type = "command line";
  147. else
  148. mtd_parts_nb = 0;
  149. #endif
  150. if (mtd_parts_nb == 0) {
  151. mtd_parts = partition_info;
  152. mtd_parts_nb = NUM_PARTITIONS;
  153. part_type = "static";
  154. }
  155. /* Register the partitions */
  156. printk(KERN_NOTICE "Using %s partition definition\n", part_type);
  157. add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb);
  158. /* Return happy */
  159. return 0;
  160. }
  161. module_init(ep7312_init);
  162. /*
  163. * Clean up routine
  164. */
  165. static void __exit ep7312_cleanup(void)
  166. {
  167. struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
  168. /* Release resources, unregister device */
  169. nand_release(ap7312_mtd);
  170. /* Release io resource */
  171. iounmap(this->IO_ADDR_R);
  172. /* Free the MTD device structure */
  173. kfree(ep7312_mtd);
  174. }
  175. module_exit(ep7312_cleanup);
  176. MODULE_LICENSE("GPL");
  177. MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
  178. MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");