sdhci-pci.c 17 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/mmc/host.h>
  19. #include <asm/scatterlist.h>
  20. #include <asm/io.h>
  21. #include "sdhci.h"
  22. /*
  23. * PCI registers
  24. */
  25. #define PCI_SDHCI_IFPIO 0x00
  26. #define PCI_SDHCI_IFDMA 0x01
  27. #define PCI_SDHCI_IFVENDOR 0x02
  28. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  29. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  30. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  31. #define MAX_SLOTS 8
  32. struct sdhci_pci_chip;
  33. struct sdhci_pci_slot;
  34. struct sdhci_pci_fixes {
  35. unsigned int quirks;
  36. int (*probe)(struct sdhci_pci_chip*);
  37. int (*probe_slot)(struct sdhci_pci_slot*);
  38. void (*remove_slot)(struct sdhci_pci_slot*, int);
  39. int (*suspend)(struct sdhci_pci_chip*,
  40. pm_message_t);
  41. int (*resume)(struct sdhci_pci_chip*);
  42. };
  43. struct sdhci_pci_slot {
  44. struct sdhci_pci_chip *chip;
  45. struct sdhci_host *host;
  46. int pci_bar;
  47. };
  48. struct sdhci_pci_chip {
  49. struct pci_dev *pdev;
  50. unsigned int quirks;
  51. const struct sdhci_pci_fixes *fixes;
  52. int num_slots; /* Slots on controller */
  53. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  54. };
  55. /*****************************************************************************\
  56. * *
  57. * Hardware specific quirk handling *
  58. * *
  59. \*****************************************************************************/
  60. static int ricoh_probe(struct sdhci_pci_chip *chip)
  61. {
  62. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM)
  63. chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET;
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)
  65. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  66. return 0;
  67. }
  68. static const struct sdhci_pci_fixes sdhci_ricoh = {
  69. .probe = ricoh_probe,
  70. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR,
  71. };
  72. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  73. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  74. SDHCI_QUIRK_BROKEN_DMA,
  75. };
  76. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  77. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  78. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  79. SDHCI_QUIRK_BROKEN_DMA,
  80. };
  81. static const struct sdhci_pci_fixes sdhci_cafe = {
  82. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  83. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  84. };
  85. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  86. {
  87. u8 scratch;
  88. int ret;
  89. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  90. if (ret)
  91. return ret;
  92. /*
  93. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  94. * [bit 1:2] and enable over current debouncing [bit 6].
  95. */
  96. if (on)
  97. scratch |= 0x47;
  98. else
  99. scratch &= ~0x47;
  100. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  101. if (ret)
  102. return ret;
  103. return 0;
  104. }
  105. static int jmicron_probe(struct sdhci_pci_chip *chip)
  106. {
  107. int ret;
  108. if (chip->pdev->revision == 0) {
  109. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  110. SDHCI_QUIRK_32BIT_DMA_SIZE |
  111. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  112. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  113. SDHCI_QUIRK_BROKEN_SMALL_PIO;
  114. }
  115. /*
  116. * JMicron chips can have two interfaces to the same hardware
  117. * in order to work around limitations in Microsoft's driver.
  118. * We need to make sure we only bind to one of them.
  119. *
  120. * This code assumes two things:
  121. *
  122. * 1. The PCI code adds subfunctions in order.
  123. *
  124. * 2. The MMC interface has a lower subfunction number
  125. * than the SD interface.
  126. */
  127. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  128. struct pci_dev *sd_dev;
  129. sd_dev = NULL;
  130. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  131. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  132. if ((PCI_SLOT(chip->pdev->devfn) ==
  133. PCI_SLOT(sd_dev->devfn)) &&
  134. (chip->pdev->bus == sd_dev->bus))
  135. break;
  136. }
  137. if (sd_dev) {
  138. pci_dev_put(sd_dev);
  139. dev_info(&chip->pdev->dev, "Refusing to bind to "
  140. "secondary interface.\n");
  141. return -ENODEV;
  142. }
  143. }
  144. /*
  145. * JMicron chips need a bit of a nudge to enable the power
  146. * output pins.
  147. */
  148. ret = jmicron_pmos(chip, 1);
  149. if (ret) {
  150. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  151. return ret;
  152. }
  153. return 0;
  154. }
  155. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  156. {
  157. u8 scratch;
  158. scratch = readb(host->ioaddr + 0xC0);
  159. if (on)
  160. scratch |= 0x01;
  161. else
  162. scratch &= ~0x01;
  163. writeb(scratch, host->ioaddr + 0xC0);
  164. }
  165. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  166. {
  167. if (slot->chip->pdev->revision == 0) {
  168. u16 version;
  169. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  170. version = (version & SDHCI_VENDOR_VER_MASK) >>
  171. SDHCI_VENDOR_VER_SHIFT;
  172. /*
  173. * Older versions of the chip have lots of nasty glitches
  174. * in the ADMA engine. It's best just to avoid it
  175. * completely.
  176. */
  177. if (version < 0xAC)
  178. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  179. }
  180. /*
  181. * The secondary interface requires a bit set to get the
  182. * interrupts.
  183. */
  184. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  185. jmicron_enable_mmc(slot->host, 1);
  186. return 0;
  187. }
  188. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  189. {
  190. if (dead)
  191. return;
  192. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  193. jmicron_enable_mmc(slot->host, 0);
  194. }
  195. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  196. {
  197. int i;
  198. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  199. for (i = 0;i < chip->num_slots;i++)
  200. jmicron_enable_mmc(chip->slots[i]->host, 0);
  201. }
  202. return 0;
  203. }
  204. static int jmicron_resume(struct sdhci_pci_chip *chip)
  205. {
  206. int ret, i;
  207. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  208. for (i = 0;i < chip->num_slots;i++)
  209. jmicron_enable_mmc(chip->slots[i]->host, 1);
  210. }
  211. ret = jmicron_pmos(chip, 1);
  212. if (ret) {
  213. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  214. return ret;
  215. }
  216. return 0;
  217. }
  218. static const struct sdhci_pci_fixes sdhci_jmicron = {
  219. .probe = jmicron_probe,
  220. .probe_slot = jmicron_probe_slot,
  221. .remove_slot = jmicron_remove_slot,
  222. .suspend = jmicron_suspend,
  223. .resume = jmicron_resume,
  224. };
  225. static const struct pci_device_id pci_ids[] __devinitdata = {
  226. {
  227. .vendor = PCI_VENDOR_ID_RICOH,
  228. .device = PCI_DEVICE_ID_RICOH_R5C822,
  229. .subvendor = PCI_ANY_ID,
  230. .subdevice = PCI_ANY_ID,
  231. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  232. },
  233. {
  234. .vendor = PCI_VENDOR_ID_ENE,
  235. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  236. .subvendor = PCI_ANY_ID,
  237. .subdevice = PCI_ANY_ID,
  238. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  239. },
  240. {
  241. .vendor = PCI_VENDOR_ID_ENE,
  242. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  243. .subvendor = PCI_ANY_ID,
  244. .subdevice = PCI_ANY_ID,
  245. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  246. },
  247. {
  248. .vendor = PCI_VENDOR_ID_ENE,
  249. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  250. .subvendor = PCI_ANY_ID,
  251. .subdevice = PCI_ANY_ID,
  252. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  253. },
  254. {
  255. .vendor = PCI_VENDOR_ID_ENE,
  256. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  257. .subvendor = PCI_ANY_ID,
  258. .subdevice = PCI_ANY_ID,
  259. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  260. },
  261. {
  262. .vendor = PCI_VENDOR_ID_MARVELL,
  263. .device = PCI_DEVICE_ID_MARVELL_CAFE_SD,
  264. .subvendor = PCI_ANY_ID,
  265. .subdevice = PCI_ANY_ID,
  266. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  267. },
  268. {
  269. .vendor = PCI_VENDOR_ID_JMICRON,
  270. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  271. .subvendor = PCI_ANY_ID,
  272. .subdevice = PCI_ANY_ID,
  273. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  274. },
  275. {
  276. .vendor = PCI_VENDOR_ID_JMICRON,
  277. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  278. .subvendor = PCI_ANY_ID,
  279. .subdevice = PCI_ANY_ID,
  280. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  281. },
  282. { /* Generic SD host controller */
  283. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  284. },
  285. { /* end: all zeroes */ },
  286. };
  287. MODULE_DEVICE_TABLE(pci, pci_ids);
  288. /*****************************************************************************\
  289. * *
  290. * SDHCI core callbacks *
  291. * *
  292. \*****************************************************************************/
  293. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  294. {
  295. struct sdhci_pci_slot *slot;
  296. struct pci_dev *pdev;
  297. int ret;
  298. slot = sdhci_priv(host);
  299. pdev = slot->chip->pdev;
  300. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  301. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  302. (host->flags & SDHCI_USE_DMA)) {
  303. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  304. "doesn't fully claim to support it.\n");
  305. }
  306. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  307. if (ret)
  308. return ret;
  309. pci_set_master(pdev);
  310. return 0;
  311. }
  312. static struct sdhci_ops sdhci_pci_ops = {
  313. .enable_dma = sdhci_pci_enable_dma,
  314. };
  315. /*****************************************************************************\
  316. * *
  317. * Suspend/resume *
  318. * *
  319. \*****************************************************************************/
  320. #ifdef CONFIG_PM
  321. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  322. {
  323. struct sdhci_pci_chip *chip;
  324. struct sdhci_pci_slot *slot;
  325. int i, ret;
  326. chip = pci_get_drvdata(pdev);
  327. if (!chip)
  328. return 0;
  329. for (i = 0;i < chip->num_slots;i++) {
  330. slot = chip->slots[i];
  331. if (!slot)
  332. continue;
  333. ret = sdhci_suspend_host(slot->host, state);
  334. if (ret) {
  335. for (i--;i >= 0;i--)
  336. sdhci_resume_host(chip->slots[i]->host);
  337. return ret;
  338. }
  339. }
  340. if (chip->fixes && chip->fixes->suspend) {
  341. ret = chip->fixes->suspend(chip, state);
  342. if (ret) {
  343. for (i = chip->num_slots - 1;i >= 0;i--)
  344. sdhci_resume_host(chip->slots[i]->host);
  345. return ret;
  346. }
  347. }
  348. pci_save_state(pdev);
  349. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  350. pci_disable_device(pdev);
  351. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  352. return 0;
  353. }
  354. static int sdhci_pci_resume (struct pci_dev *pdev)
  355. {
  356. struct sdhci_pci_chip *chip;
  357. struct sdhci_pci_slot *slot;
  358. int i, ret;
  359. chip = pci_get_drvdata(pdev);
  360. if (!chip)
  361. return 0;
  362. pci_set_power_state(pdev, PCI_D0);
  363. pci_restore_state(pdev);
  364. ret = pci_enable_device(pdev);
  365. if (ret)
  366. return ret;
  367. if (chip->fixes && chip->fixes->resume) {
  368. ret = chip->fixes->resume(chip);
  369. if (ret)
  370. return ret;
  371. }
  372. for (i = 0;i < chip->num_slots;i++) {
  373. slot = chip->slots[i];
  374. if (!slot)
  375. continue;
  376. ret = sdhci_resume_host(slot->host);
  377. if (ret)
  378. return ret;
  379. }
  380. return 0;
  381. }
  382. #else /* CONFIG_PM */
  383. #define sdhci_pci_suspend NULL
  384. #define sdhci_pci_resume NULL
  385. #endif /* CONFIG_PM */
  386. /*****************************************************************************\
  387. * *
  388. * Device probing/removal *
  389. * *
  390. \*****************************************************************************/
  391. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  392. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  393. {
  394. struct sdhci_pci_slot *slot;
  395. struct sdhci_host *host;
  396. resource_size_t addr;
  397. int ret;
  398. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  399. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  400. return ERR_PTR(-ENODEV);
  401. }
  402. if (pci_resource_len(pdev, bar) != 0x100) {
  403. dev_err(&pdev->dev, "Invalid iomem size. You may "
  404. "experience problems.\n");
  405. }
  406. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  407. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  408. return ERR_PTR(-ENODEV);
  409. }
  410. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  411. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  412. return ERR_PTR(-ENODEV);
  413. }
  414. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  415. if (IS_ERR(host)) {
  416. ret = PTR_ERR(host);
  417. goto unmap;
  418. }
  419. slot = sdhci_priv(host);
  420. slot->chip = chip;
  421. slot->host = host;
  422. slot->pci_bar = bar;
  423. host->hw_name = "PCI";
  424. host->ops = &sdhci_pci_ops;
  425. host->quirks = chip->quirks;
  426. host->irq = pdev->irq;
  427. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  428. if (ret) {
  429. dev_err(&pdev->dev, "cannot request region\n");
  430. return ERR_PTR(ret);
  431. }
  432. addr = pci_resource_start(pdev, bar);
  433. host->ioaddr = ioremap_nocache(addr, pci_resource_len(pdev, bar));
  434. if (!host->ioaddr) {
  435. dev_err(&pdev->dev, "failed to remap registers\n");
  436. goto release;
  437. }
  438. if (chip->fixes && chip->fixes->probe_slot) {
  439. ret = chip->fixes->probe_slot(slot);
  440. if (ret)
  441. goto unmap;
  442. }
  443. ret = sdhci_add_host(host);
  444. if (ret)
  445. goto remove;
  446. return slot;
  447. remove:
  448. if (chip->fixes && chip->fixes->remove_slot)
  449. chip->fixes->remove_slot(slot, 0);
  450. unmap:
  451. iounmap(host->ioaddr);
  452. release:
  453. pci_release_region(pdev, bar);
  454. sdhci_free_host(host);
  455. return ERR_PTR(ret);
  456. }
  457. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  458. {
  459. int dead;
  460. u32 scratch;
  461. dead = 0;
  462. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  463. if (scratch == (u32)-1)
  464. dead = 1;
  465. sdhci_remove_host(slot->host, dead);
  466. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  467. slot->chip->fixes->remove_slot(slot, dead);
  468. pci_release_region(slot->chip->pdev, slot->pci_bar);
  469. sdhci_free_host(slot->host);
  470. }
  471. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  472. const struct pci_device_id *ent)
  473. {
  474. struct sdhci_pci_chip *chip;
  475. struct sdhci_pci_slot *slot;
  476. u8 slots, rev, first_bar;
  477. int ret, i;
  478. BUG_ON(pdev == NULL);
  479. BUG_ON(ent == NULL);
  480. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  481. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  482. (int)pdev->vendor, (int)pdev->device, (int)rev);
  483. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  484. if (ret)
  485. return ret;
  486. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  487. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  488. if (slots == 0)
  489. return -ENODEV;
  490. BUG_ON(slots > MAX_SLOTS);
  491. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  492. if (ret)
  493. return ret;
  494. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  495. if (first_bar > 5) {
  496. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  497. return -ENODEV;
  498. }
  499. ret = pci_enable_device(pdev);
  500. if (ret)
  501. return ret;
  502. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  503. if (!chip) {
  504. ret = -ENOMEM;
  505. goto err;
  506. }
  507. chip->pdev = pdev;
  508. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  509. if (chip->fixes)
  510. chip->quirks = chip->fixes->quirks;
  511. chip->num_slots = slots;
  512. pci_set_drvdata(pdev, chip);
  513. if (chip->fixes && chip->fixes->probe) {
  514. ret = chip->fixes->probe(chip);
  515. if (ret)
  516. goto free;
  517. }
  518. for (i = 0;i < slots;i++) {
  519. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  520. if (IS_ERR(slot)) {
  521. for (i--;i >= 0;i--)
  522. sdhci_pci_remove_slot(chip->slots[i]);
  523. ret = PTR_ERR(slot);
  524. goto free;
  525. }
  526. chip->slots[i] = slot;
  527. }
  528. return 0;
  529. free:
  530. pci_set_drvdata(pdev, NULL);
  531. kfree(chip);
  532. err:
  533. pci_disable_device(pdev);
  534. return ret;
  535. }
  536. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  537. {
  538. int i;
  539. struct sdhci_pci_chip *chip;
  540. chip = pci_get_drvdata(pdev);
  541. if (chip) {
  542. for (i = 0;i < chip->num_slots; i++)
  543. sdhci_pci_remove_slot(chip->slots[i]);
  544. pci_set_drvdata(pdev, NULL);
  545. kfree(chip);
  546. }
  547. pci_disable_device(pdev);
  548. }
  549. static struct pci_driver sdhci_driver = {
  550. .name = "sdhci-pci",
  551. .id_table = pci_ids,
  552. .probe = sdhci_pci_probe,
  553. .remove = __devexit_p(sdhci_pci_remove),
  554. .suspend = sdhci_pci_suspend,
  555. .resume = sdhci_pci_resume,
  556. };
  557. /*****************************************************************************\
  558. * *
  559. * Driver init/exit *
  560. * *
  561. \*****************************************************************************/
  562. static int __init sdhci_drv_init(void)
  563. {
  564. return pci_register_driver(&sdhci_driver);
  565. }
  566. static void __exit sdhci_drv_exit(void)
  567. {
  568. pci_unregister_driver(&sdhci_driver);
  569. }
  570. module_init(sdhci_drv_init);
  571. module_exit(sdhci_drv_exit);
  572. MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
  573. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  574. MODULE_LICENSE("GPL");