grufault.c 16 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <asm/pgtable.h>
  35. #include "gru.h"
  36. #include "grutables.h"
  37. #include "grulib.h"
  38. #include "gru_instructions.h"
  39. #include <asm/uv/uv_hub.h>
  40. /*
  41. * Test if a physical address is a valid GRU GSEG address
  42. */
  43. static inline int is_gru_paddr(unsigned long paddr)
  44. {
  45. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  46. }
  47. /*
  48. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  49. */
  50. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  51. {
  52. struct vm_area_struct *vma;
  53. vma = find_vma(current->mm, vaddr);
  54. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  55. return vma;
  56. return NULL;
  57. }
  58. /*
  59. * Find and lock the gts that contains the specified user vaddr.
  60. *
  61. * Returns:
  62. * - *gts with the mmap_sem locked for read and the GTS locked.
  63. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  64. */
  65. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  66. {
  67. struct mm_struct *mm = current->mm;
  68. struct vm_area_struct *vma;
  69. struct gru_thread_state *gts = NULL;
  70. down_read(&mm->mmap_sem);
  71. vma = gru_find_vma(vaddr);
  72. if (vma)
  73. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  74. if (gts)
  75. mutex_lock(&gts->ts_ctxlock);
  76. else
  77. up_read(&mm->mmap_sem);
  78. return gts;
  79. }
  80. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  81. {
  82. struct mm_struct *mm = current->mm;
  83. struct vm_area_struct *vma;
  84. struct gru_thread_state *gts = NULL;
  85. down_write(&mm->mmap_sem);
  86. vma = gru_find_vma(vaddr);
  87. if (vma)
  88. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  89. if (gts) {
  90. mutex_lock(&gts->ts_ctxlock);
  91. downgrade_write(&mm->mmap_sem);
  92. } else {
  93. up_write(&mm->mmap_sem);
  94. }
  95. return gts;
  96. }
  97. /*
  98. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  99. */
  100. static void gru_unlock_gts(struct gru_thread_state *gts)
  101. {
  102. mutex_unlock(&gts->ts_ctxlock);
  103. up_read(&current->mm->mmap_sem);
  104. }
  105. /*
  106. * Set a CB.istatus to active using a user virtual address. This must be done
  107. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  108. * If the line is evicted, the status may be lost. The in-cache update
  109. * is necessary to prevent the user from seeing a stale cb.istatus that will
  110. * change as soon as the TFH restart is complete. Races may cause an
  111. * occasional failure to clear the cb.istatus, but that is ok.
  112. *
  113. * If the cb address is not valid (should not happen, but...), nothing
  114. * bad will happen.. The get_user()/put_user() will fail but there
  115. * are no bad side-effects.
  116. */
  117. static void gru_cb_set_istatus_active(unsigned long __user *cb)
  118. {
  119. union {
  120. struct gru_instruction_bits bits;
  121. unsigned long dw;
  122. } u;
  123. if (cb) {
  124. get_user(u.dw, cb);
  125. u.bits.istatus = CBS_ACTIVE;
  126. put_user(u.dw, cb);
  127. }
  128. }
  129. /*
  130. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  131. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  132. * GRU (except for headless blades which are not currently supported). A blade
  133. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  134. * number uniquely identifies the GRU chiplet on the local blade that caused the
  135. * interrupt. Always called in interrupt context.
  136. */
  137. static inline struct gru_state *irq_to_gru(int irq)
  138. {
  139. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  140. }
  141. /*
  142. * Read & clear a TFM
  143. *
  144. * The GRU has an array of fault maps. A map is private to a cpu
  145. * Only one cpu will be accessing a cpu's fault map.
  146. *
  147. * This function scans the cpu-private fault map & clears all bits that
  148. * are set. The function returns a bitmap that indicates the bits that
  149. * were cleared. Note that sense the maps may be updated asynchronously by
  150. * the GRU, atomic operations must be used to clear bits.
  151. */
  152. static void get_clear_fault_map(struct gru_state *gru,
  153. struct gru_tlb_fault_map *map)
  154. {
  155. unsigned long i, k;
  156. struct gru_tlb_fault_map *tfm;
  157. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  158. prefetchw(tfm); /* Helps on hardware, required for emulator */
  159. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  160. k = tfm->fault_bits[i];
  161. if (k)
  162. k = xchg(&tfm->fault_bits[i], 0UL);
  163. map->fault_bits[i] = k;
  164. }
  165. /*
  166. * Not functionally required but helps performance. (Required
  167. * on emulator)
  168. */
  169. gru_flush_cache(tfm);
  170. }
  171. /*
  172. * Atomic (interrupt context) & non-atomic (user context) functions to
  173. * convert a vaddr into a physical address. The size of the page
  174. * is returned in pageshift.
  175. * returns:
  176. * 0 - successful
  177. * < 0 - error code
  178. * 1 - (atomic only) try again in non-atomic context
  179. */
  180. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  181. unsigned long vaddr, int write,
  182. unsigned long *paddr, int *pageshift)
  183. {
  184. struct page *page;
  185. /* ZZZ Need to handle HUGE pages */
  186. if (is_vm_hugetlb_page(vma))
  187. return -EFAULT;
  188. *pageshift = PAGE_SHIFT;
  189. if (get_user_pages
  190. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  191. return -EFAULT;
  192. *paddr = page_to_phys(page);
  193. put_page(page);
  194. return 0;
  195. }
  196. /*
  197. *
  198. * atomic_pte_lookup
  199. *
  200. * Convert a user virtual address to a physical address
  201. * Only supports Intel large pages (2MB only) on x86_64.
  202. * ZZZ - hugepage support is incomplete
  203. */
  204. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  205. int write, unsigned long *paddr, int *pageshift)
  206. {
  207. pgd_t *pgdp;
  208. pmd_t *pmdp;
  209. pud_t *pudp;
  210. pte_t pte;
  211. WARN_ON(irqs_disabled()); /* ZZZ debug */
  212. local_irq_disable();
  213. pgdp = pgd_offset(vma->vm_mm, vaddr);
  214. if (unlikely(pgd_none(*pgdp)))
  215. goto err;
  216. pudp = pud_offset(pgdp, vaddr);
  217. if (unlikely(pud_none(*pudp)))
  218. goto err;
  219. pmdp = pmd_offset(pudp, vaddr);
  220. if (unlikely(pmd_none(*pmdp)))
  221. goto err;
  222. #ifdef CONFIG_X86_64
  223. if (unlikely(pmd_large(*pmdp)))
  224. pte = *(pte_t *) pmdp;
  225. else
  226. #endif
  227. pte = *pte_offset_kernel(pmdp, vaddr);
  228. local_irq_enable();
  229. if (unlikely(!pte_present(pte) ||
  230. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  231. return 1;
  232. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  233. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  234. return 0;
  235. err:
  236. local_irq_enable();
  237. return 1;
  238. }
  239. /*
  240. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  241. * Input:
  242. * cb Address of user CBR. Null if not running in user context
  243. * Return:
  244. * 0 = dropin, exception, or switch to UPM successful
  245. * 1 = range invalidate active
  246. * < 0 = error code
  247. *
  248. */
  249. static int gru_try_dropin(struct gru_thread_state *gts,
  250. struct gru_tlb_fault_handle *tfh,
  251. unsigned long __user *cb)
  252. {
  253. struct mm_struct *mm = gts->ts_mm;
  254. struct vm_area_struct *vma;
  255. int pageshift, asid, write, ret;
  256. unsigned long paddr, gpa, vaddr;
  257. /*
  258. * NOTE: The GRU contains magic hardware that eliminates races between
  259. * TLB invalidates and TLB dropins. If an invalidate occurs
  260. * in the window between reading the TFH and the subsequent TLB dropin,
  261. * the dropin is ignored. This eliminates the need for additional locks.
  262. */
  263. /*
  264. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  265. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  266. * is a transient state.
  267. */
  268. if (tfh->state == TFHSTATE_IDLE)
  269. goto failidle;
  270. if (tfh->state == TFHSTATE_MISS_FMM && cb)
  271. goto failfmm;
  272. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  273. vaddr = tfh->missvaddr;
  274. asid = tfh->missasid;
  275. if (asid == 0)
  276. goto failnoasid;
  277. rmb(); /* TFH must be cache resident before reading ms_range_active */
  278. /*
  279. * TFH is cache resident - at least briefly. Fail the dropin
  280. * if a range invalidate is active.
  281. */
  282. if (atomic_read(&gts->ts_gms->ms_range_active))
  283. goto failactive;
  284. vma = find_vma(mm, vaddr);
  285. if (!vma)
  286. goto failinval;
  287. /*
  288. * Atomic lookup is faster & usually works even if called in non-atomic
  289. * context.
  290. */
  291. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &pageshift);
  292. if (ret) {
  293. if (!cb)
  294. goto failupm;
  295. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr,
  296. &pageshift))
  297. goto failinval;
  298. }
  299. if (is_gru_paddr(paddr))
  300. goto failinval;
  301. paddr = paddr & ~((1UL << pageshift) - 1);
  302. gpa = uv_soc_phys_ram_to_gpa(paddr);
  303. gru_cb_set_istatus_active(cb);
  304. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  305. GRU_PAGESIZE(pageshift));
  306. STAT(tlb_dropin);
  307. gru_dbg(grudev,
  308. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  309. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  310. pageshift, gpa);
  311. return 0;
  312. failnoasid:
  313. /* No asid (delayed unload). */
  314. STAT(tlb_dropin_fail_no_asid);
  315. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  316. if (!cb)
  317. tfh_user_polling_mode(tfh);
  318. else
  319. gru_flush_cache(tfh);
  320. return -EAGAIN;
  321. failupm:
  322. /* Atomic failure switch CBR to UPM */
  323. tfh_user_polling_mode(tfh);
  324. STAT(tlb_dropin_fail_upm);
  325. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  326. return 1;
  327. failfmm:
  328. /* FMM state on UPM call */
  329. STAT(tlb_dropin_fail_fmm);
  330. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  331. return 0;
  332. failidle:
  333. /* TFH was idle - no miss pending */
  334. gru_flush_cache(tfh);
  335. if (cb)
  336. gru_flush_cache(cb);
  337. STAT(tlb_dropin_fail_idle);
  338. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  339. return 0;
  340. failinval:
  341. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  342. tfh_exception(tfh);
  343. STAT(tlb_dropin_fail_invalid);
  344. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  345. return -EFAULT;
  346. failactive:
  347. /* Range invalidate active. Switch to UPM iff atomic */
  348. if (!cb)
  349. tfh_user_polling_mode(tfh);
  350. else
  351. gru_flush_cache(tfh);
  352. STAT(tlb_dropin_fail_range_active);
  353. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  354. tfh, vaddr);
  355. return 1;
  356. }
  357. /*
  358. * Process an external interrupt from the GRU. This interrupt is
  359. * caused by a TLB miss.
  360. * Note that this is the interrupt handler that is registered with linux
  361. * interrupt handlers.
  362. */
  363. irqreturn_t gru_intr(int irq, void *dev_id)
  364. {
  365. struct gru_state *gru;
  366. struct gru_tlb_fault_map map;
  367. struct gru_thread_state *gts;
  368. struct gru_tlb_fault_handle *tfh = NULL;
  369. int cbrnum, ctxnum;
  370. STAT(intr);
  371. gru = irq_to_gru(irq);
  372. if (!gru) {
  373. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  374. raw_smp_processor_id(), irq);
  375. return IRQ_NONE;
  376. }
  377. get_clear_fault_map(gru, &map);
  378. gru_dbg(grudev, "irq %d, gru %x, map 0x%lx\n", irq, gru->gs_gid,
  379. map.fault_bits[0]);
  380. for_each_cbr_in_tfm(cbrnum, map.fault_bits) {
  381. tfh = get_tfh_by_index(gru, cbrnum);
  382. prefetchw(tfh); /* Helps on hdw, required for emulator */
  383. /*
  384. * When hardware sets a bit in the faultmap, it implicitly
  385. * locks the GRU context so that it cannot be unloaded.
  386. * The gts cannot change until a TFH start/writestart command
  387. * is issued.
  388. */
  389. ctxnum = tfh->ctxnum;
  390. gts = gru->gs_gts[ctxnum];
  391. /*
  392. * This is running in interrupt context. Trylock the mmap_sem.
  393. * If it fails, retry the fault in user context.
  394. */
  395. if (down_read_trylock(&gts->ts_mm->mmap_sem)) {
  396. gru_try_dropin(gts, tfh, NULL);
  397. up_read(&gts->ts_mm->mmap_sem);
  398. } else {
  399. tfh_user_polling_mode(tfh);
  400. }
  401. }
  402. return IRQ_HANDLED;
  403. }
  404. static int gru_user_dropin(struct gru_thread_state *gts,
  405. struct gru_tlb_fault_handle *tfh,
  406. unsigned long __user *cb)
  407. {
  408. struct gru_mm_struct *gms = gts->ts_gms;
  409. int ret;
  410. while (1) {
  411. wait_event(gms->ms_wait_queue,
  412. atomic_read(&gms->ms_range_active) == 0);
  413. prefetchw(tfh); /* Helps on hdw, required for emulator */
  414. ret = gru_try_dropin(gts, tfh, cb);
  415. if (ret <= 0)
  416. return ret;
  417. STAT(call_os_wait_queue);
  418. }
  419. }
  420. /*
  421. * This interface is called as a result of a user detecting a "call OS" bit
  422. * in a user CB. Normally means that a TLB fault has occurred.
  423. * cb - user virtual address of the CB
  424. */
  425. int gru_handle_user_call_os(unsigned long cb)
  426. {
  427. struct gru_tlb_fault_handle *tfh;
  428. struct gru_thread_state *gts;
  429. unsigned long __user *cbp;
  430. int ucbnum, cbrnum, ret = -EINVAL;
  431. STAT(call_os);
  432. gru_dbg(grudev, "address 0x%lx\n", cb);
  433. /* sanity check the cb pointer */
  434. ucbnum = get_cb_number((void *)cb);
  435. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  436. return -EINVAL;
  437. cbp = (unsigned long *)cb;
  438. gts = gru_find_lock_gts(cb);
  439. if (!gts)
  440. return -EINVAL;
  441. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  442. ret = -EINVAL;
  443. goto exit;
  444. }
  445. /*
  446. * If force_unload is set, the UPM TLB fault is phony. The task
  447. * has migrated to another node and the GSEG must be moved. Just
  448. * unload the context. The task will page fault and assign a new
  449. * context.
  450. */
  451. ret = -EAGAIN;
  452. cbrnum = thread_cbr_number(gts, ucbnum);
  453. if (gts->ts_force_unload) {
  454. gru_unload_context(gts, 1);
  455. } else if (gts->ts_gru) {
  456. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  457. ret = gru_user_dropin(gts, tfh, cbp);
  458. }
  459. exit:
  460. gru_unlock_gts(gts);
  461. return ret;
  462. }
  463. /*
  464. * Fetch the exception detail information for a CB that terminated with
  465. * an exception.
  466. */
  467. int gru_get_exception_detail(unsigned long arg)
  468. {
  469. struct control_block_extended_exc_detail excdet;
  470. struct gru_control_block_extended *cbe;
  471. struct gru_thread_state *gts;
  472. int ucbnum, cbrnum, ret;
  473. STAT(user_exception);
  474. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  475. return -EFAULT;
  476. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  477. gts = gru_find_lock_gts(excdet.cb);
  478. if (!gts)
  479. return -EINVAL;
  480. if (gts->ts_gru) {
  481. ucbnum = get_cb_number((void *)excdet.cb);
  482. cbrnum = thread_cbr_number(gts, ucbnum);
  483. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  484. excdet.opc = cbe->opccpy;
  485. excdet.exopc = cbe->exopccpy;
  486. excdet.ecause = cbe->ecause;
  487. excdet.exceptdet0 = cbe->idef1upd;
  488. excdet.exceptdet1 = cbe->idef3upd;
  489. ret = 0;
  490. } else {
  491. ret = -EAGAIN;
  492. }
  493. gru_unlock_gts(gts);
  494. gru_dbg(grudev, "address 0x%lx, ecause 0x%x\n", excdet.cb,
  495. excdet.ecause);
  496. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  497. ret = -EFAULT;
  498. return ret;
  499. }
  500. /*
  501. * User request to unload a context. Content is saved for possible reload.
  502. */
  503. int gru_user_unload_context(unsigned long arg)
  504. {
  505. struct gru_thread_state *gts;
  506. struct gru_unload_context_req req;
  507. STAT(user_unload_context);
  508. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  509. return -EFAULT;
  510. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  511. gts = gru_find_lock_gts(req.gseg);
  512. if (!gts)
  513. return -EINVAL;
  514. if (gts->ts_gru)
  515. gru_unload_context(gts, 1);
  516. gru_unlock_gts(gts);
  517. return 0;
  518. }
  519. /*
  520. * User request to flush a range of virtual addresses from the GRU TLB
  521. * (Mainly for testing).
  522. */
  523. int gru_user_flush_tlb(unsigned long arg)
  524. {
  525. struct gru_thread_state *gts;
  526. struct gru_flush_tlb_req req;
  527. STAT(user_flush_tlb);
  528. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  529. return -EFAULT;
  530. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  531. req.vaddr, req.len);
  532. gts = gru_find_lock_gts(req.gseg);
  533. if (!gts)
  534. return -EINVAL;
  535. gru_flush_tlb_range(gts->ts_gms, req.vaddr, req.vaddr + req.len);
  536. gru_unlock_gts(gts);
  537. return 0;
  538. }
  539. /*
  540. * Register the current task as the user of the GSEG slice.
  541. * Needed for TLB fault interrupt targeting.
  542. */
  543. int gru_set_task_slice(long address)
  544. {
  545. struct gru_thread_state *gts;
  546. STAT(set_task_slice);
  547. gru_dbg(grudev, "address 0x%lx\n", address);
  548. gts = gru_alloc_locked_gts(address);
  549. if (!gts)
  550. return -EINVAL;
  551. gts->ts_tgid_owner = current->tgid;
  552. gru_unlock_gts(gts);
  553. return 0;
  554. }