mpi_ioc.h 58 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188
  1. /*
  2. * Copyright (c) 2000-2007 LSI Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.14
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
  85. * Added Max SATA Targets to SAS Discovery Error event.
  86. * 08-30-05 01.05.10 Added 4 new events and their event data structures.
  87. * Added new ReasonCode value for SAS Device Status Change
  88. * event.
  89. * Added new family code for FC949E.
  90. * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
  91. * Added additional Reason Codes and more event data fields
  92. * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
  93. * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
  94. * new event.
  95. * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
  96. * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
  97. * data structure.
  98. * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
  99. * data structure.
  100. * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
  101. * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
  102. * Added MaxInitiators field to PortFacts reply.
  103. * Added SAS Device Status Change ReasonCode for
  104. * asynchronous notificaiton.
  105. * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
  106. * data structure.
  107. * Added new ImageType values for FWDownload and FWUpload
  108. * requests.
  109. * 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
  110. * Broadcast Event Data (replacing _RESERVED2).
  111. * For Discovery Error Event Data DiscoveryStatus field,
  112. * replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
  113. * added _MULTI_PORT_DOMAIN.
  114. * 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request.
  115. * Added Common Boot Block type to FWUpload Request.
  116. * --------------------------------------------------------------------------
  117. */
  118. #ifndef MPI_IOC_H
  119. #define MPI_IOC_H
  120. /*****************************************************************************
  121. *
  122. * I O C M e s s a g e s
  123. *
  124. *****************************************************************************/
  125. /****************************************************************************/
  126. /* IOCInit message */
  127. /****************************************************************************/
  128. typedef struct _MSG_IOC_INIT
  129. {
  130. U8 WhoInit; /* 00h */
  131. U8 Reserved; /* 01h */
  132. U8 ChainOffset; /* 02h */
  133. U8 Function; /* 03h */
  134. U8 Flags; /* 04h */
  135. U8 MaxDevices; /* 05h */
  136. U8 MaxBuses; /* 06h */
  137. U8 MsgFlags; /* 07h */
  138. U32 MsgContext; /* 08h */
  139. U16 ReplyFrameSize; /* 0Ch */
  140. U8 Reserved1[2]; /* 0Eh */
  141. U32 HostMfaHighAddr; /* 10h */
  142. U32 SenseBufferHighAddr; /* 14h */
  143. U32 ReplyFifoHostSignalingAddr; /* 18h */
  144. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  145. U16 MsgVersion; /* 28h */
  146. U16 HeaderVersion; /* 2Ah */
  147. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  148. IOCInit_t, MPI_POINTER pIOCInit_t;
  149. /* WhoInit values */
  150. #define MPI_WHOINIT_NO_ONE (0x00)
  151. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  152. #define MPI_WHOINIT_ROM_BIOS (0x02)
  153. #define MPI_WHOINIT_PCI_PEER (0x03)
  154. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  155. #define MPI_WHOINIT_MANUFACTURER (0x05)
  156. /* Flags values */
  157. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  158. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  159. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  160. /* MsgVersion */
  161. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  162. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  163. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  164. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  165. /* HeaderVersion */
  166. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  167. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  168. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  169. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  170. typedef struct _MSG_IOC_INIT_REPLY
  171. {
  172. U8 WhoInit; /* 00h */
  173. U8 Reserved; /* 01h */
  174. U8 MsgLength; /* 02h */
  175. U8 Function; /* 03h */
  176. U8 Flags; /* 04h */
  177. U8 MaxDevices; /* 05h */
  178. U8 MaxBuses; /* 06h */
  179. U8 MsgFlags; /* 07h */
  180. U32 MsgContext; /* 08h */
  181. U16 Reserved2; /* 0Ch */
  182. U16 IOCStatus; /* 0Eh */
  183. U32 IOCLogInfo; /* 10h */
  184. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  185. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  186. /****************************************************************************/
  187. /* IOC Facts message */
  188. /****************************************************************************/
  189. typedef struct _MSG_IOC_FACTS
  190. {
  191. U8 Reserved[2]; /* 00h */
  192. U8 ChainOffset; /* 01h */
  193. U8 Function; /* 02h */
  194. U8 Reserved1[3]; /* 03h */
  195. U8 MsgFlags; /* 04h */
  196. U32 MsgContext; /* 08h */
  197. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  198. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  199. typedef struct _MPI_FW_VERSION_STRUCT
  200. {
  201. U8 Dev; /* 00h */
  202. U8 Unit; /* 01h */
  203. U8 Minor; /* 02h */
  204. U8 Major; /* 03h */
  205. } MPI_FW_VERSION_STRUCT;
  206. typedef union _MPI_FW_VERSION
  207. {
  208. MPI_FW_VERSION_STRUCT Struct;
  209. U32 Word;
  210. } MPI_FW_VERSION;
  211. /* IOC Facts Reply */
  212. typedef struct _MSG_IOC_FACTS_REPLY
  213. {
  214. U16 MsgVersion; /* 00h */
  215. U8 MsgLength; /* 02h */
  216. U8 Function; /* 03h */
  217. U16 HeaderVersion; /* 04h */
  218. U8 IOCNumber; /* 06h */
  219. U8 MsgFlags; /* 07h */
  220. U32 MsgContext; /* 08h */
  221. U16 IOCExceptions; /* 0Ch */
  222. U16 IOCStatus; /* 0Eh */
  223. U32 IOCLogInfo; /* 10h */
  224. U8 MaxChainDepth; /* 14h */
  225. U8 WhoInit; /* 15h */
  226. U8 BlockSize; /* 16h */
  227. U8 Flags; /* 17h */
  228. U16 ReplyQueueDepth; /* 18h */
  229. U16 RequestFrameSize; /* 1Ah */
  230. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  231. U16 ProductID; /* 1Eh */
  232. U32 CurrentHostMfaHighAddr; /* 20h */
  233. U16 GlobalCredits; /* 24h */
  234. U8 NumberOfPorts; /* 26h */
  235. U8 EventState; /* 27h */
  236. U32 CurrentSenseBufferHighAddr; /* 28h */
  237. U16 CurReplyFrameSize; /* 2Ch */
  238. U8 MaxDevices; /* 2Eh */
  239. U8 MaxBuses; /* 2Fh */
  240. U32 FWImageSize; /* 30h */
  241. U32 IOCCapabilities; /* 34h */
  242. MPI_FW_VERSION FWVersion; /* 38h */
  243. U16 HighPriorityQueueDepth; /* 3Ch */
  244. U16 Reserved2; /* 3Eh */
  245. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  246. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  247. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  248. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  249. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  250. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  251. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  252. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  253. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  254. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  255. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  256. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  257. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  258. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  259. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  260. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  261. #define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
  262. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  263. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  264. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  265. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  266. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  267. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  268. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  269. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  270. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  271. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  272. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  273. #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
  274. #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
  275. #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
  276. #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
  277. #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
  278. #define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
  279. /*****************************************************************************
  280. *
  281. * P o r t M e s s a g e s
  282. *
  283. *****************************************************************************/
  284. /****************************************************************************/
  285. /* Port Facts message and Reply */
  286. /****************************************************************************/
  287. typedef struct _MSG_PORT_FACTS
  288. {
  289. U8 Reserved[2]; /* 00h */
  290. U8 ChainOffset; /* 02h */
  291. U8 Function; /* 03h */
  292. U8 Reserved1[2]; /* 04h */
  293. U8 PortNumber; /* 06h */
  294. U8 MsgFlags; /* 07h */
  295. U32 MsgContext; /* 08h */
  296. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  297. PortFacts_t, MPI_POINTER pPortFacts_t;
  298. typedef struct _MSG_PORT_FACTS_REPLY
  299. {
  300. U16 Reserved; /* 00h */
  301. U8 MsgLength; /* 02h */
  302. U8 Function; /* 03h */
  303. U16 Reserved1; /* 04h */
  304. U8 PortNumber; /* 06h */
  305. U8 MsgFlags; /* 07h */
  306. U32 MsgContext; /* 08h */
  307. U16 Reserved2; /* 0Ch */
  308. U16 IOCStatus; /* 0Eh */
  309. U32 IOCLogInfo; /* 10h */
  310. U8 Reserved3; /* 14h */
  311. U8 PortType; /* 15h */
  312. U16 MaxDevices; /* 16h */
  313. U16 PortSCSIID; /* 18h */
  314. U16 ProtocolFlags; /* 1Ah */
  315. U16 MaxPostedCmdBuffers; /* 1Ch */
  316. U16 MaxPersistentIDs; /* 1Eh */
  317. U16 MaxLanBuckets; /* 20h */
  318. U8 MaxInitiators; /* 22h */
  319. U8 Reserved4; /* 23h */
  320. U32 Reserved5; /* 24h */
  321. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  322. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  323. /* PortTypes values */
  324. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  325. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  326. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  327. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  328. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  329. /* ProtocolFlags values */
  330. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  331. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  332. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  333. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  334. /****************************************************************************/
  335. /* Port Enable Message */
  336. /****************************************************************************/
  337. typedef struct _MSG_PORT_ENABLE
  338. {
  339. U8 Reserved[2]; /* 00h */
  340. U8 ChainOffset; /* 02h */
  341. U8 Function; /* 03h */
  342. U8 Reserved1[2]; /* 04h */
  343. U8 PortNumber; /* 06h */
  344. U8 MsgFlags; /* 07h */
  345. U32 MsgContext; /* 08h */
  346. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  347. PortEnable_t, MPI_POINTER pPortEnable_t;
  348. typedef struct _MSG_PORT_ENABLE_REPLY
  349. {
  350. U8 Reserved[2]; /* 00h */
  351. U8 MsgLength; /* 02h */
  352. U8 Function; /* 03h */
  353. U8 Reserved1[2]; /* 04h */
  354. U8 PortNumber; /* 05h */
  355. U8 MsgFlags; /* 07h */
  356. U32 MsgContext; /* 08h */
  357. U16 Reserved2; /* 0Ch */
  358. U16 IOCStatus; /* 0Eh */
  359. U32 IOCLogInfo; /* 10h */
  360. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  361. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  362. /*****************************************************************************
  363. *
  364. * E v e n t M e s s a g e s
  365. *
  366. *****************************************************************************/
  367. /****************************************************************************/
  368. /* Event Notification messages */
  369. /****************************************************************************/
  370. typedef struct _MSG_EVENT_NOTIFY
  371. {
  372. U8 Switch; /* 00h */
  373. U8 Reserved; /* 01h */
  374. U8 ChainOffset; /* 02h */
  375. U8 Function; /* 03h */
  376. U8 Reserved1[3]; /* 04h */
  377. U8 MsgFlags; /* 07h */
  378. U32 MsgContext; /* 08h */
  379. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  380. EventNotification_t, MPI_POINTER pEventNotification_t;
  381. /* Event Notification Reply */
  382. typedef struct _MSG_EVENT_NOTIFY_REPLY
  383. {
  384. U16 EventDataLength; /* 00h */
  385. U8 MsgLength; /* 02h */
  386. U8 Function; /* 03h */
  387. U8 Reserved1[2]; /* 04h */
  388. U8 AckRequired; /* 06h */
  389. U8 MsgFlags; /* 07h */
  390. U32 MsgContext; /* 08h */
  391. U8 Reserved2[2]; /* 0Ch */
  392. U16 IOCStatus; /* 0Eh */
  393. U32 IOCLogInfo; /* 10h */
  394. U32 Event; /* 14h */
  395. U32 EventContext; /* 18h */
  396. U32 Data[1]; /* 1Ch */
  397. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  398. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  399. /* Event Acknowledge */
  400. typedef struct _MSG_EVENT_ACK
  401. {
  402. U8 Reserved[2]; /* 00h */
  403. U8 ChainOffset; /* 02h */
  404. U8 Function; /* 03h */
  405. U8 Reserved1[3]; /* 04h */
  406. U8 MsgFlags; /* 07h */
  407. U32 MsgContext; /* 08h */
  408. U32 Event; /* 0Ch */
  409. U32 EventContext; /* 10h */
  410. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  411. EventAck_t, MPI_POINTER pEventAck_t;
  412. typedef struct _MSG_EVENT_ACK_REPLY
  413. {
  414. U8 Reserved[2]; /* 00h */
  415. U8 MsgLength; /* 02h */
  416. U8 Function; /* 03h */
  417. U8 Reserved1[3]; /* 04h */
  418. U8 MsgFlags; /* 07h */
  419. U32 MsgContext; /* 08h */
  420. U16 Reserved2; /* 0Ch */
  421. U16 IOCStatus; /* 0Eh */
  422. U32 IOCLogInfo; /* 10h */
  423. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  424. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  425. /* Switch */
  426. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  427. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  428. /* Event */
  429. #define MPI_EVENT_NONE (0x00000000)
  430. #define MPI_EVENT_LOG_DATA (0x00000001)
  431. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  432. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  433. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  434. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  435. #define MPI_EVENT_RESCAN (0x00000006)
  436. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  437. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  438. #define MPI_EVENT_LOGOUT (0x00000009)
  439. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  440. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  441. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  442. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  443. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  444. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  445. #define MPI_EVENT_SAS_SES (0x00000010)
  446. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  447. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  448. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  449. #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
  450. #define MPI_EVENT_IR2 (0x00000015)
  451. #define MPI_EVENT_SAS_DISCOVERY (0x00000016)
  452. #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
  453. #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
  454. #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
  455. #define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
  456. #define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
  457. #define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
  458. /* AckRequired field values */
  459. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  460. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  461. /* EventChange Event data */
  462. typedef struct _EVENT_DATA_EVENT_CHANGE
  463. {
  464. U8 EventState; /* 00h */
  465. U8 Reserved; /* 01h */
  466. U16 Reserved1; /* 02h */
  467. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  468. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  469. /* LogEntryAdded Event data */
  470. /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
  471. #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
  472. typedef struct _EVENT_DATA_LOG_ENTRY
  473. {
  474. U32 TimeStamp; /* 00h */
  475. U32 Reserved1; /* 04h */
  476. U16 LogSequence; /* 08h */
  477. U16 LogEntryQualifier; /* 0Ah */
  478. U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
  479. } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
  480. MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
  481. typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
  482. {
  483. U16 LogSequence; /* 00h */
  484. U16 Reserved1; /* 02h */
  485. U32 Reserved2; /* 04h */
  486. EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
  487. } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
  488. MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
  489. /* SCSI Event data for Port, Bus and Device forms */
  490. typedef struct _EVENT_DATA_SCSI
  491. {
  492. U8 TargetID; /* 00h */
  493. U8 BusPort; /* 01h */
  494. U16 Reserved; /* 02h */
  495. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  496. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  497. /* SCSI Device Status Change Event data */
  498. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  499. {
  500. U8 TargetID; /* 00h */
  501. U8 Bus; /* 01h */
  502. U8 ReasonCode; /* 02h */
  503. U8 LUN; /* 03h */
  504. U8 ASC; /* 04h */
  505. U8 ASCQ; /* 05h */
  506. U16 Reserved; /* 06h */
  507. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  508. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  509. MpiEventDataScsiDeviceStatusChange_t,
  510. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  511. /* MPI SCSI Device Status Change Event data ReasonCode values */
  512. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  513. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  514. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  515. /* SAS Device Status Change Event data */
  516. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  517. {
  518. U8 TargetID; /* 00h */
  519. U8 Bus; /* 01h */
  520. U8 ReasonCode; /* 02h */
  521. U8 Reserved; /* 03h */
  522. U8 ASC; /* 04h */
  523. U8 ASCQ; /* 05h */
  524. U16 DevHandle; /* 06h */
  525. U32 DeviceInfo; /* 08h */
  526. U16 ParentDevHandle; /* 0Ch */
  527. U8 PhyNum; /* 0Eh */
  528. U8 Reserved1; /* 0Fh */
  529. U64 SASAddress; /* 10h */
  530. U8 LUN[8]; /* 18h */
  531. U16 TaskTag; /* 20h */
  532. U16 Reserved2; /* 22h */
  533. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  534. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  535. MpiEventDataSasDeviceStatusChange_t,
  536. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  537. /* MPI SAS Device Status Change Event data ReasonCode values */
  538. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  539. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  540. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  541. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  542. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  543. #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
  544. #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
  545. #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
  546. #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
  547. #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
  548. #define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
  549. /* SCSI Event data for Queue Full event */
  550. typedef struct _EVENT_DATA_QUEUE_FULL
  551. {
  552. U8 TargetID; /* 00h */
  553. U8 Bus; /* 01h */
  554. U16 CurrentDepth; /* 02h */
  555. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  556. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  557. /* MPI Integrated RAID Event data */
  558. typedef struct _EVENT_DATA_RAID
  559. {
  560. U8 VolumeID; /* 00h */
  561. U8 VolumeBus; /* 01h */
  562. U8 ReasonCode; /* 02h */
  563. U8 PhysDiskNum; /* 03h */
  564. U8 ASC; /* 04h */
  565. U8 ASCQ; /* 05h */
  566. U16 Reserved; /* 06h */
  567. U32 SettingsStatus; /* 08h */
  568. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  569. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  570. /* MPI Integrated RAID Event data ReasonCode values */
  571. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  572. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  573. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  574. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  575. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  576. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  577. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  578. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  579. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  580. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  581. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  582. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  583. /* MPI Integrated RAID Resync Update Event data */
  584. typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
  585. {
  586. U8 VolumeID; /* 00h */
  587. U8 VolumeBus; /* 01h */
  588. U8 ResyncComplete; /* 02h */
  589. U8 Reserved1; /* 03h */
  590. U32 Reserved2; /* 04h */
  591. } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  592. MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
  593. MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
  594. /* MPI IR2 Event data */
  595. /* MPI_LD_STATE or MPI_PD_STATE */
  596. typedef struct _IR2_STATE_CHANGED
  597. {
  598. U16 PreviousState; /* 00h */
  599. U16 NewState; /* 02h */
  600. } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
  601. typedef struct _IR2_PD_INFO
  602. {
  603. U16 DeviceHandle; /* 00h */
  604. U8 TruncEnclosureHandle; /* 02h */
  605. U8 TruncatedSlot; /* 03h */
  606. } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
  607. typedef union _MPI_IR2_RC_EVENT_DATA
  608. {
  609. IR2_STATE_CHANGED StateChanged;
  610. U32 Lba;
  611. IR2_PD_INFO PdInfo;
  612. } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
  613. typedef struct _MPI_EVENT_DATA_IR2
  614. {
  615. U8 TargetID; /* 00h */
  616. U8 Bus; /* 01h */
  617. U8 ReasonCode; /* 02h */
  618. U8 PhysDiskNum; /* 03h */
  619. MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
  620. } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
  621. MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
  622. /* MPI IR2 Event data ReasonCode values */
  623. #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
  624. #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
  625. #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
  626. #define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
  627. #define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
  628. #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
  629. #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
  630. /* defines for logical disk states */
  631. #define MPI_LD_STATE_OPTIMAL (0x00)
  632. #define MPI_LD_STATE_DEGRADED (0x01)
  633. #define MPI_LD_STATE_FAILED (0x02)
  634. #define MPI_LD_STATE_MISSING (0x03)
  635. #define MPI_LD_STATE_OFFLINE (0x04)
  636. /* defines for physical disk states */
  637. #define MPI_PD_STATE_ONLINE (0x00)
  638. #define MPI_PD_STATE_MISSING (0x01)
  639. #define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
  640. #define MPI_PD_STATE_FAILED (0x03)
  641. #define MPI_PD_STATE_INITIALIZING (0x04)
  642. #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
  643. #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
  644. #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
  645. /* MPI Link Status Change Event data */
  646. typedef struct _EVENT_DATA_LINK_STATUS
  647. {
  648. U8 State; /* 00h */
  649. U8 Reserved; /* 01h */
  650. U16 Reserved1; /* 02h */
  651. U8 Reserved2; /* 04h */
  652. U8 Port; /* 05h */
  653. U16 Reserved3; /* 06h */
  654. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  655. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  656. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  657. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  658. /* MPI Loop State Change Event data */
  659. typedef struct _EVENT_DATA_LOOP_STATE
  660. {
  661. U8 Character4; /* 00h */
  662. U8 Character3; /* 01h */
  663. U8 Type; /* 02h */
  664. U8 Reserved; /* 03h */
  665. U8 Reserved1; /* 04h */
  666. U8 Port; /* 05h */
  667. U16 Reserved2; /* 06h */
  668. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  669. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  670. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  671. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  672. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  673. /* MPI LOGOUT Event data */
  674. typedef struct _EVENT_DATA_LOGOUT
  675. {
  676. U32 NPortID; /* 00h */
  677. U8 AliasIndex; /* 04h */
  678. U8 Port; /* 05h */
  679. U16 Reserved1; /* 06h */
  680. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  681. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  682. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  683. /* SAS SES Event data */
  684. typedef struct _EVENT_DATA_SAS_SES
  685. {
  686. U8 PhyNum; /* 00h */
  687. U8 Port; /* 01h */
  688. U8 PortWidth; /* 02h */
  689. U8 Reserved1; /* 04h */
  690. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  691. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  692. /* SAS Broadcast Primitive Event data */
  693. typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
  694. {
  695. U8 PhyNum; /* 00h */
  696. U8 Port; /* 01h */
  697. U8 PortWidth; /* 02h */
  698. U8 Primitive; /* 04h */
  699. } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  700. MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
  701. MpiEventDataSasBroadcastPrimitive_t,
  702. MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
  703. #define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
  704. #define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
  705. #define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
  706. #define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
  707. #define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
  708. #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
  709. #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
  710. /* SAS Phy Link Status Event data */
  711. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  712. {
  713. U8 PhyNum; /* 00h */
  714. U8 LinkRates; /* 01h */
  715. U16 DevHandle; /* 02h */
  716. U64 SASAddress; /* 04h */
  717. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  718. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  719. /* defines for the LinkRates field of the SAS PHY Link Status event */
  720. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  721. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  722. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  723. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  724. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  725. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  726. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  727. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  728. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  729. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  730. /* SAS Discovery Event data */
  731. typedef struct _EVENT_DATA_SAS_DISCOVERY
  732. {
  733. U32 DiscoveryStatus; /* 00h */
  734. U32 Reserved1; /* 04h */
  735. } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
  736. EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
  737. #define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
  738. #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
  739. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
  740. #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
  741. /* SAS Discovery Errror Event data */
  742. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  743. {
  744. U32 DiscoveryStatus; /* 00h */
  745. U8 Port; /* 04h */
  746. U8 Reserved1; /* 05h */
  747. U16 Reserved2; /* 06h */
  748. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  749. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  750. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  751. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  752. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  753. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  754. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  755. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  756. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  757. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  758. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  759. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  760. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  761. #define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
  762. #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
  763. #define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
  764. /* SAS SMP Error Event data */
  765. typedef struct _EVENT_DATA_SAS_SMP_ERROR
  766. {
  767. U8 Status; /* 00h */
  768. U8 Port; /* 01h */
  769. U8 SMPFunctionResult; /* 02h */
  770. U8 Reserved1; /* 03h */
  771. U64 SASAddress; /* 04h */
  772. } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
  773. MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
  774. /* defines for the Status field of the SAS SMP Error event */
  775. #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
  776. #define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
  777. #define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
  778. #define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
  779. #define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
  780. /* SAS Initiator Device Status Change Event data */
  781. typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
  782. {
  783. U8 ReasonCode; /* 00h */
  784. U8 Port; /* 01h */
  785. U16 DevHandle; /* 02h */
  786. U64 SASAddress; /* 04h */
  787. } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  788. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
  789. MpiEventDataSasInitDevStatusChange_t,
  790. MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
  791. /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
  792. #define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
  793. /* SAS Initiator Device Table Overflow Event data */
  794. typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
  795. {
  796. U8 MaxInit; /* 00h */
  797. U8 CurrentInit; /* 01h */
  798. U16 Reserved1; /* 02h */
  799. } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  800. MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
  801. MpiEventDataSasInitTableOverflow_t,
  802. MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
  803. /* SAS Expander Status Change Event data */
  804. typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
  805. {
  806. U8 ReasonCode; /* 00h */
  807. U8 Reserved1; /* 01h */
  808. U16 Reserved2; /* 02h */
  809. U8 PhysicalPort; /* 04h */
  810. U8 Reserved3; /* 05h */
  811. U16 EnclosureHandle; /* 06h */
  812. U64 SASAddress; /* 08h */
  813. U32 DiscoveryStatus; /* 10h */
  814. U16 DevHandle; /* 14h */
  815. U16 ParentDevHandle; /* 16h */
  816. U16 ExpanderChangeCount; /* 18h */
  817. U16 ExpanderRouteIndexes; /* 1Ah */
  818. U8 NumPhys; /* 1Ch */
  819. U8 SASLevel; /* 1Dh */
  820. U8 Flags; /* 1Eh */
  821. U8 Reserved4; /* 1Fh */
  822. } EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  823. MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
  824. MpiEventDataSasExpanderStatusChange_t,
  825. MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
  826. /* values for ReasonCode field of SAS Expander Status Change Event data */
  827. #define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
  828. #define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
  829. /* values for DiscoveryStatus field of SAS Expander Status Change Event data */
  830. #define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
  831. #define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
  832. #define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
  833. #define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
  834. #define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
  835. #define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
  836. #define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
  837. #define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
  838. #define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
  839. #define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
  840. #define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
  841. #define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
  842. /* values for Flags field of SAS Expander Status Change Event data */
  843. #define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
  844. #define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
  845. /*****************************************************************************
  846. *
  847. * F i r m w a r e L o a d M e s s a g e s
  848. *
  849. *****************************************************************************/
  850. /****************************************************************************/
  851. /* Firmware Download message and associated structures */
  852. /****************************************************************************/
  853. typedef struct _MSG_FW_DOWNLOAD
  854. {
  855. U8 ImageType; /* 00h */
  856. U8 Reserved; /* 01h */
  857. U8 ChainOffset; /* 02h */
  858. U8 Function; /* 03h */
  859. U8 Reserved1[3]; /* 04h */
  860. U8 MsgFlags; /* 07h */
  861. U32 MsgContext; /* 08h */
  862. SGE_MPI_UNION SGL; /* 0Ch */
  863. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  864. FWDownload_t, MPI_POINTER pFWDownload_t;
  865. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  866. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  867. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  868. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  869. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  870. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  871. #define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
  872. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
  873. #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
  874. #define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
  875. #define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
  876. typedef struct _FWDownloadTCSGE
  877. {
  878. U8 Reserved; /* 00h */
  879. U8 ContextSize; /* 01h */
  880. U8 DetailsLength; /* 02h */
  881. U8 Flags; /* 03h */
  882. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  883. U32 ImageOffset; /* 08h */
  884. U32 ImageSize; /* 0Ch */
  885. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  886. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  887. /* Firmware Download reply */
  888. typedef struct _MSG_FW_DOWNLOAD_REPLY
  889. {
  890. U8 ImageType; /* 00h */
  891. U8 Reserved; /* 01h */
  892. U8 MsgLength; /* 02h */
  893. U8 Function; /* 03h */
  894. U8 Reserved1[3]; /* 04h */
  895. U8 MsgFlags; /* 07h */
  896. U32 MsgContext; /* 08h */
  897. U16 Reserved2; /* 0Ch */
  898. U16 IOCStatus; /* 0Eh */
  899. U32 IOCLogInfo; /* 10h */
  900. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  901. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  902. /****************************************************************************/
  903. /* Firmware Upload message and associated structures */
  904. /****************************************************************************/
  905. typedef struct _MSG_FW_UPLOAD
  906. {
  907. U8 ImageType; /* 00h */
  908. U8 Reserved; /* 01h */
  909. U8 ChainOffset; /* 02h */
  910. U8 Function; /* 03h */
  911. U8 Reserved1[3]; /* 04h */
  912. U8 MsgFlags; /* 07h */
  913. U32 MsgContext; /* 08h */
  914. SGE_MPI_UNION SGL; /* 0Ch */
  915. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  916. FWUpload_t, MPI_POINTER pFWUpload_t;
  917. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  918. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  919. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  920. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  921. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  922. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  923. #define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
  924. #define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
  925. #define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
  926. #define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
  927. #define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
  928. #define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
  929. typedef struct _FWUploadTCSGE
  930. {
  931. U8 Reserved; /* 00h */
  932. U8 ContextSize; /* 01h */
  933. U8 DetailsLength; /* 02h */
  934. U8 Flags; /* 03h */
  935. U32 Reserved1; /* 04h */
  936. U32 ImageOffset; /* 08h */
  937. U32 ImageSize; /* 0Ch */
  938. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  939. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  940. /* Firmware Upload reply */
  941. typedef struct _MSG_FW_UPLOAD_REPLY
  942. {
  943. U8 ImageType; /* 00h */
  944. U8 Reserved; /* 01h */
  945. U8 MsgLength; /* 02h */
  946. U8 Function; /* 03h */
  947. U8 Reserved1[3]; /* 04h */
  948. U8 MsgFlags; /* 07h */
  949. U32 MsgContext; /* 08h */
  950. U16 Reserved2; /* 0Ch */
  951. U16 IOCStatus; /* 0Eh */
  952. U32 IOCLogInfo; /* 10h */
  953. U32 ActualImageSize; /* 14h */
  954. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  955. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  956. typedef struct _MPI_FW_HEADER
  957. {
  958. U32 ArmBranchInstruction0; /* 00h */
  959. U32 Signature0; /* 04h */
  960. U32 Signature1; /* 08h */
  961. U32 Signature2; /* 0Ch */
  962. U32 ArmBranchInstruction1; /* 10h */
  963. U32 ArmBranchInstruction2; /* 14h */
  964. U32 Reserved; /* 18h */
  965. U32 Checksum; /* 1Ch */
  966. U16 VendorId; /* 20h */
  967. U16 ProductId; /* 22h */
  968. MPI_FW_VERSION FWVersion; /* 24h */
  969. U32 SeqCodeVersion; /* 28h */
  970. U32 ImageSize; /* 2Ch */
  971. U32 NextImageHeaderOffset; /* 30h */
  972. U32 LoadStartAddress; /* 34h */
  973. U32 IopResetVectorValue; /* 38h */
  974. U32 IopResetRegAddr; /* 3Ch */
  975. U32 VersionNameWhat; /* 40h */
  976. U8 VersionName[32]; /* 44h */
  977. U32 VendorNameWhat; /* 64h */
  978. U8 VendorName[32]; /* 68h */
  979. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  980. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  981. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  982. /* defines for using the ProductId field */
  983. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  984. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  985. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  986. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  987. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  988. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  989. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  990. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  991. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  992. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  993. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  994. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  995. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  996. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  997. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  998. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  999. /* SCSI */
  1000. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  1001. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  1002. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  1003. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  1004. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  1005. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  1006. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  1007. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  1008. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  1009. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  1010. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  1011. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  1012. /* Fibre Channel */
  1013. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  1014. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  1015. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  1016. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  1017. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  1018. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  1019. #define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
  1020. /* SAS */
  1021. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  1022. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  1023. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  1024. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  1025. typedef struct _MPI_EXT_IMAGE_HEADER
  1026. {
  1027. U8 ImageType; /* 00h */
  1028. U8 Reserved; /* 01h */
  1029. U16 Reserved1; /* 02h */
  1030. U32 Checksum; /* 04h */
  1031. U32 ImageSize; /* 08h */
  1032. U32 NextImageHeaderOffset; /* 0Ch */
  1033. U32 LoadStartAddress; /* 10h */
  1034. U32 Reserved2; /* 14h */
  1035. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  1036. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  1037. /* defines for the ImageType field */
  1038. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  1039. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  1040. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  1041. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  1042. #define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)
  1043. #endif