cx18-av-core.c 27 KB

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  1. /*
  2. * cx18 ADEC audio functions
  3. *
  4. * Derived from cx25840-core.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21. * 02110-1301, USA.
  22. */
  23. #include "cx18-driver.h"
  24. int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
  25. {
  26. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  27. u32 mask = 0xff;
  28. int shift = (addr & 3) * 8;
  29. x = (x & ~(mask << shift)) | ((u32)value << shift);
  30. writel(x, cx->reg_mem + 0xc40000 + (addr & ~3));
  31. return 0;
  32. }
  33. int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
  34. {
  35. writel(value, cx->reg_mem + 0xc40000 + addr);
  36. return 0;
  37. }
  38. u8 cx18_av_read(struct cx18 *cx, u16 addr)
  39. {
  40. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  41. int shift = (addr & 3) * 8;
  42. return (x >> shift) & 0xff;
  43. }
  44. u32 cx18_av_read4(struct cx18 *cx, u16 addr)
  45. {
  46. return readl(cx->reg_mem + 0xc40000 + addr);
  47. }
  48. int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
  49. u8 or_value)
  50. {
  51. return cx18_av_write(cx, addr,
  52. (cx18_av_read(cx, addr) & and_mask) |
  53. or_value);
  54. }
  55. int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
  56. u32 or_value)
  57. {
  58. return cx18_av_write4(cx, addr,
  59. (cx18_av_read4(cx, addr) & and_mask) |
  60. or_value);
  61. }
  62. /* ----------------------------------------------------------------------- */
  63. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  64. enum cx18_av_audio_input aud_input);
  65. static void log_audio_status(struct cx18 *cx);
  66. static void log_video_status(struct cx18 *cx);
  67. /* ----------------------------------------------------------------------- */
  68. static void cx18_av_initialize(struct cx18 *cx)
  69. {
  70. struct cx18_av_state *state = &cx->av_state;
  71. u32 v;
  72. cx18_av_loadfw(cx);
  73. /* Stop 8051 code execution */
  74. cx18_av_write4(cx, CXADEC_DL_CTL, 0x03000000);
  75. /* initallize the PLL by toggling sleep bit */
  76. v = cx18_av_read4(cx, CXADEC_HOST_REG1);
  77. /* enable sleep mode */
  78. cx18_av_write4(cx, CXADEC_HOST_REG1, v | 1);
  79. /* disable sleep mode */
  80. cx18_av_write4(cx, CXADEC_HOST_REG1, v & 0xfffe);
  81. /* initialize DLLs */
  82. v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
  83. /* disable FLD */
  84. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
  85. /* enable FLD */
  86. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
  87. v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
  88. /* disable FLD */
  89. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
  90. /* enable FLD */
  91. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
  92. /* set analog bias currents. Set Vreg to 1.20V. */
  93. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
  94. v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
  95. /* enable TUNE_FIL_RST */
  96. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v);
  97. /* disable TUNE_FIL_RST */
  98. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v & 0xFFFFFFFE);
  99. /* enable 656 output */
  100. cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
  101. /* video output drive strength */
  102. cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
  103. /* reset video */
  104. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
  105. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
  106. /* set video to auto-detect */
  107. /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */
  108. /* set the comb notch = 1 */
  109. cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
  110. /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
  111. /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
  112. cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
  113. /* Set VGA_TRACK_RANGE to 0x20 */
  114. cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
  115. /* Enable VBI capture */
  116. cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
  117. /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
  118. /* Set the video input.
  119. The setting in MODE_CTRL gets lost when we do the above setup */
  120. /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
  121. /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
  122. v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
  123. v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */
  124. v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */
  125. v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */
  126. /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */
  127. cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
  128. /* if(dwEnable && dw3DCombAvailable) { */
  129. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
  130. /* } else { */
  131. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
  132. /* } */
  133. cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
  134. state->default_volume = 228 - cx18_av_read(cx, 0x8d4);
  135. state->default_volume = ((state->default_volume / 2) + 23) << 9;
  136. }
  137. /* ----------------------------------------------------------------------- */
  138. void cx18_av_std_setup(struct cx18 *cx)
  139. {
  140. struct cx18_av_state *state = &cx->av_state;
  141. v4l2_std_id std = state->std;
  142. int hblank, hactive, burst, vblank, vactive, sc;
  143. int vblank656, src_decimation;
  144. int luma_lpf, uv_lpf, comb;
  145. u32 pll_int, pll_frac, pll_post;
  146. /* datasheet startup, step 8d */
  147. if (std & ~V4L2_STD_NTSC)
  148. cx18_av_write(cx, 0x49f, 0x11);
  149. else
  150. cx18_av_write(cx, 0x49f, 0x14);
  151. if (std & V4L2_STD_625_50) {
  152. hblank = 132;
  153. hactive = 720;
  154. burst = 93;
  155. vblank = 36;
  156. vactive = 580;
  157. vblank656 = 40;
  158. src_decimation = 0x21f;
  159. luma_lpf = 2;
  160. if (std & V4L2_STD_PAL) {
  161. uv_lpf = 1;
  162. comb = 0x20;
  163. sc = 688739;
  164. } else if (std == V4L2_STD_PAL_Nc) {
  165. uv_lpf = 1;
  166. comb = 0x20;
  167. sc = 556453;
  168. } else { /* SECAM */
  169. uv_lpf = 0;
  170. comb = 0;
  171. sc = 672351;
  172. }
  173. } else {
  174. hactive = 720;
  175. hblank = 122;
  176. vactive = 487;
  177. luma_lpf = 1;
  178. uv_lpf = 1;
  179. vblank = 26;
  180. vblank656 = 26;
  181. src_decimation = 0x21f;
  182. if (std == V4L2_STD_PAL_60) {
  183. burst = 0x5b;
  184. luma_lpf = 2;
  185. comb = 0x20;
  186. sc = 688739;
  187. } else if (std == V4L2_STD_PAL_M) {
  188. burst = 0x61;
  189. comb = 0x20;
  190. sc = 555452;
  191. } else {
  192. burst = 0x5b;
  193. comb = 0x66;
  194. sc = 556063;
  195. }
  196. }
  197. /* DEBUG: Displays configured PLL frequency */
  198. pll_int = cx18_av_read(cx, 0x108);
  199. pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff;
  200. pll_post = cx18_av_read(cx, 0x109);
  201. CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n",
  202. pll_int, pll_frac, pll_post);
  203. if (pll_post) {
  204. int fin, fsc;
  205. int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac);
  206. pll >>= 25;
  207. pll /= pll_post;
  208. CX18_DEBUG_INFO("PLL = %d.%06d MHz\n",
  209. pll / 1000000, pll % 1000000);
  210. CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n",
  211. pll / 8000000, (pll / 8) % 1000000);
  212. fin = ((u64)src_decimation * pll) >> 12;
  213. CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n",
  214. fin / 1000000, fin % 1000000);
  215. fsc = (((u64)sc) * pll) >> 24L;
  216. CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n",
  217. fsc / 1000000, fsc % 1000000);
  218. CX18_DEBUG_INFO("hblank %i, hactive %i, "
  219. "vblank %i , vactive %i, vblank656 %i, src_dec %i,"
  220. "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x,"
  221. " sc 0x%06x\n",
  222. hblank, hactive, vblank, vactive, vblank656,
  223. src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
  224. }
  225. /* Sets horizontal blanking delay and active lines */
  226. cx18_av_write(cx, 0x470, hblank);
  227. cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) |
  228. (hactive << 4)));
  229. cx18_av_write(cx, 0x472, hactive >> 4);
  230. /* Sets burst gate delay */
  231. cx18_av_write(cx, 0x473, burst);
  232. /* Sets vertical blanking delay and active duration */
  233. cx18_av_write(cx, 0x474, vblank);
  234. cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) |
  235. (vactive << 4)));
  236. cx18_av_write(cx, 0x476, vactive >> 4);
  237. cx18_av_write(cx, 0x477, vblank656);
  238. /* Sets src decimation rate */
  239. cx18_av_write(cx, 0x478, 0xff & src_decimation);
  240. cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8));
  241. /* Sets Luma and UV Low pass filters */
  242. cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
  243. /* Enables comb filters */
  244. cx18_av_write(cx, 0x47b, comb);
  245. /* Sets SC Step*/
  246. cx18_av_write(cx, 0x47c, sc);
  247. cx18_av_write(cx, 0x47d, 0xff & sc >> 8);
  248. cx18_av_write(cx, 0x47e, 0xff & sc >> 16);
  249. /* Sets VBI parameters */
  250. if (std & V4L2_STD_625_50) {
  251. cx18_av_write(cx, 0x47f, 0x01);
  252. state->vbi_line_offset = 5;
  253. } else {
  254. cx18_av_write(cx, 0x47f, 0x00);
  255. state->vbi_line_offset = 8;
  256. }
  257. }
  258. /* ----------------------------------------------------------------------- */
  259. static void input_change(struct cx18 *cx)
  260. {
  261. struct cx18_av_state *state = &cx->av_state;
  262. v4l2_std_id std = state->std;
  263. /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
  264. cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
  265. cx18_av_and_or(cx, 0x401, ~0x60, 0);
  266. cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
  267. if (std & V4L2_STD_525_60) {
  268. if (std == V4L2_STD_NTSC_M_JP) {
  269. /* Japan uses EIAJ audio standard */
  270. cx18_av_write(cx, 0x808, 0xf7);
  271. cx18_av_write(cx, 0x80b, 0x02);
  272. } else if (std == V4L2_STD_NTSC_M_KR) {
  273. /* South Korea uses A2 audio standard */
  274. cx18_av_write(cx, 0x808, 0xf8);
  275. cx18_av_write(cx, 0x80b, 0x03);
  276. } else {
  277. /* Others use the BTSC audio standard */
  278. cx18_av_write(cx, 0x808, 0xf6);
  279. cx18_av_write(cx, 0x80b, 0x01);
  280. }
  281. } else if (std & V4L2_STD_PAL) {
  282. /* Follow tuner change procedure for PAL */
  283. cx18_av_write(cx, 0x808, 0xff);
  284. cx18_av_write(cx, 0x80b, 0x03);
  285. } else if (std & V4L2_STD_SECAM) {
  286. /* Select autodetect for SECAM */
  287. cx18_av_write(cx, 0x808, 0xff);
  288. cx18_av_write(cx, 0x80b, 0x03);
  289. }
  290. if (cx18_av_read(cx, 0x803) & 0x10) {
  291. /* restart audio decoder microcontroller */
  292. cx18_av_and_or(cx, 0x803, ~0x10, 0x00);
  293. cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
  294. }
  295. }
  296. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  297. enum cx18_av_audio_input aud_input)
  298. {
  299. struct cx18_av_state *state = &cx->av_state;
  300. u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
  301. vid_input <= CX18_AV_COMPOSITE8);
  302. u8 reg;
  303. CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
  304. vid_input, aud_input);
  305. if (is_composite) {
  306. reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
  307. } else {
  308. int luma = vid_input & 0xf0;
  309. int chroma = vid_input & 0xf00;
  310. if ((vid_input & ~0xff0) ||
  311. luma < CX18_AV_SVIDEO_LUMA1 ||
  312. luma > CX18_AV_SVIDEO_LUMA8 ||
  313. chroma < CX18_AV_SVIDEO_CHROMA4 ||
  314. chroma > CX18_AV_SVIDEO_CHROMA8) {
  315. CX18_ERR("0x%04x is not a valid video input!\n",
  316. vid_input);
  317. return -EINVAL;
  318. }
  319. reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
  320. if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
  321. reg &= 0x3f;
  322. reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
  323. } else {
  324. reg &= 0xcf;
  325. reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
  326. }
  327. }
  328. switch (aud_input) {
  329. case CX18_AV_AUDIO_SERIAL1:
  330. case CX18_AV_AUDIO_SERIAL2:
  331. /* do nothing, use serial audio input */
  332. break;
  333. case CX18_AV_AUDIO4: reg &= ~0x30; break;
  334. case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
  335. case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
  336. case CX18_AV_AUDIO7: reg &= ~0xc0; break;
  337. case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
  338. default:
  339. CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
  340. return -EINVAL;
  341. }
  342. cx18_av_write(cx, 0x103, reg);
  343. /* Set INPUT_MODE to Composite (0) or S-Video (1) */
  344. cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
  345. /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
  346. cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
  347. /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
  348. if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
  349. cx18_av_and_or(cx, 0x102, ~0x4, 4);
  350. else
  351. cx18_av_and_or(cx, 0x102, ~0x4, 0);
  352. /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
  353. state->vid_input = vid_input;
  354. state->aud_input = aud_input;
  355. cx18_av_audio_set_path(cx);
  356. input_change(cx);
  357. return 0;
  358. }
  359. /* ----------------------------------------------------------------------- */
  360. static int set_v4lstd(struct cx18 *cx)
  361. {
  362. struct cx18_av_state *state = &cx->av_state;
  363. u8 fmt = 0; /* zero is autodetect */
  364. u8 pal_m = 0;
  365. /* First tests should be against specific std */
  366. if (state->std == V4L2_STD_NTSC_M_JP) {
  367. fmt = 0x2;
  368. } else if (state->std == V4L2_STD_NTSC_443) {
  369. fmt = 0x3;
  370. } else if (state->std == V4L2_STD_PAL_M) {
  371. pal_m = 1;
  372. fmt = 0x5;
  373. } else if (state->std == V4L2_STD_PAL_N) {
  374. fmt = 0x6;
  375. } else if (state->std == V4L2_STD_PAL_Nc) {
  376. fmt = 0x7;
  377. } else if (state->std == V4L2_STD_PAL_60) {
  378. fmt = 0x8;
  379. } else {
  380. /* Then, test against generic ones */
  381. if (state->std & V4L2_STD_NTSC)
  382. fmt = 0x1;
  383. else if (state->std & V4L2_STD_PAL)
  384. fmt = 0x4;
  385. else if (state->std & V4L2_STD_SECAM)
  386. fmt = 0xc;
  387. }
  388. CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
  389. /* Follow step 9 of section 3.16 in the cx18_av datasheet.
  390. Without this PAL may display a vertical ghosting effect.
  391. This happens for example with the Yuan MPC622. */
  392. if (fmt >= 4 && fmt < 8) {
  393. /* Set format to NTSC-M */
  394. cx18_av_and_or(cx, 0x400, ~0xf, 1);
  395. /* Turn off LCOMB */
  396. cx18_av_and_or(cx, 0x47b, ~6, 0);
  397. }
  398. cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
  399. cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
  400. cx18_av_std_setup(cx);
  401. input_change(cx);
  402. return 0;
  403. }
  404. /* ----------------------------------------------------------------------- */
  405. static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  406. {
  407. switch (ctrl->id) {
  408. case V4L2_CID_BRIGHTNESS:
  409. if (ctrl->value < 0 || ctrl->value > 255) {
  410. CX18_ERR("invalid brightness setting %d\n",
  411. ctrl->value);
  412. return -ERANGE;
  413. }
  414. cx18_av_write(cx, 0x414, ctrl->value - 128);
  415. break;
  416. case V4L2_CID_CONTRAST:
  417. if (ctrl->value < 0 || ctrl->value > 127) {
  418. CX18_ERR("invalid contrast setting %d\n",
  419. ctrl->value);
  420. return -ERANGE;
  421. }
  422. cx18_av_write(cx, 0x415, ctrl->value << 1);
  423. break;
  424. case V4L2_CID_SATURATION:
  425. if (ctrl->value < 0 || ctrl->value > 127) {
  426. CX18_ERR("invalid saturation setting %d\n",
  427. ctrl->value);
  428. return -ERANGE;
  429. }
  430. cx18_av_write(cx, 0x420, ctrl->value << 1);
  431. cx18_av_write(cx, 0x421, ctrl->value << 1);
  432. break;
  433. case V4L2_CID_HUE:
  434. if (ctrl->value < -127 || ctrl->value > 127) {
  435. CX18_ERR("invalid hue setting %d\n", ctrl->value);
  436. return -ERANGE;
  437. }
  438. cx18_av_write(cx, 0x422, ctrl->value);
  439. break;
  440. case V4L2_CID_AUDIO_VOLUME:
  441. case V4L2_CID_AUDIO_BASS:
  442. case V4L2_CID_AUDIO_TREBLE:
  443. case V4L2_CID_AUDIO_BALANCE:
  444. case V4L2_CID_AUDIO_MUTE:
  445. return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
  446. default:
  447. return -EINVAL;
  448. }
  449. return 0;
  450. }
  451. static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  452. {
  453. switch (ctrl->id) {
  454. case V4L2_CID_BRIGHTNESS:
  455. ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
  456. break;
  457. case V4L2_CID_CONTRAST:
  458. ctrl->value = cx18_av_read(cx, 0x415) >> 1;
  459. break;
  460. case V4L2_CID_SATURATION:
  461. ctrl->value = cx18_av_read(cx, 0x420) >> 1;
  462. break;
  463. case V4L2_CID_HUE:
  464. ctrl->value = (s8)cx18_av_read(cx, 0x422);
  465. break;
  466. case V4L2_CID_AUDIO_VOLUME:
  467. case V4L2_CID_AUDIO_BASS:
  468. case V4L2_CID_AUDIO_TREBLE:
  469. case V4L2_CID_AUDIO_BALANCE:
  470. case V4L2_CID_AUDIO_MUTE:
  471. return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
  472. default:
  473. return -EINVAL;
  474. }
  475. return 0;
  476. }
  477. /* ----------------------------------------------------------------------- */
  478. static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  479. {
  480. switch (fmt->type) {
  481. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  482. return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
  483. default:
  484. return -EINVAL;
  485. }
  486. return 0;
  487. }
  488. static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  489. {
  490. struct cx18_av_state *state = &cx->av_state;
  491. struct v4l2_pix_format *pix;
  492. int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
  493. int is_50Hz = !(state->std & V4L2_STD_525_60);
  494. switch (fmt->type) {
  495. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  496. pix = &(fmt->fmt.pix);
  497. Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
  498. Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
  499. Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
  500. Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
  501. Vlines = pix->height + (is_50Hz ? 4 : 7);
  502. if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
  503. (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
  504. CX18_ERR("%dx%d is not a valid size!\n",
  505. pix->width, pix->height);
  506. return -ERANGE;
  507. }
  508. HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
  509. VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
  510. VSC &= 0x1fff;
  511. if (pix->width >= 385)
  512. filter = 0;
  513. else if (pix->width > 192)
  514. filter = 1;
  515. else if (pix->width > 96)
  516. filter = 2;
  517. else
  518. filter = 3;
  519. CX18_DEBUG_INFO("decoder set size %dx%d -> scale %ux%u\n",
  520. pix->width, pix->height, HSC, VSC);
  521. /* HSCALE=HSC */
  522. cx18_av_write(cx, 0x418, HSC & 0xff);
  523. cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
  524. cx18_av_write(cx, 0x41a, HSC >> 16);
  525. /* VSCALE=VSC */
  526. cx18_av_write(cx, 0x41c, VSC & 0xff);
  527. cx18_av_write(cx, 0x41d, VSC >> 8);
  528. /* VS_INTRLACE=1 VFILT=filter */
  529. cx18_av_write(cx, 0x41e, 0x8 | filter);
  530. break;
  531. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  532. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  533. case V4L2_BUF_TYPE_VBI_CAPTURE:
  534. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  535. default:
  536. return -EINVAL;
  537. }
  538. return 0;
  539. }
  540. /* ----------------------------------------------------------------------- */
  541. int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
  542. {
  543. struct cx18_av_state *state = &cx->av_state;
  544. struct v4l2_tuner *vt = arg;
  545. struct v4l2_routing *route = arg;
  546. /* ignore these commands */
  547. switch (cmd) {
  548. case TUNER_SET_TYPE_ADDR:
  549. return 0;
  550. }
  551. if (!state->is_initialized) {
  552. CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
  553. /* initialize on first use */
  554. state->is_initialized = 1;
  555. cx18_av_initialize(cx);
  556. }
  557. switch (cmd) {
  558. case VIDIOC_INT_DECODE_VBI_LINE:
  559. return cx18_av_vbi(cx, cmd, arg);
  560. case VIDIOC_INT_AUDIO_CLOCK_FREQ:
  561. return cx18_av_audio(cx, cmd, arg);
  562. case VIDIOC_STREAMON:
  563. CX18_DEBUG_INFO("enable output\n");
  564. cx18_av_write(cx, 0x115, 0x8c);
  565. cx18_av_write(cx, 0x116, 0x07);
  566. break;
  567. case VIDIOC_STREAMOFF:
  568. CX18_DEBUG_INFO("disable output\n");
  569. cx18_av_write(cx, 0x115, 0x00);
  570. cx18_av_write(cx, 0x116, 0x00);
  571. break;
  572. case VIDIOC_LOG_STATUS:
  573. log_video_status(cx);
  574. log_audio_status(cx);
  575. break;
  576. case VIDIOC_G_CTRL:
  577. return get_v4lctrl(cx, (struct v4l2_control *)arg);
  578. case VIDIOC_S_CTRL:
  579. return set_v4lctrl(cx, (struct v4l2_control *)arg);
  580. case VIDIOC_QUERYCTRL:
  581. {
  582. struct v4l2_queryctrl *qc = arg;
  583. switch (qc->id) {
  584. case V4L2_CID_BRIGHTNESS:
  585. case V4L2_CID_CONTRAST:
  586. case V4L2_CID_SATURATION:
  587. case V4L2_CID_HUE:
  588. return v4l2_ctrl_query_fill_std(qc);
  589. default:
  590. break;
  591. }
  592. switch (qc->id) {
  593. case V4L2_CID_AUDIO_VOLUME:
  594. return v4l2_ctrl_query_fill(qc, 0, 65535,
  595. 65535 / 100, state->default_volume);
  596. case V4L2_CID_AUDIO_MUTE:
  597. case V4L2_CID_AUDIO_BALANCE:
  598. case V4L2_CID_AUDIO_BASS:
  599. case V4L2_CID_AUDIO_TREBLE:
  600. return v4l2_ctrl_query_fill_std(qc);
  601. default:
  602. return -EINVAL;
  603. }
  604. return -EINVAL;
  605. }
  606. case VIDIOC_G_STD:
  607. *(v4l2_std_id *)arg = state->std;
  608. break;
  609. case VIDIOC_S_STD:
  610. if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
  611. return 0;
  612. state->radio = 0;
  613. state->std = *(v4l2_std_id *)arg;
  614. return set_v4lstd(cx);
  615. case AUDC_SET_RADIO:
  616. state->radio = 1;
  617. break;
  618. case VIDIOC_INT_G_VIDEO_ROUTING:
  619. route->input = state->vid_input;
  620. route->output = 0;
  621. break;
  622. case VIDIOC_INT_S_VIDEO_ROUTING:
  623. return set_input(cx, route->input, state->aud_input);
  624. case VIDIOC_INT_G_AUDIO_ROUTING:
  625. route->input = state->aud_input;
  626. route->output = 0;
  627. break;
  628. case VIDIOC_INT_S_AUDIO_ROUTING:
  629. return set_input(cx, state->vid_input, route->input);
  630. case VIDIOC_S_FREQUENCY:
  631. input_change(cx);
  632. break;
  633. case VIDIOC_G_TUNER:
  634. {
  635. u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
  636. u8 mode;
  637. int val = 0;
  638. if (state->radio)
  639. break;
  640. vt->signal = vpres ? 0xffff : 0x0;
  641. vt->capability |=
  642. V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
  643. V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
  644. mode = cx18_av_read(cx, 0x804);
  645. /* get rxsubchans and audmode */
  646. if ((mode & 0xf) == 1)
  647. val |= V4L2_TUNER_SUB_STEREO;
  648. else
  649. val |= V4L2_TUNER_SUB_MONO;
  650. if (mode == 2 || mode == 4)
  651. val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
  652. if (mode & 0x10)
  653. val |= V4L2_TUNER_SUB_SAP;
  654. vt->rxsubchans = val;
  655. vt->audmode = state->audmode;
  656. break;
  657. }
  658. case VIDIOC_S_TUNER:
  659. if (state->radio)
  660. break;
  661. switch (vt->audmode) {
  662. case V4L2_TUNER_MODE_MONO:
  663. /* mono -> mono
  664. stereo -> mono
  665. bilingual -> lang1 */
  666. cx18_av_and_or(cx, 0x809, ~0xf, 0x00);
  667. break;
  668. case V4L2_TUNER_MODE_STEREO:
  669. case V4L2_TUNER_MODE_LANG1:
  670. /* mono -> mono
  671. stereo -> stereo
  672. bilingual -> lang1 */
  673. cx18_av_and_or(cx, 0x809, ~0xf, 0x04);
  674. break;
  675. case V4L2_TUNER_MODE_LANG1_LANG2:
  676. /* mono -> mono
  677. stereo -> stereo
  678. bilingual -> lang1/lang2 */
  679. cx18_av_and_or(cx, 0x809, ~0xf, 0x07);
  680. break;
  681. case V4L2_TUNER_MODE_LANG2:
  682. /* mono -> mono
  683. stereo -> stereo
  684. bilingual -> lang2 */
  685. cx18_av_and_or(cx, 0x809, ~0xf, 0x01);
  686. break;
  687. default:
  688. return -EINVAL;
  689. }
  690. state->audmode = vt->audmode;
  691. break;
  692. case VIDIOC_G_FMT:
  693. return get_v4lfmt(cx, (struct v4l2_format *)arg);
  694. case VIDIOC_S_FMT:
  695. return set_v4lfmt(cx, (struct v4l2_format *)arg);
  696. case VIDIOC_INT_RESET:
  697. cx18_av_initialize(cx);
  698. break;
  699. default:
  700. return -EINVAL;
  701. }
  702. return 0;
  703. }
  704. /* ----------------------------------------------------------------------- */
  705. /* ----------------------------------------------------------------------- */
  706. static void log_video_status(struct cx18 *cx)
  707. {
  708. static const char *const fmt_strs[] = {
  709. "0x0",
  710. "NTSC-M", "NTSC-J", "NTSC-4.43",
  711. "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
  712. "0x9", "0xA", "0xB",
  713. "SECAM",
  714. "0xD", "0xE", "0xF"
  715. };
  716. struct cx18_av_state *state = &cx->av_state;
  717. u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
  718. u8 gen_stat1 = cx18_av_read(cx, 0x40d);
  719. u8 gen_stat2 = cx18_av_read(cx, 0x40e);
  720. int vid_input = state->vid_input;
  721. CX18_INFO("Video signal: %spresent\n",
  722. (gen_stat2 & 0x20) ? "" : "not ");
  723. CX18_INFO("Detected format: %s\n",
  724. fmt_strs[gen_stat1 & 0xf]);
  725. CX18_INFO("Specified standard: %s\n",
  726. vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
  727. if (vid_input >= CX18_AV_COMPOSITE1 &&
  728. vid_input <= CX18_AV_COMPOSITE8) {
  729. CX18_INFO("Specified video input: Composite %d\n",
  730. vid_input - CX18_AV_COMPOSITE1 + 1);
  731. } else {
  732. CX18_INFO("Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
  733. (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
  734. }
  735. CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
  736. }
  737. /* ----------------------------------------------------------------------- */
  738. static void log_audio_status(struct cx18 *cx)
  739. {
  740. struct cx18_av_state *state = &cx->av_state;
  741. u8 download_ctl = cx18_av_read(cx, 0x803);
  742. u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
  743. u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
  744. u8 audio_config = cx18_av_read(cx, 0x808);
  745. u8 pref_mode = cx18_av_read(cx, 0x809);
  746. u8 afc0 = cx18_av_read(cx, 0x80b);
  747. u8 mute_ctl = cx18_av_read(cx, 0x8d3);
  748. int aud_input = state->aud_input;
  749. char *p;
  750. switch (mod_det_stat0) {
  751. case 0x00: p = "mono"; break;
  752. case 0x01: p = "stereo"; break;
  753. case 0x02: p = "dual"; break;
  754. case 0x04: p = "tri"; break;
  755. case 0x10: p = "mono with SAP"; break;
  756. case 0x11: p = "stereo with SAP"; break;
  757. case 0x12: p = "dual with SAP"; break;
  758. case 0x14: p = "tri with SAP"; break;
  759. case 0xfe: p = "forced mode"; break;
  760. default: p = "not defined"; break;
  761. }
  762. CX18_INFO("Detected audio mode: %s\n", p);
  763. switch (mod_det_stat1) {
  764. case 0x00: p = "not defined"; break;
  765. case 0x01: p = "EIAJ"; break;
  766. case 0x02: p = "A2-M"; break;
  767. case 0x03: p = "A2-BG"; break;
  768. case 0x04: p = "A2-DK1"; break;
  769. case 0x05: p = "A2-DK2"; break;
  770. case 0x06: p = "A2-DK3"; break;
  771. case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
  772. case 0x08: p = "AM-L"; break;
  773. case 0x09: p = "NICAM-BG"; break;
  774. case 0x0a: p = "NICAM-DK"; break;
  775. case 0x0b: p = "NICAM-I"; break;
  776. case 0x0c: p = "NICAM-L"; break;
  777. case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
  778. case 0x0e: p = "IF FM Radio"; break;
  779. case 0x0f: p = "BTSC"; break;
  780. case 0x10: p = "detected chrominance"; break;
  781. case 0xfd: p = "unknown audio standard"; break;
  782. case 0xfe: p = "forced audio standard"; break;
  783. case 0xff: p = "no detected audio standard"; break;
  784. default: p = "not defined"; break;
  785. }
  786. CX18_INFO("Detected audio standard: %s\n", p);
  787. CX18_INFO("Audio muted: %s\n",
  788. (mute_ctl & 0x2) ? "yes" : "no");
  789. CX18_INFO("Audio microcontroller: %s\n",
  790. (download_ctl & 0x10) ? "running" : "stopped");
  791. switch (audio_config >> 4) {
  792. case 0x00: p = "undefined"; break;
  793. case 0x01: p = "BTSC"; break;
  794. case 0x02: p = "EIAJ"; break;
  795. case 0x03: p = "A2-M"; break;
  796. case 0x04: p = "A2-BG"; break;
  797. case 0x05: p = "A2-DK1"; break;
  798. case 0x06: p = "A2-DK2"; break;
  799. case 0x07: p = "A2-DK3"; break;
  800. case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
  801. case 0x09: p = "AM-L"; break;
  802. case 0x0a: p = "NICAM-BG"; break;
  803. case 0x0b: p = "NICAM-DK"; break;
  804. case 0x0c: p = "NICAM-I"; break;
  805. case 0x0d: p = "NICAM-L"; break;
  806. case 0x0e: p = "FM radio"; break;
  807. case 0x0f: p = "automatic detection"; break;
  808. default: p = "undefined"; break;
  809. }
  810. CX18_INFO("Configured audio standard: %s\n", p);
  811. if ((audio_config >> 4) < 0xF) {
  812. switch (audio_config & 0xF) {
  813. case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
  814. case 0x01: p = "MONO2 (LANGUAGE B)"; break;
  815. case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
  816. case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
  817. case 0x04: p = "STEREO"; break;
  818. case 0x05: p = "DUAL1 (AC)"; break;
  819. case 0x06: p = "DUAL2 (BC)"; break;
  820. case 0x07: p = "DUAL3 (AB)"; break;
  821. default: p = "undefined";
  822. }
  823. CX18_INFO("Configured audio mode: %s\n", p);
  824. } else {
  825. switch (audio_config & 0xF) {
  826. case 0x00: p = "BG"; break;
  827. case 0x01: p = "DK1"; break;
  828. case 0x02: p = "DK2"; break;
  829. case 0x03: p = "DK3"; break;
  830. case 0x04: p = "I"; break;
  831. case 0x05: p = "L"; break;
  832. case 0x06: p = "BTSC"; break;
  833. case 0x07: p = "EIAJ"; break;
  834. case 0x08: p = "A2-M"; break;
  835. case 0x09: p = "FM Radio (4.5 MHz)"; break;
  836. case 0x0a: p = "FM Radio (5.5 MHz)"; break;
  837. case 0x0b: p = "S-Video"; break;
  838. case 0x0f: p = "automatic standard and mode detection"; break;
  839. default: p = "undefined"; break;
  840. }
  841. CX18_INFO("Configured audio system: %s\n", p);
  842. }
  843. if (aud_input)
  844. CX18_INFO("Specified audio input: Tuner (In%d)\n",
  845. aud_input);
  846. else
  847. CX18_INFO("Specified audio input: External\n");
  848. switch (pref_mode & 0xf) {
  849. case 0: p = "mono/language A"; break;
  850. case 1: p = "language B"; break;
  851. case 2: p = "language C"; break;
  852. case 3: p = "analog fallback"; break;
  853. case 4: p = "stereo"; break;
  854. case 5: p = "language AC"; break;
  855. case 6: p = "language BC"; break;
  856. case 7: p = "language AB"; break;
  857. default: p = "undefined"; break;
  858. }
  859. CX18_INFO("Preferred audio mode: %s\n", p);
  860. if ((audio_config & 0xf) == 0xf) {
  861. switch ((afc0 >> 3) & 0x1) {
  862. case 0: p = "system DK"; break;
  863. case 1: p = "system L"; break;
  864. }
  865. CX18_INFO("Selected 65 MHz format: %s\n", p);
  866. switch (afc0 & 0x7) {
  867. case 0: p = "Chroma"; break;
  868. case 1: p = "BTSC"; break;
  869. case 2: p = "EIAJ"; break;
  870. case 3: p = "A2-M"; break;
  871. case 4: p = "autodetect"; break;
  872. default: p = "undefined"; break;
  873. }
  874. CX18_INFO("Selected 45 MHz format: %s\n", p);
  875. }
  876. }