atmel_tsadcc.c 10 KB

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  1. /*
  2. * Atmel Touch Screen Driver
  3. *
  4. * Copyright (c) 2008 ATMEL
  5. * Copyright (c) 2008 Dan Liang
  6. * Copyright (c) 2008 TimeSys Corporation
  7. * Copyright (c) 2008 Justin Waters
  8. *
  9. * Based on touchscreen code from Atmel Corporation.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/err.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/input.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/clk.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/io.h>
  25. /* Register definitions based on AT91SAM9RL64 preliminary draft datasheet */
  26. #define ATMEL_TSADCC_CR 0x00 /* Control register */
  27. #define ATMEL_TSADCC_SWRST (1 << 0) /* Software Reset*/
  28. #define ATMEL_TSADCC_START (1 << 1) /* Start conversion */
  29. #define ATMEL_TSADCC_MR 0x04 /* Mode register */
  30. #define ATMEL_TSADCC_TSAMOD (3 << 0) /* ADC mode */
  31. #define ATMEL_TSADCC_TSAMOD_ADC_ONLY_MODE (0x0) /* ADC Mode */
  32. #define ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE (0x1) /* Touch Screen Only Mode */
  33. #define ATMEL_TSADCC_LOWRES (1 << 4) /* Resolution selection */
  34. #define ATMEL_TSADCC_SLEEP (1 << 5) /* Sleep mode */
  35. #define ATMEL_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
  36. #define ATMEL_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
  37. #define ATMEL_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
  38. #define ATMEL_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
  39. #define ATMEL_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
  40. #define ATMEL_TSADCC_TRGR 0x08 /* Trigger register */
  41. #define ATMEL_TSADCC_TRGMOD (7 << 0) /* Trigger mode */
  42. #define ATMEL_TSADCC_TRGMOD_NONE (0 << 0)
  43. #define ATMEL_TSADCC_TRGMOD_EXT_RISING (1 << 0)
  44. #define ATMEL_TSADCC_TRGMOD_EXT_FALLING (2 << 0)
  45. #define ATMEL_TSADCC_TRGMOD_EXT_ANY (3 << 0)
  46. #define ATMEL_TSADCC_TRGMOD_PENDET (4 << 0)
  47. #define ATMEL_TSADCC_TRGMOD_PERIOD (5 << 0)
  48. #define ATMEL_TSADCC_TRGMOD_CONTINUOUS (6 << 0)
  49. #define ATMEL_TSADCC_TRGPER (0xffff << 16) /* Trigger period */
  50. #define ATMEL_TSADCC_TSR 0x0C /* Touch Screen register */
  51. #define ATMEL_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */
  52. #define ATMEL_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */
  53. #define ATMEL_TSADCC_CHER 0x10 /* Channel Enable register */
  54. #define ATMEL_TSADCC_CHDR 0x14 /* Channel Disable register */
  55. #define ATMEL_TSADCC_CHSR 0x18 /* Channel Status register */
  56. #define ATMEL_TSADCC_CH(n) (1 << (n)) /* Channel number */
  57. #define ATMEL_TSADCC_SR 0x1C /* Status register */
  58. #define ATMEL_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */
  59. #define ATMEL_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */
  60. #define ATMEL_TSADCC_DRDY (1 << 16) /* Data Ready */
  61. #define ATMEL_TSADCC_GOVRE (1 << 17) /* General Overrun Error */
  62. #define ATMEL_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */
  63. #define ATMEL_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
  64. #define ATMEL_TSADCC_PENCNT (1 << 20) /* Pen contact */
  65. #define ATMEL_TSADCC_NOCNT (1 << 21) /* No contact */
  66. #define ATMEL_TSADCC_LCDR 0x20 /* Last Converted Data register */
  67. #define ATMEL_TSADCC_DATA (0x3ff << 0) /* Channel data */
  68. #define ATMEL_TSADCC_IER 0x24 /* Interrupt Enable register */
  69. #define ATMEL_TSADCC_IDR 0x28 /* Interrupt Disable register */
  70. #define ATMEL_TSADCC_IMR 0x2C /* Interrupt Mask register */
  71. #define ATMEL_TSADCC_CDR0 0x30 /* Channel Data 0 */
  72. #define ATMEL_TSADCC_CDR1 0x34 /* Channel Data 1 */
  73. #define ATMEL_TSADCC_CDR2 0x38 /* Channel Data 2 */
  74. #define ATMEL_TSADCC_CDR3 0x3C /* Channel Data 3 */
  75. #define ATMEL_TSADCC_CDR4 0x40 /* Channel Data 4 */
  76. #define ATMEL_TSADCC_CDR5 0x44 /* Channel Data 5 */
  77. #define ADC_CLOCK 1000000
  78. struct atmel_tsadcc {
  79. struct input_dev *input;
  80. char phys[32];
  81. struct clk *clk;
  82. int irq;
  83. };
  84. static void __iomem *tsc_base;
  85. #define atmel_tsadcc_read(reg) __raw_readl(tsc_base + (reg))
  86. #define atmel_tsadcc_write(reg, val) __raw_writel((val), tsc_base + (reg))
  87. static irqreturn_t atmel_tsadcc_interrupt(int irq, void *dev)
  88. {
  89. struct input_dev *input_dev = ((struct atmel_tsadcc *)dev)->input;
  90. unsigned int absx;
  91. unsigned int absy;
  92. unsigned int status;
  93. unsigned int reg;
  94. status = atmel_tsadcc_read(ATMEL_TSADCC_SR);
  95. status &= atmel_tsadcc_read(ATMEL_TSADCC_IMR);
  96. if (status & ATMEL_TSADCC_NOCNT) {
  97. /* Contact lost */
  98. reg = atmel_tsadcc_read(ATMEL_TSADCC_MR) | ATMEL_TSADCC_PENDBC;
  99. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  100. atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
  101. atmel_tsadcc_write(ATMEL_TSADCC_IDR,
  102. ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
  103. atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
  104. input_report_key(input_dev, BTN_TOUCH, 0);
  105. input_sync(input_dev);
  106. } else if (status & ATMEL_TSADCC_PENCNT) {
  107. /* Pen detected */
  108. reg = atmel_tsadcc_read(ATMEL_TSADCC_MR);
  109. reg &= ~ATMEL_TSADCC_PENDBC;
  110. atmel_tsadcc_write(ATMEL_TSADCC_IDR, ATMEL_TSADCC_PENCNT);
  111. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  112. atmel_tsadcc_write(ATMEL_TSADCC_IER,
  113. ATMEL_TSADCC_EOC(3) | ATMEL_TSADCC_NOCNT);
  114. atmel_tsadcc_write(ATMEL_TSADCC_TRGR,
  115. ATMEL_TSADCC_TRGMOD_PERIOD | (0x0FFF << 16));
  116. } else if (status & ATMEL_TSADCC_EOC(3)) {
  117. /* Conversion finished */
  118. absx = atmel_tsadcc_read(ATMEL_TSADCC_CDR3) << 10;
  119. absx /= atmel_tsadcc_read(ATMEL_TSADCC_CDR2);
  120. absy = atmel_tsadcc_read(ATMEL_TSADCC_CDR1) << 10;
  121. absy /= atmel_tsadcc_read(ATMEL_TSADCC_CDR0);
  122. input_report_abs(input_dev, ABS_X, absx);
  123. input_report_abs(input_dev, ABS_Y, absy);
  124. input_report_key(input_dev, BTN_TOUCH, 1);
  125. input_sync(input_dev);
  126. }
  127. return IRQ_HANDLED;
  128. }
  129. /*
  130. * The functions for inserting/removing us as a module.
  131. */
  132. static int __devinit atmel_tsadcc_probe(struct platform_device *pdev)
  133. {
  134. struct atmel_tsadcc *ts_dev;
  135. struct input_dev *input_dev;
  136. struct resource *res;
  137. int err = 0;
  138. unsigned int prsc;
  139. unsigned int reg;
  140. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  141. if (!res) {
  142. dev_err(&pdev->dev, "no mmio resource defined.\n");
  143. return -ENXIO;
  144. }
  145. /* Allocate memory for device */
  146. ts_dev = kzalloc(sizeof(struct atmel_tsadcc), GFP_KERNEL);
  147. if (!ts_dev) {
  148. dev_err(&pdev->dev, "failed to allocate memory.\n");
  149. return -ENOMEM;
  150. }
  151. platform_set_drvdata(pdev, ts_dev);
  152. input_dev = input_allocate_device();
  153. if (!input_dev) {
  154. dev_err(&pdev->dev, "failed to allocate input device.\n");
  155. err = -EBUSY;
  156. goto err_free_mem;
  157. }
  158. ts_dev->irq = platform_get_irq(pdev, 0);
  159. if (ts_dev->irq < 0) {
  160. dev_err(&pdev->dev, "no irq ID is designated.\n");
  161. err = -ENODEV;
  162. goto err_free_dev;
  163. }
  164. if (!request_mem_region(res->start, res->end - res->start + 1,
  165. "atmel tsadcc regs")) {
  166. dev_err(&pdev->dev, "resources is unavailable.\n");
  167. err = -EBUSY;
  168. goto err_free_dev;
  169. }
  170. tsc_base = ioremap(res->start, res->end - res->start + 1);
  171. if (!tsc_base) {
  172. dev_err(&pdev->dev, "failed to map registers.\n");
  173. err = -ENOMEM;
  174. goto err_release_mem;
  175. }
  176. err = request_irq(ts_dev->irq, atmel_tsadcc_interrupt, IRQF_DISABLED,
  177. pdev->dev.driver->name, ts_dev);
  178. if (err) {
  179. dev_err(&pdev->dev, "failed to allocate irq.\n");
  180. goto err_unmap_regs;
  181. }
  182. ts_dev->clk = clk_get(&pdev->dev, "tsc_clk");
  183. if (IS_ERR(ts_dev->clk)) {
  184. dev_err(&pdev->dev, "failed to get ts_clk\n");
  185. err = PTR_ERR(ts_dev->clk);
  186. goto err_free_irq;
  187. }
  188. ts_dev->input = input_dev;
  189. snprintf(ts_dev->phys, sizeof(ts_dev->phys),
  190. "%s/input0", pdev->dev.bus_id);
  191. input_dev->name = "atmel touch screen controller";
  192. input_dev->phys = ts_dev->phys;
  193. input_dev->dev.parent = &pdev->dev;
  194. input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
  195. input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
  196. input_set_abs_params(input_dev, ABS_X, 0, 0x3FF, 0, 0);
  197. input_set_abs_params(input_dev, ABS_Y, 0, 0x3FF, 0, 0);
  198. /* clk_enable() always returns 0, no need to check it */
  199. clk_enable(ts_dev->clk);
  200. prsc = clk_get_rate(ts_dev->clk);
  201. dev_info(&pdev->dev, "Master clock is set at: %d Hz\n", prsc);
  202. prsc = prsc / ADC_CLOCK / 2 - 1;
  203. reg = ATMEL_TSADCC_TSAMOD_TS_ONLY_MODE |
  204. ((0x00 << 5) & ATMEL_TSADCC_SLEEP) | /* Normal Mode */
  205. ((0x01 << 6) & ATMEL_TSADCC_PENDET) | /* Enable Pen Detect */
  206. ((prsc << 8) & ATMEL_TSADCC_PRESCAL) | /* PRESCAL */
  207. ((0x13 << 16) & ATMEL_TSADCC_STARTUP) | /* STARTUP */
  208. ((0x0F << 28) & ATMEL_TSADCC_PENDBC); /* PENDBC */
  209. atmel_tsadcc_write(ATMEL_TSADCC_CR, ATMEL_TSADCC_SWRST);
  210. atmel_tsadcc_write(ATMEL_TSADCC_MR, reg);
  211. atmel_tsadcc_write(ATMEL_TSADCC_TRGR, ATMEL_TSADCC_TRGMOD_NONE);
  212. atmel_tsadcc_write(ATMEL_TSADCC_TSR, (0x3 << 24) & ATMEL_TSADCC_TSSHTIM);
  213. atmel_tsadcc_read(ATMEL_TSADCC_SR);
  214. atmel_tsadcc_write(ATMEL_TSADCC_IER, ATMEL_TSADCC_PENCNT);
  215. /* All went ok, so register to the input system */
  216. err = input_register_device(input_dev);
  217. if (err)
  218. goto err_fail;
  219. return 0;
  220. err_fail:
  221. clk_disable(ts_dev->clk);
  222. clk_put(ts_dev->clk);
  223. err_free_irq:
  224. free_irq(ts_dev->irq, ts_dev);
  225. err_unmap_regs:
  226. iounmap(tsc_base);
  227. err_release_mem:
  228. release_mem_region(res->start, res->end - res->start + 1);
  229. err_free_dev:
  230. input_free_device(ts_dev->input);
  231. err_free_mem:
  232. kfree(ts_dev);
  233. return err;
  234. }
  235. static int __devexit atmel_tsadcc_remove(struct platform_device *pdev)
  236. {
  237. struct atmel_tsadcc *ts_dev = dev_get_drvdata(&pdev->dev);
  238. struct resource *res;
  239. free_irq(ts_dev->irq, ts_dev);
  240. input_unregister_device(ts_dev->input);
  241. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  242. iounmap(tsc_base);
  243. release_mem_region(res->start, res->end - res->start + 1);
  244. clk_disable(ts_dev->clk);
  245. clk_put(ts_dev->clk);
  246. kfree(ts_dev);
  247. return 0;
  248. }
  249. static struct platform_driver atmel_tsadcc_driver = {
  250. .probe = atmel_tsadcc_probe,
  251. .remove = __devexit_p(atmel_tsadcc_remove),
  252. .driver = {
  253. .name = "atmel_tsadcc",
  254. },
  255. };
  256. static int __init atmel_tsadcc_init(void)
  257. {
  258. return platform_driver_register(&atmel_tsadcc_driver);
  259. }
  260. static void __exit atmel_tsadcc_exit(void)
  261. {
  262. platform_driver_unregister(&atmel_tsadcc_driver);
  263. }
  264. module_init(atmel_tsadcc_init);
  265. module_exit(atmel_tsadcc_exit);
  266. MODULE_LICENSE("GPL");
  267. MODULE_DESCRIPTION("Atmel TouchScreen Driver");
  268. MODULE_AUTHOR("Dan Liang <dan.liang@atmel.com>");