mthca_memfree.c 18 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  4. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/mm.h>
  35. #include <linux/scatterlist.h>
  36. #include <linux/sched.h>
  37. #include <asm/page.h>
  38. #include "mthca_memfree.h"
  39. #include "mthca_dev.h"
  40. #include "mthca_cmd.h"
  41. /*
  42. * We allocate in as big chunks as we can, up to a maximum of 256 KB
  43. * per chunk.
  44. */
  45. enum {
  46. MTHCA_ICM_ALLOC_SIZE = 1 << 18,
  47. MTHCA_TABLE_CHUNK_SIZE = 1 << 18
  48. };
  49. struct mthca_user_db_table {
  50. struct mutex mutex;
  51. struct {
  52. u64 uvirt;
  53. struct scatterlist mem;
  54. int refcount;
  55. } page[0];
  56. };
  57. static void mthca_free_icm_pages(struct mthca_dev *dev, struct mthca_icm_chunk *chunk)
  58. {
  59. int i;
  60. if (chunk->nsg > 0)
  61. pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages,
  62. PCI_DMA_BIDIRECTIONAL);
  63. for (i = 0; i < chunk->npages; ++i)
  64. __free_pages(sg_page(&chunk->mem[i]),
  65. get_order(chunk->mem[i].length));
  66. }
  67. static void mthca_free_icm_coherent(struct mthca_dev *dev, struct mthca_icm_chunk *chunk)
  68. {
  69. int i;
  70. for (i = 0; i < chunk->npages; ++i) {
  71. dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length,
  72. lowmem_page_address(sg_page(&chunk->mem[i])),
  73. sg_dma_address(&chunk->mem[i]));
  74. }
  75. }
  76. void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent)
  77. {
  78. struct mthca_icm_chunk *chunk, *tmp;
  79. if (!icm)
  80. return;
  81. list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) {
  82. if (coherent)
  83. mthca_free_icm_coherent(dev, chunk);
  84. else
  85. mthca_free_icm_pages(dev, chunk);
  86. kfree(chunk);
  87. }
  88. kfree(icm);
  89. }
  90. static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask)
  91. {
  92. struct page *page;
  93. /*
  94. * Use __GFP_ZERO because buggy firmware assumes ICM pages are
  95. * cleared, and subtle failures are seen if they aren't.
  96. */
  97. page = alloc_pages(gfp_mask | __GFP_ZERO, order);
  98. if (!page)
  99. return -ENOMEM;
  100. sg_set_page(mem, page, PAGE_SIZE << order, 0);
  101. return 0;
  102. }
  103. static int mthca_alloc_icm_coherent(struct device *dev, struct scatterlist *mem,
  104. int order, gfp_t gfp_mask)
  105. {
  106. void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, &sg_dma_address(mem),
  107. gfp_mask);
  108. if (!buf)
  109. return -ENOMEM;
  110. sg_set_buf(mem, buf, PAGE_SIZE << order);
  111. BUG_ON(mem->offset);
  112. sg_dma_len(mem) = PAGE_SIZE << order;
  113. return 0;
  114. }
  115. struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages,
  116. gfp_t gfp_mask, int coherent)
  117. {
  118. struct mthca_icm *icm;
  119. struct mthca_icm_chunk *chunk = NULL;
  120. int cur_order;
  121. int ret;
  122. /* We use sg_set_buf for coherent allocs, which assumes low memory */
  123. BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM));
  124. icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  125. if (!icm)
  126. return icm;
  127. icm->refcount = 0;
  128. INIT_LIST_HEAD(&icm->chunk_list);
  129. cur_order = get_order(MTHCA_ICM_ALLOC_SIZE);
  130. while (npages > 0) {
  131. if (!chunk) {
  132. chunk = kmalloc(sizeof *chunk,
  133. gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN));
  134. if (!chunk)
  135. goto fail;
  136. sg_init_table(chunk->mem, MTHCA_ICM_CHUNK_LEN);
  137. chunk->npages = 0;
  138. chunk->nsg = 0;
  139. list_add_tail(&chunk->list, &icm->chunk_list);
  140. }
  141. while (1 << cur_order > npages)
  142. --cur_order;
  143. if (coherent)
  144. ret = mthca_alloc_icm_coherent(&dev->pdev->dev,
  145. &chunk->mem[chunk->npages],
  146. cur_order, gfp_mask);
  147. else
  148. ret = mthca_alloc_icm_pages(&chunk->mem[chunk->npages],
  149. cur_order, gfp_mask);
  150. if (!ret) {
  151. ++chunk->npages;
  152. if (coherent)
  153. ++chunk->nsg;
  154. else if (chunk->npages == MTHCA_ICM_CHUNK_LEN) {
  155. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  156. chunk->npages,
  157. PCI_DMA_BIDIRECTIONAL);
  158. if (chunk->nsg <= 0)
  159. goto fail;
  160. }
  161. if (chunk->npages == MTHCA_ICM_CHUNK_LEN)
  162. chunk = NULL;
  163. npages -= 1 << cur_order;
  164. } else {
  165. --cur_order;
  166. if (cur_order < 0)
  167. goto fail;
  168. }
  169. }
  170. if (!coherent && chunk) {
  171. chunk->nsg = pci_map_sg(dev->pdev, chunk->mem,
  172. chunk->npages,
  173. PCI_DMA_BIDIRECTIONAL);
  174. if (chunk->nsg <= 0)
  175. goto fail;
  176. }
  177. return icm;
  178. fail:
  179. mthca_free_icm(dev, icm, coherent);
  180. return NULL;
  181. }
  182. int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  183. {
  184. int i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  185. int ret = 0;
  186. u8 status;
  187. mutex_lock(&table->mutex);
  188. if (table->icm[i]) {
  189. ++table->icm[i]->refcount;
  190. goto out;
  191. }
  192. table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT,
  193. (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  194. __GFP_NOWARN, table->coherent);
  195. if (!table->icm[i]) {
  196. ret = -ENOMEM;
  197. goto out;
  198. }
  199. if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  200. &status) || status) {
  201. mthca_free_icm(dev, table->icm[i], table->coherent);
  202. table->icm[i] = NULL;
  203. ret = -ENOMEM;
  204. goto out;
  205. }
  206. ++table->icm[i]->refcount;
  207. out:
  208. mutex_unlock(&table->mutex);
  209. return ret;
  210. }
  211. void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj)
  212. {
  213. int i;
  214. u8 status;
  215. if (!mthca_is_memfree(dev))
  216. return;
  217. i = (obj & (table->num_obj - 1)) * table->obj_size / MTHCA_TABLE_CHUNK_SIZE;
  218. mutex_lock(&table->mutex);
  219. if (--table->icm[i]->refcount == 0) {
  220. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  221. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE,
  222. &status);
  223. mthca_free_icm(dev, table->icm[i], table->coherent);
  224. table->icm[i] = NULL;
  225. }
  226. mutex_unlock(&table->mutex);
  227. }
  228. void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle)
  229. {
  230. int idx, offset, dma_offset, i;
  231. struct mthca_icm_chunk *chunk;
  232. struct mthca_icm *icm;
  233. struct page *page = NULL;
  234. if (!table->lowmem)
  235. return NULL;
  236. mutex_lock(&table->mutex);
  237. idx = (obj & (table->num_obj - 1)) * table->obj_size;
  238. icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE];
  239. dma_offset = offset = idx % MTHCA_TABLE_CHUNK_SIZE;
  240. if (!icm)
  241. goto out;
  242. list_for_each_entry(chunk, &icm->chunk_list, list) {
  243. for (i = 0; i < chunk->npages; ++i) {
  244. if (dma_handle && dma_offset >= 0) {
  245. if (sg_dma_len(&chunk->mem[i]) > dma_offset)
  246. *dma_handle = sg_dma_address(&chunk->mem[i]) +
  247. dma_offset;
  248. dma_offset -= sg_dma_len(&chunk->mem[i]);
  249. }
  250. /* DMA mapping can merge pages but not split them,
  251. * so if we found the page, dma_handle has already
  252. * been assigned to. */
  253. if (chunk->mem[i].length > offset) {
  254. page = sg_page(&chunk->mem[i]);
  255. goto out;
  256. }
  257. offset -= chunk->mem[i].length;
  258. }
  259. }
  260. out:
  261. mutex_unlock(&table->mutex);
  262. return page ? lowmem_page_address(page) + offset : NULL;
  263. }
  264. int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  265. int start, int end)
  266. {
  267. int inc = MTHCA_TABLE_CHUNK_SIZE / table->obj_size;
  268. int i, err;
  269. for (i = start; i <= end; i += inc) {
  270. err = mthca_table_get(dev, table, i);
  271. if (err)
  272. goto fail;
  273. }
  274. return 0;
  275. fail:
  276. while (i > start) {
  277. i -= inc;
  278. mthca_table_put(dev, table, i);
  279. }
  280. return err;
  281. }
  282. void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table,
  283. int start, int end)
  284. {
  285. int i;
  286. if (!mthca_is_memfree(dev))
  287. return;
  288. for (i = start; i <= end; i += MTHCA_TABLE_CHUNK_SIZE / table->obj_size)
  289. mthca_table_put(dev, table, i);
  290. }
  291. struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev,
  292. u64 virt, int obj_size,
  293. int nobj, int reserved,
  294. int use_lowmem, int use_coherent)
  295. {
  296. struct mthca_icm_table *table;
  297. int obj_per_chunk;
  298. int num_icm;
  299. unsigned chunk_size;
  300. int i;
  301. u8 status;
  302. obj_per_chunk = MTHCA_TABLE_CHUNK_SIZE / obj_size;
  303. num_icm = DIV_ROUND_UP(nobj, obj_per_chunk);
  304. table = kmalloc(sizeof *table + num_icm * sizeof *table->icm, GFP_KERNEL);
  305. if (!table)
  306. return NULL;
  307. table->virt = virt;
  308. table->num_icm = num_icm;
  309. table->num_obj = nobj;
  310. table->obj_size = obj_size;
  311. table->lowmem = use_lowmem;
  312. table->coherent = use_coherent;
  313. mutex_init(&table->mutex);
  314. for (i = 0; i < num_icm; ++i)
  315. table->icm[i] = NULL;
  316. for (i = 0; i * MTHCA_TABLE_CHUNK_SIZE < reserved * obj_size; ++i) {
  317. chunk_size = MTHCA_TABLE_CHUNK_SIZE;
  318. if ((i + 1) * MTHCA_TABLE_CHUNK_SIZE > nobj * obj_size)
  319. chunk_size = nobj * obj_size - i * MTHCA_TABLE_CHUNK_SIZE;
  320. table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT,
  321. (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) |
  322. __GFP_NOWARN, use_coherent);
  323. if (!table->icm[i])
  324. goto err;
  325. if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE,
  326. &status) || status) {
  327. mthca_free_icm(dev, table->icm[i], table->coherent);
  328. table->icm[i] = NULL;
  329. goto err;
  330. }
  331. /*
  332. * Add a reference to this ICM chunk so that it never
  333. * gets freed (since it contains reserved firmware objects).
  334. */
  335. ++table->icm[i]->refcount;
  336. }
  337. return table;
  338. err:
  339. for (i = 0; i < num_icm; ++i)
  340. if (table->icm[i]) {
  341. mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE,
  342. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE,
  343. &status);
  344. mthca_free_icm(dev, table->icm[i], table->coherent);
  345. }
  346. kfree(table);
  347. return NULL;
  348. }
  349. void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table)
  350. {
  351. int i;
  352. u8 status;
  353. for (i = 0; i < table->num_icm; ++i)
  354. if (table->icm[i]) {
  355. mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE,
  356. MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE,
  357. &status);
  358. mthca_free_icm(dev, table->icm[i], table->coherent);
  359. }
  360. kfree(table);
  361. }
  362. static u64 mthca_uarc_virt(struct mthca_dev *dev, struct mthca_uar *uar, int page)
  363. {
  364. return dev->uar_table.uarc_base +
  365. uar->index * dev->uar_table.uarc_size +
  366. page * MTHCA_ICM_PAGE_SIZE;
  367. }
  368. int mthca_map_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  369. struct mthca_user_db_table *db_tab, int index, u64 uaddr)
  370. {
  371. struct page *pages[1];
  372. int ret = 0;
  373. u8 status;
  374. int i;
  375. if (!mthca_is_memfree(dev))
  376. return 0;
  377. if (index < 0 || index > dev->uar_table.uarc_size / 8)
  378. return -EINVAL;
  379. mutex_lock(&db_tab->mutex);
  380. i = index / MTHCA_DB_REC_PER_PAGE;
  381. if ((db_tab->page[i].refcount >= MTHCA_DB_REC_PER_PAGE) ||
  382. (db_tab->page[i].uvirt && db_tab->page[i].uvirt != uaddr) ||
  383. (uaddr & 4095)) {
  384. ret = -EINVAL;
  385. goto out;
  386. }
  387. if (db_tab->page[i].refcount) {
  388. ++db_tab->page[i].refcount;
  389. goto out;
  390. }
  391. ret = get_user_pages(current, current->mm, uaddr & PAGE_MASK, 1, 1, 0,
  392. pages, NULL);
  393. if (ret < 0)
  394. goto out;
  395. sg_set_page(&db_tab->page[i].mem, pages[0], MTHCA_ICM_PAGE_SIZE,
  396. uaddr & ~PAGE_MASK);
  397. ret = pci_map_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  398. if (ret < 0) {
  399. put_page(pages[0]);
  400. goto out;
  401. }
  402. ret = mthca_MAP_ICM_page(dev, sg_dma_address(&db_tab->page[i].mem),
  403. mthca_uarc_virt(dev, uar, i), &status);
  404. if (!ret && status)
  405. ret = -EINVAL;
  406. if (ret) {
  407. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  408. put_page(sg_page(&db_tab->page[i].mem));
  409. goto out;
  410. }
  411. db_tab->page[i].uvirt = uaddr;
  412. db_tab->page[i].refcount = 1;
  413. out:
  414. mutex_unlock(&db_tab->mutex);
  415. return ret;
  416. }
  417. void mthca_unmap_user_db(struct mthca_dev *dev, struct mthca_uar *uar,
  418. struct mthca_user_db_table *db_tab, int index)
  419. {
  420. if (!mthca_is_memfree(dev))
  421. return;
  422. /*
  423. * To make our bookkeeping simpler, we don't unmap DB
  424. * pages until we clean up the whole db table.
  425. */
  426. mutex_lock(&db_tab->mutex);
  427. --db_tab->page[index / MTHCA_DB_REC_PER_PAGE].refcount;
  428. mutex_unlock(&db_tab->mutex);
  429. }
  430. struct mthca_user_db_table *mthca_init_user_db_tab(struct mthca_dev *dev)
  431. {
  432. struct mthca_user_db_table *db_tab;
  433. int npages;
  434. int i;
  435. if (!mthca_is_memfree(dev))
  436. return NULL;
  437. npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE;
  438. db_tab = kmalloc(sizeof *db_tab + npages * sizeof *db_tab->page, GFP_KERNEL);
  439. if (!db_tab)
  440. return ERR_PTR(-ENOMEM);
  441. mutex_init(&db_tab->mutex);
  442. for (i = 0; i < npages; ++i) {
  443. db_tab->page[i].refcount = 0;
  444. db_tab->page[i].uvirt = 0;
  445. sg_init_table(&db_tab->page[i].mem, 1);
  446. }
  447. return db_tab;
  448. }
  449. void mthca_cleanup_user_db_tab(struct mthca_dev *dev, struct mthca_uar *uar,
  450. struct mthca_user_db_table *db_tab)
  451. {
  452. int i;
  453. u8 status;
  454. if (!mthca_is_memfree(dev))
  455. return;
  456. for (i = 0; i < dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE; ++i) {
  457. if (db_tab->page[i].uvirt) {
  458. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, uar, i), 1, &status);
  459. pci_unmap_sg(dev->pdev, &db_tab->page[i].mem, 1, PCI_DMA_TODEVICE);
  460. put_page(sg_page(&db_tab->page[i].mem));
  461. }
  462. }
  463. kfree(db_tab);
  464. }
  465. int mthca_alloc_db(struct mthca_dev *dev, enum mthca_db_type type,
  466. u32 qn, __be32 **db)
  467. {
  468. int group;
  469. int start, end, dir;
  470. int i, j;
  471. struct mthca_db_page *page;
  472. int ret = 0;
  473. u8 status;
  474. mutex_lock(&dev->db_tab->mutex);
  475. switch (type) {
  476. case MTHCA_DB_TYPE_CQ_ARM:
  477. case MTHCA_DB_TYPE_SQ:
  478. group = 0;
  479. start = 0;
  480. end = dev->db_tab->max_group1;
  481. dir = 1;
  482. break;
  483. case MTHCA_DB_TYPE_CQ_SET_CI:
  484. case MTHCA_DB_TYPE_RQ:
  485. case MTHCA_DB_TYPE_SRQ:
  486. group = 1;
  487. start = dev->db_tab->npages - 1;
  488. end = dev->db_tab->min_group2;
  489. dir = -1;
  490. break;
  491. default:
  492. ret = -EINVAL;
  493. goto out;
  494. }
  495. for (i = start; i != end; i += dir)
  496. if (dev->db_tab->page[i].db_rec &&
  497. !bitmap_full(dev->db_tab->page[i].used,
  498. MTHCA_DB_REC_PER_PAGE)) {
  499. page = dev->db_tab->page + i;
  500. goto found;
  501. }
  502. for (i = start; i != end; i += dir)
  503. if (!dev->db_tab->page[i].db_rec) {
  504. page = dev->db_tab->page + i;
  505. goto alloc;
  506. }
  507. if (dev->db_tab->max_group1 >= dev->db_tab->min_group2 - 1) {
  508. ret = -ENOMEM;
  509. goto out;
  510. }
  511. if (group == 0)
  512. ++dev->db_tab->max_group1;
  513. else
  514. --dev->db_tab->min_group2;
  515. page = dev->db_tab->page + end;
  516. alloc:
  517. page->db_rec = dma_alloc_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  518. &page->mapping, GFP_KERNEL);
  519. if (!page->db_rec) {
  520. ret = -ENOMEM;
  521. goto out;
  522. }
  523. memset(page->db_rec, 0, MTHCA_ICM_PAGE_SIZE);
  524. ret = mthca_MAP_ICM_page(dev, page->mapping,
  525. mthca_uarc_virt(dev, &dev->driver_uar, i), &status);
  526. if (!ret && status)
  527. ret = -EINVAL;
  528. if (ret) {
  529. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  530. page->db_rec, page->mapping);
  531. goto out;
  532. }
  533. bitmap_zero(page->used, MTHCA_DB_REC_PER_PAGE);
  534. found:
  535. j = find_first_zero_bit(page->used, MTHCA_DB_REC_PER_PAGE);
  536. set_bit(j, page->used);
  537. if (group == 1)
  538. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  539. ret = i * MTHCA_DB_REC_PER_PAGE + j;
  540. page->db_rec[j] = cpu_to_be64((qn << 8) | (type << 5));
  541. *db = (__be32 *) &page->db_rec[j];
  542. out:
  543. mutex_unlock(&dev->db_tab->mutex);
  544. return ret;
  545. }
  546. void mthca_free_db(struct mthca_dev *dev, int type, int db_index)
  547. {
  548. int i, j;
  549. struct mthca_db_page *page;
  550. u8 status;
  551. i = db_index / MTHCA_DB_REC_PER_PAGE;
  552. j = db_index % MTHCA_DB_REC_PER_PAGE;
  553. page = dev->db_tab->page + i;
  554. mutex_lock(&dev->db_tab->mutex);
  555. page->db_rec[j] = 0;
  556. if (i >= dev->db_tab->min_group2)
  557. j = MTHCA_DB_REC_PER_PAGE - 1 - j;
  558. clear_bit(j, page->used);
  559. if (bitmap_empty(page->used, MTHCA_DB_REC_PER_PAGE) &&
  560. i >= dev->db_tab->max_group1 - 1) {
  561. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  562. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  563. page->db_rec, page->mapping);
  564. page->db_rec = NULL;
  565. if (i == dev->db_tab->max_group1) {
  566. --dev->db_tab->max_group1;
  567. /* XXX may be able to unmap more pages now */
  568. }
  569. if (i == dev->db_tab->min_group2)
  570. ++dev->db_tab->min_group2;
  571. }
  572. mutex_unlock(&dev->db_tab->mutex);
  573. }
  574. int mthca_init_db_tab(struct mthca_dev *dev)
  575. {
  576. int i;
  577. if (!mthca_is_memfree(dev))
  578. return 0;
  579. dev->db_tab = kmalloc(sizeof *dev->db_tab, GFP_KERNEL);
  580. if (!dev->db_tab)
  581. return -ENOMEM;
  582. mutex_init(&dev->db_tab->mutex);
  583. dev->db_tab->npages = dev->uar_table.uarc_size / MTHCA_ICM_PAGE_SIZE;
  584. dev->db_tab->max_group1 = 0;
  585. dev->db_tab->min_group2 = dev->db_tab->npages - 1;
  586. dev->db_tab->page = kmalloc(dev->db_tab->npages *
  587. sizeof *dev->db_tab->page,
  588. GFP_KERNEL);
  589. if (!dev->db_tab->page) {
  590. kfree(dev->db_tab);
  591. return -ENOMEM;
  592. }
  593. for (i = 0; i < dev->db_tab->npages; ++i)
  594. dev->db_tab->page[i].db_rec = NULL;
  595. return 0;
  596. }
  597. void mthca_cleanup_db_tab(struct mthca_dev *dev)
  598. {
  599. int i;
  600. u8 status;
  601. if (!mthca_is_memfree(dev))
  602. return;
  603. /*
  604. * Because we don't always free our UARC pages when they
  605. * become empty to make mthca_free_db() simpler we need to
  606. * make a sweep through the doorbell pages and free any
  607. * leftover pages now.
  608. */
  609. for (i = 0; i < dev->db_tab->npages; ++i) {
  610. if (!dev->db_tab->page[i].db_rec)
  611. continue;
  612. if (!bitmap_empty(dev->db_tab->page[i].used, MTHCA_DB_REC_PER_PAGE))
  613. mthca_warn(dev, "Kernel UARC page %d not empty\n", i);
  614. mthca_UNMAP_ICM(dev, mthca_uarc_virt(dev, &dev->driver_uar, i), 1, &status);
  615. dma_free_coherent(&dev->pdev->dev, MTHCA_ICM_PAGE_SIZE,
  616. dev->db_tab->page[i].db_rec,
  617. dev->db_tab->page[i].mapping);
  618. }
  619. kfree(dev->db_tab->page);
  620. kfree(dev->db_tab);
  621. }