ehca_mrmw.c 62 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * MR/MW functions
  5. *
  6. * Authors: Dietmar Decker <ddecker@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #include <rdma/ib_umem.h>
  43. #include "ehca_iverbs.h"
  44. #include "ehca_mrmw.h"
  45. #include "hcp_if.h"
  46. #include "hipz_hw.h"
  47. #define NUM_CHUNKS(length, chunk_size) \
  48. (((length) + (chunk_size - 1)) / (chunk_size))
  49. /* max number of rpages (per hcall register_rpages) */
  50. #define MAX_RPAGES 512
  51. static struct kmem_cache *mr_cache;
  52. static struct kmem_cache *mw_cache;
  53. enum ehca_mr_pgsize {
  54. EHCA_MR_PGSIZE4K = 0x1000L,
  55. EHCA_MR_PGSIZE64K = 0x10000L,
  56. EHCA_MR_PGSIZE1M = 0x100000L,
  57. EHCA_MR_PGSIZE16M = 0x1000000L
  58. };
  59. #define EHCA_MR_PGSHIFT4K 12
  60. #define EHCA_MR_PGSHIFT64K 16
  61. #define EHCA_MR_PGSHIFT1M 20
  62. #define EHCA_MR_PGSHIFT16M 24
  63. static u32 ehca_encode_hwpage_size(u32 pgsize)
  64. {
  65. int log = ilog2(pgsize);
  66. WARN_ON(log < 12 || log > 24 || log & 3);
  67. return (log - 12) / 4;
  68. }
  69. static u64 ehca_get_max_hwpage_size(struct ehca_shca *shca)
  70. {
  71. return 1UL << ilog2(shca->hca_cap_mr_pgsize);
  72. }
  73. static struct ehca_mr *ehca_mr_new(void)
  74. {
  75. struct ehca_mr *me;
  76. me = kmem_cache_zalloc(mr_cache, GFP_KERNEL);
  77. if (me)
  78. spin_lock_init(&me->mrlock);
  79. else
  80. ehca_gen_err("alloc failed");
  81. return me;
  82. }
  83. static void ehca_mr_delete(struct ehca_mr *me)
  84. {
  85. kmem_cache_free(mr_cache, me);
  86. }
  87. static struct ehca_mw *ehca_mw_new(void)
  88. {
  89. struct ehca_mw *me;
  90. me = kmem_cache_zalloc(mw_cache, GFP_KERNEL);
  91. if (me)
  92. spin_lock_init(&me->mwlock);
  93. else
  94. ehca_gen_err("alloc failed");
  95. return me;
  96. }
  97. static void ehca_mw_delete(struct ehca_mw *me)
  98. {
  99. kmem_cache_free(mw_cache, me);
  100. }
  101. /*----------------------------------------------------------------------*/
  102. struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  103. {
  104. struct ib_mr *ib_mr;
  105. int ret;
  106. struct ehca_mr *e_maxmr;
  107. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  108. struct ehca_shca *shca =
  109. container_of(pd->device, struct ehca_shca, ib_device);
  110. if (shca->maxmr) {
  111. e_maxmr = ehca_mr_new();
  112. if (!e_maxmr) {
  113. ehca_err(&shca->ib_device, "out of memory");
  114. ib_mr = ERR_PTR(-ENOMEM);
  115. goto get_dma_mr_exit0;
  116. }
  117. ret = ehca_reg_maxmr(shca, e_maxmr, (u64 *)KERNELBASE,
  118. mr_access_flags, e_pd,
  119. &e_maxmr->ib.ib_mr.lkey,
  120. &e_maxmr->ib.ib_mr.rkey);
  121. if (ret) {
  122. ehca_mr_delete(e_maxmr);
  123. ib_mr = ERR_PTR(ret);
  124. goto get_dma_mr_exit0;
  125. }
  126. ib_mr = &e_maxmr->ib.ib_mr;
  127. } else {
  128. ehca_err(&shca->ib_device, "no internal max-MR exist!");
  129. ib_mr = ERR_PTR(-EINVAL);
  130. goto get_dma_mr_exit0;
  131. }
  132. get_dma_mr_exit0:
  133. if (IS_ERR(ib_mr))
  134. ehca_err(&shca->ib_device, "h_ret=%li pd=%p mr_access_flags=%x",
  135. PTR_ERR(ib_mr), pd, mr_access_flags);
  136. return ib_mr;
  137. } /* end ehca_get_dma_mr() */
  138. /*----------------------------------------------------------------------*/
  139. struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
  140. struct ib_phys_buf *phys_buf_array,
  141. int num_phys_buf,
  142. int mr_access_flags,
  143. u64 *iova_start)
  144. {
  145. struct ib_mr *ib_mr;
  146. int ret;
  147. struct ehca_mr *e_mr;
  148. struct ehca_shca *shca =
  149. container_of(pd->device, struct ehca_shca, ib_device);
  150. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  151. u64 size;
  152. if ((num_phys_buf <= 0) || !phys_buf_array) {
  153. ehca_err(pd->device, "bad input values: num_phys_buf=%x "
  154. "phys_buf_array=%p", num_phys_buf, phys_buf_array);
  155. ib_mr = ERR_PTR(-EINVAL);
  156. goto reg_phys_mr_exit0;
  157. }
  158. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  159. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  160. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  161. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  162. /*
  163. * Remote Write Access requires Local Write Access
  164. * Remote Atomic Access requires Local Write Access
  165. */
  166. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  167. mr_access_flags);
  168. ib_mr = ERR_PTR(-EINVAL);
  169. goto reg_phys_mr_exit0;
  170. }
  171. /* check physical buffer list and calculate size */
  172. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array, num_phys_buf,
  173. iova_start, &size);
  174. if (ret) {
  175. ib_mr = ERR_PTR(ret);
  176. goto reg_phys_mr_exit0;
  177. }
  178. if ((size == 0) ||
  179. (((u64)iova_start + size) < (u64)iova_start)) {
  180. ehca_err(pd->device, "bad input values: size=%lx iova_start=%p",
  181. size, iova_start);
  182. ib_mr = ERR_PTR(-EINVAL);
  183. goto reg_phys_mr_exit0;
  184. }
  185. e_mr = ehca_mr_new();
  186. if (!e_mr) {
  187. ehca_err(pd->device, "out of memory");
  188. ib_mr = ERR_PTR(-ENOMEM);
  189. goto reg_phys_mr_exit0;
  190. }
  191. /* register MR on HCA */
  192. if (ehca_mr_is_maxmr(size, iova_start)) {
  193. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  194. ret = ehca_reg_maxmr(shca, e_mr, iova_start, mr_access_flags,
  195. e_pd, &e_mr->ib.ib_mr.lkey,
  196. &e_mr->ib.ib_mr.rkey);
  197. if (ret) {
  198. ib_mr = ERR_PTR(ret);
  199. goto reg_phys_mr_exit1;
  200. }
  201. } else {
  202. struct ehca_mr_pginfo pginfo;
  203. u32 num_kpages;
  204. u32 num_hwpages;
  205. u64 hw_pgsize;
  206. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size,
  207. PAGE_SIZE);
  208. /* for kernel space we try most possible pgsize */
  209. hw_pgsize = ehca_get_max_hwpage_size(shca);
  210. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size,
  211. hw_pgsize);
  212. memset(&pginfo, 0, sizeof(pginfo));
  213. pginfo.type = EHCA_MR_PGI_PHYS;
  214. pginfo.num_kpages = num_kpages;
  215. pginfo.hwpage_size = hw_pgsize;
  216. pginfo.num_hwpages = num_hwpages;
  217. pginfo.u.phy.num_phys_buf = num_phys_buf;
  218. pginfo.u.phy.phys_buf_array = phys_buf_array;
  219. pginfo.next_hwpage =
  220. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  221. ret = ehca_reg_mr(shca, e_mr, iova_start, size, mr_access_flags,
  222. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  223. &e_mr->ib.ib_mr.rkey);
  224. if (ret) {
  225. ib_mr = ERR_PTR(ret);
  226. goto reg_phys_mr_exit1;
  227. }
  228. }
  229. /* successful registration of all pages */
  230. return &e_mr->ib.ib_mr;
  231. reg_phys_mr_exit1:
  232. ehca_mr_delete(e_mr);
  233. reg_phys_mr_exit0:
  234. if (IS_ERR(ib_mr))
  235. ehca_err(pd->device, "h_ret=%li pd=%p phys_buf_array=%p "
  236. "num_phys_buf=%x mr_access_flags=%x iova_start=%p",
  237. PTR_ERR(ib_mr), pd, phys_buf_array,
  238. num_phys_buf, mr_access_flags, iova_start);
  239. return ib_mr;
  240. } /* end ehca_reg_phys_mr() */
  241. /*----------------------------------------------------------------------*/
  242. struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  243. u64 virt, int mr_access_flags,
  244. struct ib_udata *udata)
  245. {
  246. struct ib_mr *ib_mr;
  247. struct ehca_mr *e_mr;
  248. struct ehca_shca *shca =
  249. container_of(pd->device, struct ehca_shca, ib_device);
  250. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  251. struct ehca_mr_pginfo pginfo;
  252. int ret, page_shift;
  253. u32 num_kpages;
  254. u32 num_hwpages;
  255. u64 hwpage_size;
  256. if (!pd) {
  257. ehca_gen_err("bad pd=%p", pd);
  258. return ERR_PTR(-EFAULT);
  259. }
  260. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  261. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  262. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  263. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  264. /*
  265. * Remote Write Access requires Local Write Access
  266. * Remote Atomic Access requires Local Write Access
  267. */
  268. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  269. mr_access_flags);
  270. ib_mr = ERR_PTR(-EINVAL);
  271. goto reg_user_mr_exit0;
  272. }
  273. if (length == 0 || virt + length < virt) {
  274. ehca_err(pd->device, "bad input values: length=%lx "
  275. "virt_base=%lx", length, virt);
  276. ib_mr = ERR_PTR(-EINVAL);
  277. goto reg_user_mr_exit0;
  278. }
  279. e_mr = ehca_mr_new();
  280. if (!e_mr) {
  281. ehca_err(pd->device, "out of memory");
  282. ib_mr = ERR_PTR(-ENOMEM);
  283. goto reg_user_mr_exit0;
  284. }
  285. e_mr->umem = ib_umem_get(pd->uobject->context, start, length,
  286. mr_access_flags, 0);
  287. if (IS_ERR(e_mr->umem)) {
  288. ib_mr = (void *)e_mr->umem;
  289. goto reg_user_mr_exit1;
  290. }
  291. if (e_mr->umem->page_size != PAGE_SIZE) {
  292. ehca_err(pd->device, "page size not supported, "
  293. "e_mr->umem->page_size=%x", e_mr->umem->page_size);
  294. ib_mr = ERR_PTR(-EINVAL);
  295. goto reg_user_mr_exit2;
  296. }
  297. /* determine number of MR pages */
  298. num_kpages = NUM_CHUNKS((virt % PAGE_SIZE) + length, PAGE_SIZE);
  299. /* select proper hw_pgsize */
  300. page_shift = PAGE_SHIFT;
  301. if (e_mr->umem->hugetlb) {
  302. /* determine page_shift, clamp between 4K and 16M */
  303. page_shift = (fls64(length - 1) + 3) & ~3;
  304. page_shift = min(max(page_shift, EHCA_MR_PGSHIFT4K),
  305. EHCA_MR_PGSHIFT16M);
  306. }
  307. hwpage_size = 1UL << page_shift;
  308. /* now that we have the desired page size, shift until it's
  309. * supported, too. 4K is always supported, so this terminates.
  310. */
  311. while (!(hwpage_size & shca->hca_cap_mr_pgsize))
  312. hwpage_size >>= 4;
  313. reg_user_mr_fallback:
  314. num_hwpages = NUM_CHUNKS((virt % hwpage_size) + length, hwpage_size);
  315. /* register MR on HCA */
  316. memset(&pginfo, 0, sizeof(pginfo));
  317. pginfo.type = EHCA_MR_PGI_USER;
  318. pginfo.hwpage_size = hwpage_size;
  319. pginfo.num_kpages = num_kpages;
  320. pginfo.num_hwpages = num_hwpages;
  321. pginfo.u.usr.region = e_mr->umem;
  322. pginfo.next_hwpage = e_mr->umem->offset / hwpage_size;
  323. pginfo.u.usr.next_chunk = list_prepare_entry(pginfo.u.usr.next_chunk,
  324. (&e_mr->umem->chunk_list),
  325. list);
  326. ret = ehca_reg_mr(shca, e_mr, (u64 *)virt, length, mr_access_flags,
  327. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  328. &e_mr->ib.ib_mr.rkey);
  329. if (ret == -EINVAL && pginfo.hwpage_size > PAGE_SIZE) {
  330. ehca_warn(pd->device, "failed to register mr "
  331. "with hwpage_size=%lx", hwpage_size);
  332. ehca_info(pd->device, "try to register mr with "
  333. "kpage_size=%lx", PAGE_SIZE);
  334. /*
  335. * this means kpages are not contiguous for a hw page
  336. * try kernel page size as fallback solution
  337. */
  338. hwpage_size = PAGE_SIZE;
  339. goto reg_user_mr_fallback;
  340. }
  341. if (ret) {
  342. ib_mr = ERR_PTR(ret);
  343. goto reg_user_mr_exit2;
  344. }
  345. /* successful registration of all pages */
  346. return &e_mr->ib.ib_mr;
  347. reg_user_mr_exit2:
  348. ib_umem_release(e_mr->umem);
  349. reg_user_mr_exit1:
  350. ehca_mr_delete(e_mr);
  351. reg_user_mr_exit0:
  352. if (IS_ERR(ib_mr))
  353. ehca_err(pd->device, "rc=%li pd=%p mr_access_flags=%x udata=%p",
  354. PTR_ERR(ib_mr), pd, mr_access_flags, udata);
  355. return ib_mr;
  356. } /* end ehca_reg_user_mr() */
  357. /*----------------------------------------------------------------------*/
  358. int ehca_rereg_phys_mr(struct ib_mr *mr,
  359. int mr_rereg_mask,
  360. struct ib_pd *pd,
  361. struct ib_phys_buf *phys_buf_array,
  362. int num_phys_buf,
  363. int mr_access_flags,
  364. u64 *iova_start)
  365. {
  366. int ret;
  367. struct ehca_shca *shca =
  368. container_of(mr->device, struct ehca_shca, ib_device);
  369. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  370. u64 new_size;
  371. u64 *new_start;
  372. u32 new_acl;
  373. struct ehca_pd *new_pd;
  374. u32 tmp_lkey, tmp_rkey;
  375. unsigned long sl_flags;
  376. u32 num_kpages = 0;
  377. u32 num_hwpages = 0;
  378. struct ehca_mr_pginfo pginfo;
  379. if (!(mr_rereg_mask & IB_MR_REREG_TRANS)) {
  380. /* TODO not supported, because PHYP rereg hCall needs pages */
  381. ehca_err(mr->device, "rereg without IB_MR_REREG_TRANS not "
  382. "supported yet, mr_rereg_mask=%x", mr_rereg_mask);
  383. ret = -EINVAL;
  384. goto rereg_phys_mr_exit0;
  385. }
  386. if (mr_rereg_mask & IB_MR_REREG_PD) {
  387. if (!pd) {
  388. ehca_err(mr->device, "rereg with bad pd, pd=%p "
  389. "mr_rereg_mask=%x", pd, mr_rereg_mask);
  390. ret = -EINVAL;
  391. goto rereg_phys_mr_exit0;
  392. }
  393. }
  394. if ((mr_rereg_mask &
  395. ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS)) ||
  396. (mr_rereg_mask == 0)) {
  397. ret = -EINVAL;
  398. goto rereg_phys_mr_exit0;
  399. }
  400. /* check other parameters */
  401. if (e_mr == shca->maxmr) {
  402. /* should be impossible, however reject to be sure */
  403. ehca_err(mr->device, "rereg internal max-MR impossible, mr=%p "
  404. "shca->maxmr=%p mr->lkey=%x",
  405. mr, shca->maxmr, mr->lkey);
  406. ret = -EINVAL;
  407. goto rereg_phys_mr_exit0;
  408. }
  409. if (mr_rereg_mask & IB_MR_REREG_TRANS) { /* transl., i.e. addr/size */
  410. if (e_mr->flags & EHCA_MR_FLAG_FMR) {
  411. ehca_err(mr->device, "not supported for FMR, mr=%p "
  412. "flags=%x", mr, e_mr->flags);
  413. ret = -EINVAL;
  414. goto rereg_phys_mr_exit0;
  415. }
  416. if (!phys_buf_array || num_phys_buf <= 0) {
  417. ehca_err(mr->device, "bad input values mr_rereg_mask=%x"
  418. " phys_buf_array=%p num_phys_buf=%x",
  419. mr_rereg_mask, phys_buf_array, num_phys_buf);
  420. ret = -EINVAL;
  421. goto rereg_phys_mr_exit0;
  422. }
  423. }
  424. if ((mr_rereg_mask & IB_MR_REREG_ACCESS) && /* change ACL */
  425. (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  426. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  427. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  428. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)))) {
  429. /*
  430. * Remote Write Access requires Local Write Access
  431. * Remote Atomic Access requires Local Write Access
  432. */
  433. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x "
  434. "mr_access_flags=%x", mr_rereg_mask, mr_access_flags);
  435. ret = -EINVAL;
  436. goto rereg_phys_mr_exit0;
  437. }
  438. /* set requested values dependent on rereg request */
  439. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  440. new_start = e_mr->start;
  441. new_size = e_mr->size;
  442. new_acl = e_mr->acl;
  443. new_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  444. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  445. u64 hw_pgsize = ehca_get_max_hwpage_size(shca);
  446. new_start = iova_start; /* change address */
  447. /* check physical buffer list and calculate size */
  448. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array,
  449. num_phys_buf, iova_start,
  450. &new_size);
  451. if (ret)
  452. goto rereg_phys_mr_exit1;
  453. if ((new_size == 0) ||
  454. (((u64)iova_start + new_size) < (u64)iova_start)) {
  455. ehca_err(mr->device, "bad input values: new_size=%lx "
  456. "iova_start=%p", new_size, iova_start);
  457. ret = -EINVAL;
  458. goto rereg_phys_mr_exit1;
  459. }
  460. num_kpages = NUM_CHUNKS(((u64)new_start % PAGE_SIZE) +
  461. new_size, PAGE_SIZE);
  462. num_hwpages = NUM_CHUNKS(((u64)new_start % hw_pgsize) +
  463. new_size, hw_pgsize);
  464. memset(&pginfo, 0, sizeof(pginfo));
  465. pginfo.type = EHCA_MR_PGI_PHYS;
  466. pginfo.num_kpages = num_kpages;
  467. pginfo.hwpage_size = hw_pgsize;
  468. pginfo.num_hwpages = num_hwpages;
  469. pginfo.u.phy.num_phys_buf = num_phys_buf;
  470. pginfo.u.phy.phys_buf_array = phys_buf_array;
  471. pginfo.next_hwpage =
  472. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  473. }
  474. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  475. new_acl = mr_access_flags;
  476. if (mr_rereg_mask & IB_MR_REREG_PD)
  477. new_pd = container_of(pd, struct ehca_pd, ib_pd);
  478. ret = ehca_rereg_mr(shca, e_mr, new_start, new_size, new_acl,
  479. new_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  480. if (ret)
  481. goto rereg_phys_mr_exit1;
  482. /* successful reregistration */
  483. if (mr_rereg_mask & IB_MR_REREG_PD)
  484. mr->pd = pd;
  485. mr->lkey = tmp_lkey;
  486. mr->rkey = tmp_rkey;
  487. rereg_phys_mr_exit1:
  488. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  489. rereg_phys_mr_exit0:
  490. if (ret)
  491. ehca_err(mr->device, "ret=%i mr=%p mr_rereg_mask=%x pd=%p "
  492. "phys_buf_array=%p num_phys_buf=%x mr_access_flags=%x "
  493. "iova_start=%p",
  494. ret, mr, mr_rereg_mask, pd, phys_buf_array,
  495. num_phys_buf, mr_access_flags, iova_start);
  496. return ret;
  497. } /* end ehca_rereg_phys_mr() */
  498. /*----------------------------------------------------------------------*/
  499. int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
  500. {
  501. int ret = 0;
  502. u64 h_ret;
  503. struct ehca_shca *shca =
  504. container_of(mr->device, struct ehca_shca, ib_device);
  505. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  506. unsigned long sl_flags;
  507. struct ehca_mr_hipzout_parms hipzout;
  508. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  509. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  510. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  511. ret = -EINVAL;
  512. goto query_mr_exit0;
  513. }
  514. memset(mr_attr, 0, sizeof(struct ib_mr_attr));
  515. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  516. h_ret = hipz_h_query_mr(shca->ipz_hca_handle, e_mr, &hipzout);
  517. if (h_ret != H_SUCCESS) {
  518. ehca_err(mr->device, "hipz_mr_query failed, h_ret=%li mr=%p "
  519. "hca_hndl=%lx mr_hndl=%lx lkey=%x",
  520. h_ret, mr, shca->ipz_hca_handle.handle,
  521. e_mr->ipz_mr_handle.handle, mr->lkey);
  522. ret = ehca2ib_return_code(h_ret);
  523. goto query_mr_exit1;
  524. }
  525. mr_attr->pd = mr->pd;
  526. mr_attr->device_virt_addr = hipzout.vaddr;
  527. mr_attr->size = hipzout.len;
  528. mr_attr->lkey = hipzout.lkey;
  529. mr_attr->rkey = hipzout.rkey;
  530. ehca_mrmw_reverse_map_acl(&hipzout.acl, &mr_attr->mr_access_flags);
  531. query_mr_exit1:
  532. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  533. query_mr_exit0:
  534. if (ret)
  535. ehca_err(mr->device, "ret=%i mr=%p mr_attr=%p",
  536. ret, mr, mr_attr);
  537. return ret;
  538. } /* end ehca_query_mr() */
  539. /*----------------------------------------------------------------------*/
  540. int ehca_dereg_mr(struct ib_mr *mr)
  541. {
  542. int ret = 0;
  543. u64 h_ret;
  544. struct ehca_shca *shca =
  545. container_of(mr->device, struct ehca_shca, ib_device);
  546. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  547. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  548. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  549. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  550. ret = -EINVAL;
  551. goto dereg_mr_exit0;
  552. } else if (e_mr == shca->maxmr) {
  553. /* should be impossible, however reject to be sure */
  554. ehca_err(mr->device, "dereg internal max-MR impossible, mr=%p "
  555. "shca->maxmr=%p mr->lkey=%x",
  556. mr, shca->maxmr, mr->lkey);
  557. ret = -EINVAL;
  558. goto dereg_mr_exit0;
  559. }
  560. /* TODO: BUSY: MR still has bound window(s) */
  561. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  562. if (h_ret != H_SUCCESS) {
  563. ehca_err(mr->device, "hipz_free_mr failed, h_ret=%li shca=%p "
  564. "e_mr=%p hca_hndl=%lx mr_hndl=%lx mr->lkey=%x",
  565. h_ret, shca, e_mr, shca->ipz_hca_handle.handle,
  566. e_mr->ipz_mr_handle.handle, mr->lkey);
  567. ret = ehca2ib_return_code(h_ret);
  568. goto dereg_mr_exit0;
  569. }
  570. if (e_mr->umem)
  571. ib_umem_release(e_mr->umem);
  572. /* successful deregistration */
  573. ehca_mr_delete(e_mr);
  574. dereg_mr_exit0:
  575. if (ret)
  576. ehca_err(mr->device, "ret=%i mr=%p", ret, mr);
  577. return ret;
  578. } /* end ehca_dereg_mr() */
  579. /*----------------------------------------------------------------------*/
  580. struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
  581. {
  582. struct ib_mw *ib_mw;
  583. u64 h_ret;
  584. struct ehca_mw *e_mw;
  585. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  586. struct ehca_shca *shca =
  587. container_of(pd->device, struct ehca_shca, ib_device);
  588. struct ehca_mw_hipzout_parms hipzout;
  589. e_mw = ehca_mw_new();
  590. if (!e_mw) {
  591. ib_mw = ERR_PTR(-ENOMEM);
  592. goto alloc_mw_exit0;
  593. }
  594. h_ret = hipz_h_alloc_resource_mw(shca->ipz_hca_handle, e_mw,
  595. e_pd->fw_pd, &hipzout);
  596. if (h_ret != H_SUCCESS) {
  597. ehca_err(pd->device, "hipz_mw_allocate failed, h_ret=%li "
  598. "shca=%p hca_hndl=%lx mw=%p",
  599. h_ret, shca, shca->ipz_hca_handle.handle, e_mw);
  600. ib_mw = ERR_PTR(ehca2ib_return_code(h_ret));
  601. goto alloc_mw_exit1;
  602. }
  603. /* successful MW allocation */
  604. e_mw->ipz_mw_handle = hipzout.handle;
  605. e_mw->ib_mw.rkey = hipzout.rkey;
  606. return &e_mw->ib_mw;
  607. alloc_mw_exit1:
  608. ehca_mw_delete(e_mw);
  609. alloc_mw_exit0:
  610. if (IS_ERR(ib_mw))
  611. ehca_err(pd->device, "h_ret=%li pd=%p", PTR_ERR(ib_mw), pd);
  612. return ib_mw;
  613. } /* end ehca_alloc_mw() */
  614. /*----------------------------------------------------------------------*/
  615. int ehca_bind_mw(struct ib_qp *qp,
  616. struct ib_mw *mw,
  617. struct ib_mw_bind *mw_bind)
  618. {
  619. /* TODO: not supported up to now */
  620. ehca_gen_err("bind MW currently not supported by HCAD");
  621. return -EPERM;
  622. } /* end ehca_bind_mw() */
  623. /*----------------------------------------------------------------------*/
  624. int ehca_dealloc_mw(struct ib_mw *mw)
  625. {
  626. u64 h_ret;
  627. struct ehca_shca *shca =
  628. container_of(mw->device, struct ehca_shca, ib_device);
  629. struct ehca_mw *e_mw = container_of(mw, struct ehca_mw, ib_mw);
  630. h_ret = hipz_h_free_resource_mw(shca->ipz_hca_handle, e_mw);
  631. if (h_ret != H_SUCCESS) {
  632. ehca_err(mw->device, "hipz_free_mw failed, h_ret=%li shca=%p "
  633. "mw=%p rkey=%x hca_hndl=%lx mw_hndl=%lx",
  634. h_ret, shca, mw, mw->rkey, shca->ipz_hca_handle.handle,
  635. e_mw->ipz_mw_handle.handle);
  636. return ehca2ib_return_code(h_ret);
  637. }
  638. /* successful deallocation */
  639. ehca_mw_delete(e_mw);
  640. return 0;
  641. } /* end ehca_dealloc_mw() */
  642. /*----------------------------------------------------------------------*/
  643. struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
  644. int mr_access_flags,
  645. struct ib_fmr_attr *fmr_attr)
  646. {
  647. struct ib_fmr *ib_fmr;
  648. struct ehca_shca *shca =
  649. container_of(pd->device, struct ehca_shca, ib_device);
  650. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  651. struct ehca_mr *e_fmr;
  652. int ret;
  653. u32 tmp_lkey, tmp_rkey;
  654. struct ehca_mr_pginfo pginfo;
  655. u64 hw_pgsize;
  656. /* check other parameters */
  657. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  658. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  659. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  660. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  661. /*
  662. * Remote Write Access requires Local Write Access
  663. * Remote Atomic Access requires Local Write Access
  664. */
  665. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  666. mr_access_flags);
  667. ib_fmr = ERR_PTR(-EINVAL);
  668. goto alloc_fmr_exit0;
  669. }
  670. if (mr_access_flags & IB_ACCESS_MW_BIND) {
  671. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  672. mr_access_flags);
  673. ib_fmr = ERR_PTR(-EINVAL);
  674. goto alloc_fmr_exit0;
  675. }
  676. if ((fmr_attr->max_pages == 0) || (fmr_attr->max_maps == 0)) {
  677. ehca_err(pd->device, "bad input values: fmr_attr->max_pages=%x "
  678. "fmr_attr->max_maps=%x fmr_attr->page_shift=%x",
  679. fmr_attr->max_pages, fmr_attr->max_maps,
  680. fmr_attr->page_shift);
  681. ib_fmr = ERR_PTR(-EINVAL);
  682. goto alloc_fmr_exit0;
  683. }
  684. hw_pgsize = 1 << fmr_attr->page_shift;
  685. if (!(hw_pgsize & shca->hca_cap_mr_pgsize)) {
  686. ehca_err(pd->device, "unsupported fmr_attr->page_shift=%x",
  687. fmr_attr->page_shift);
  688. ib_fmr = ERR_PTR(-EINVAL);
  689. goto alloc_fmr_exit0;
  690. }
  691. e_fmr = ehca_mr_new();
  692. if (!e_fmr) {
  693. ib_fmr = ERR_PTR(-ENOMEM);
  694. goto alloc_fmr_exit0;
  695. }
  696. e_fmr->flags |= EHCA_MR_FLAG_FMR;
  697. /* register MR on HCA */
  698. memset(&pginfo, 0, sizeof(pginfo));
  699. pginfo.hwpage_size = hw_pgsize;
  700. /*
  701. * pginfo.num_hwpages==0, ie register_rpages() will not be called
  702. * but deferred to map_phys_fmr()
  703. */
  704. ret = ehca_reg_mr(shca, e_fmr, NULL,
  705. fmr_attr->max_pages * (1 << fmr_attr->page_shift),
  706. mr_access_flags, e_pd, &pginfo,
  707. &tmp_lkey, &tmp_rkey);
  708. if (ret) {
  709. ib_fmr = ERR_PTR(ret);
  710. goto alloc_fmr_exit1;
  711. }
  712. /* successful */
  713. e_fmr->hwpage_size = hw_pgsize;
  714. e_fmr->fmr_page_size = 1 << fmr_attr->page_shift;
  715. e_fmr->fmr_max_pages = fmr_attr->max_pages;
  716. e_fmr->fmr_max_maps = fmr_attr->max_maps;
  717. e_fmr->fmr_map_cnt = 0;
  718. return &e_fmr->ib.ib_fmr;
  719. alloc_fmr_exit1:
  720. ehca_mr_delete(e_fmr);
  721. alloc_fmr_exit0:
  722. return ib_fmr;
  723. } /* end ehca_alloc_fmr() */
  724. /*----------------------------------------------------------------------*/
  725. int ehca_map_phys_fmr(struct ib_fmr *fmr,
  726. u64 *page_list,
  727. int list_len,
  728. u64 iova)
  729. {
  730. int ret;
  731. struct ehca_shca *shca =
  732. container_of(fmr->device, struct ehca_shca, ib_device);
  733. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  734. struct ehca_pd *e_pd = container_of(fmr->pd, struct ehca_pd, ib_pd);
  735. struct ehca_mr_pginfo pginfo;
  736. u32 tmp_lkey, tmp_rkey;
  737. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  738. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  739. e_fmr, e_fmr->flags);
  740. ret = -EINVAL;
  741. goto map_phys_fmr_exit0;
  742. }
  743. ret = ehca_fmr_check_page_list(e_fmr, page_list, list_len);
  744. if (ret)
  745. goto map_phys_fmr_exit0;
  746. if (iova % e_fmr->fmr_page_size) {
  747. /* only whole-numbered pages */
  748. ehca_err(fmr->device, "bad iova, iova=%lx fmr_page_size=%x",
  749. iova, e_fmr->fmr_page_size);
  750. ret = -EINVAL;
  751. goto map_phys_fmr_exit0;
  752. }
  753. if (e_fmr->fmr_map_cnt >= e_fmr->fmr_max_maps) {
  754. /* HCAD does not limit the maps, however trace this anyway */
  755. ehca_info(fmr->device, "map limit exceeded, fmr=%p "
  756. "e_fmr->fmr_map_cnt=%x e_fmr->fmr_max_maps=%x",
  757. fmr, e_fmr->fmr_map_cnt, e_fmr->fmr_max_maps);
  758. }
  759. memset(&pginfo, 0, sizeof(pginfo));
  760. pginfo.type = EHCA_MR_PGI_FMR;
  761. pginfo.num_kpages = list_len;
  762. pginfo.hwpage_size = e_fmr->hwpage_size;
  763. pginfo.num_hwpages =
  764. list_len * e_fmr->fmr_page_size / pginfo.hwpage_size;
  765. pginfo.u.fmr.page_list = page_list;
  766. pginfo.next_hwpage =
  767. (iova & (e_fmr->fmr_page_size-1)) / pginfo.hwpage_size;
  768. pginfo.u.fmr.fmr_pgsize = e_fmr->fmr_page_size;
  769. ret = ehca_rereg_mr(shca, e_fmr, (u64 *)iova,
  770. list_len * e_fmr->fmr_page_size,
  771. e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  772. if (ret)
  773. goto map_phys_fmr_exit0;
  774. /* successful reregistration */
  775. e_fmr->fmr_map_cnt++;
  776. e_fmr->ib.ib_fmr.lkey = tmp_lkey;
  777. e_fmr->ib.ib_fmr.rkey = tmp_rkey;
  778. return 0;
  779. map_phys_fmr_exit0:
  780. if (ret)
  781. ehca_err(fmr->device, "ret=%i fmr=%p page_list=%p list_len=%x "
  782. "iova=%lx", ret, fmr, page_list, list_len, iova);
  783. return ret;
  784. } /* end ehca_map_phys_fmr() */
  785. /*----------------------------------------------------------------------*/
  786. int ehca_unmap_fmr(struct list_head *fmr_list)
  787. {
  788. int ret = 0;
  789. struct ib_fmr *ib_fmr;
  790. struct ehca_shca *shca = NULL;
  791. struct ehca_shca *prev_shca;
  792. struct ehca_mr *e_fmr;
  793. u32 num_fmr = 0;
  794. u32 unmap_fmr_cnt = 0;
  795. /* check all FMR belong to same SHCA, and check internal flag */
  796. list_for_each_entry(ib_fmr, fmr_list, list) {
  797. prev_shca = shca;
  798. if (!ib_fmr) {
  799. ehca_gen_err("bad fmr=%p in list", ib_fmr);
  800. ret = -EINVAL;
  801. goto unmap_fmr_exit0;
  802. }
  803. shca = container_of(ib_fmr->device, struct ehca_shca,
  804. ib_device);
  805. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  806. if ((shca != prev_shca) && prev_shca) {
  807. ehca_err(&shca->ib_device, "SHCA mismatch, shca=%p "
  808. "prev_shca=%p e_fmr=%p",
  809. shca, prev_shca, e_fmr);
  810. ret = -EINVAL;
  811. goto unmap_fmr_exit0;
  812. }
  813. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  814. ehca_err(&shca->ib_device, "not a FMR, e_fmr=%p "
  815. "e_fmr->flags=%x", e_fmr, e_fmr->flags);
  816. ret = -EINVAL;
  817. goto unmap_fmr_exit0;
  818. }
  819. num_fmr++;
  820. }
  821. /* loop over all FMRs to unmap */
  822. list_for_each_entry(ib_fmr, fmr_list, list) {
  823. unmap_fmr_cnt++;
  824. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  825. shca = container_of(ib_fmr->device, struct ehca_shca,
  826. ib_device);
  827. ret = ehca_unmap_one_fmr(shca, e_fmr);
  828. if (ret) {
  829. /* unmap failed, stop unmapping of rest of FMRs */
  830. ehca_err(&shca->ib_device, "unmap of one FMR failed, "
  831. "stop rest, e_fmr=%p num_fmr=%x "
  832. "unmap_fmr_cnt=%x lkey=%x", e_fmr, num_fmr,
  833. unmap_fmr_cnt, e_fmr->ib.ib_fmr.lkey);
  834. goto unmap_fmr_exit0;
  835. }
  836. }
  837. unmap_fmr_exit0:
  838. if (ret)
  839. ehca_gen_err("ret=%i fmr_list=%p num_fmr=%x unmap_fmr_cnt=%x",
  840. ret, fmr_list, num_fmr, unmap_fmr_cnt);
  841. return ret;
  842. } /* end ehca_unmap_fmr() */
  843. /*----------------------------------------------------------------------*/
  844. int ehca_dealloc_fmr(struct ib_fmr *fmr)
  845. {
  846. int ret;
  847. u64 h_ret;
  848. struct ehca_shca *shca =
  849. container_of(fmr->device, struct ehca_shca, ib_device);
  850. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  851. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  852. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  853. e_fmr, e_fmr->flags);
  854. ret = -EINVAL;
  855. goto free_fmr_exit0;
  856. }
  857. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  858. if (h_ret != H_SUCCESS) {
  859. ehca_err(fmr->device, "hipz_free_mr failed, h_ret=%li e_fmr=%p "
  860. "hca_hndl=%lx fmr_hndl=%lx fmr->lkey=%x",
  861. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  862. e_fmr->ipz_mr_handle.handle, fmr->lkey);
  863. ret = ehca2ib_return_code(h_ret);
  864. goto free_fmr_exit0;
  865. }
  866. /* successful deregistration */
  867. ehca_mr_delete(e_fmr);
  868. return 0;
  869. free_fmr_exit0:
  870. if (ret)
  871. ehca_err(&shca->ib_device, "ret=%i fmr=%p", ret, fmr);
  872. return ret;
  873. } /* end ehca_dealloc_fmr() */
  874. /*----------------------------------------------------------------------*/
  875. int ehca_reg_mr(struct ehca_shca *shca,
  876. struct ehca_mr *e_mr,
  877. u64 *iova_start,
  878. u64 size,
  879. int acl,
  880. struct ehca_pd *e_pd,
  881. struct ehca_mr_pginfo *pginfo,
  882. u32 *lkey, /*OUT*/
  883. u32 *rkey) /*OUT*/
  884. {
  885. int ret;
  886. u64 h_ret;
  887. u32 hipz_acl;
  888. struct ehca_mr_hipzout_parms hipzout;
  889. ehca_mrmw_map_acl(acl, &hipz_acl);
  890. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  891. if (ehca_use_hp_mr == 1)
  892. hipz_acl |= 0x00000001;
  893. h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
  894. (u64)iova_start, size, hipz_acl,
  895. e_pd->fw_pd, &hipzout);
  896. if (h_ret != H_SUCCESS) {
  897. ehca_err(&shca->ib_device, "hipz_alloc_mr failed, h_ret=%li "
  898. "hca_hndl=%lx", h_ret, shca->ipz_hca_handle.handle);
  899. ret = ehca2ib_return_code(h_ret);
  900. goto ehca_reg_mr_exit0;
  901. }
  902. e_mr->ipz_mr_handle = hipzout.handle;
  903. ret = ehca_reg_mr_rpages(shca, e_mr, pginfo);
  904. if (ret)
  905. goto ehca_reg_mr_exit1;
  906. /* successful registration */
  907. e_mr->num_kpages = pginfo->num_kpages;
  908. e_mr->num_hwpages = pginfo->num_hwpages;
  909. e_mr->hwpage_size = pginfo->hwpage_size;
  910. e_mr->start = iova_start;
  911. e_mr->size = size;
  912. e_mr->acl = acl;
  913. *lkey = hipzout.lkey;
  914. *rkey = hipzout.rkey;
  915. return 0;
  916. ehca_reg_mr_exit1:
  917. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  918. if (h_ret != H_SUCCESS) {
  919. ehca_err(&shca->ib_device, "h_ret=%li shca=%p e_mr=%p "
  920. "iova_start=%p size=%lx acl=%x e_pd=%p lkey=%x "
  921. "pginfo=%p num_kpages=%lx num_hwpages=%lx ret=%i",
  922. h_ret, shca, e_mr, iova_start, size, acl, e_pd,
  923. hipzout.lkey, pginfo, pginfo->num_kpages,
  924. pginfo->num_hwpages, ret);
  925. ehca_err(&shca->ib_device, "internal error in ehca_reg_mr, "
  926. "not recoverable");
  927. }
  928. ehca_reg_mr_exit0:
  929. if (ret)
  930. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  931. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  932. "num_kpages=%lx num_hwpages=%lx",
  933. ret, shca, e_mr, iova_start, size, acl, e_pd, pginfo,
  934. pginfo->num_kpages, pginfo->num_hwpages);
  935. return ret;
  936. } /* end ehca_reg_mr() */
  937. /*----------------------------------------------------------------------*/
  938. int ehca_reg_mr_rpages(struct ehca_shca *shca,
  939. struct ehca_mr *e_mr,
  940. struct ehca_mr_pginfo *pginfo)
  941. {
  942. int ret = 0;
  943. u64 h_ret;
  944. u32 rnum;
  945. u64 rpage;
  946. u32 i;
  947. u64 *kpage;
  948. if (!pginfo->num_hwpages) /* in case of fmr */
  949. return 0;
  950. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  951. if (!kpage) {
  952. ehca_err(&shca->ib_device, "kpage alloc failed");
  953. ret = -ENOMEM;
  954. goto ehca_reg_mr_rpages_exit0;
  955. }
  956. /* max MAX_RPAGES ehca mr pages per register call */
  957. for (i = 0; i < NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES); i++) {
  958. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  959. rnum = pginfo->num_hwpages % MAX_RPAGES; /* last shot */
  960. if (rnum == 0)
  961. rnum = MAX_RPAGES; /* last shot is full */
  962. } else
  963. rnum = MAX_RPAGES;
  964. ret = ehca_set_pagebuf(pginfo, rnum, kpage);
  965. if (ret) {
  966. ehca_err(&shca->ib_device, "ehca_set_pagebuf "
  967. "bad rc, ret=%i rnum=%x kpage=%p",
  968. ret, rnum, kpage);
  969. goto ehca_reg_mr_rpages_exit1;
  970. }
  971. if (rnum > 1) {
  972. rpage = virt_to_abs(kpage);
  973. if (!rpage) {
  974. ehca_err(&shca->ib_device, "kpage=%p i=%x",
  975. kpage, i);
  976. ret = -EFAULT;
  977. goto ehca_reg_mr_rpages_exit1;
  978. }
  979. } else
  980. rpage = *kpage;
  981. h_ret = hipz_h_register_rpage_mr(
  982. shca->ipz_hca_handle, e_mr,
  983. ehca_encode_hwpage_size(pginfo->hwpage_size),
  984. 0, rpage, rnum);
  985. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  986. /*
  987. * check for 'registration complete'==H_SUCCESS
  988. * and for 'page registered'==H_PAGE_REGISTERED
  989. */
  990. if (h_ret != H_SUCCESS) {
  991. ehca_err(&shca->ib_device, "last "
  992. "hipz_reg_rpage_mr failed, h_ret=%li "
  993. "e_mr=%p i=%x hca_hndl=%lx mr_hndl=%lx"
  994. " lkey=%x", h_ret, e_mr, i,
  995. shca->ipz_hca_handle.handle,
  996. e_mr->ipz_mr_handle.handle,
  997. e_mr->ib.ib_mr.lkey);
  998. ret = ehca2ib_return_code(h_ret);
  999. break;
  1000. } else
  1001. ret = 0;
  1002. } else if (h_ret != H_PAGE_REGISTERED) {
  1003. ehca_err(&shca->ib_device, "hipz_reg_rpage_mr failed, "
  1004. "h_ret=%li e_mr=%p i=%x lkey=%x hca_hndl=%lx "
  1005. "mr_hndl=%lx", h_ret, e_mr, i,
  1006. e_mr->ib.ib_mr.lkey,
  1007. shca->ipz_hca_handle.handle,
  1008. e_mr->ipz_mr_handle.handle);
  1009. ret = ehca2ib_return_code(h_ret);
  1010. break;
  1011. } else
  1012. ret = 0;
  1013. } /* end for(i) */
  1014. ehca_reg_mr_rpages_exit1:
  1015. ehca_free_fw_ctrlblock(kpage);
  1016. ehca_reg_mr_rpages_exit0:
  1017. if (ret)
  1018. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p pginfo=%p "
  1019. "num_kpages=%lx num_hwpages=%lx", ret, shca, e_mr,
  1020. pginfo, pginfo->num_kpages, pginfo->num_hwpages);
  1021. return ret;
  1022. } /* end ehca_reg_mr_rpages() */
  1023. /*----------------------------------------------------------------------*/
  1024. inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
  1025. struct ehca_mr *e_mr,
  1026. u64 *iova_start,
  1027. u64 size,
  1028. u32 acl,
  1029. struct ehca_pd *e_pd,
  1030. struct ehca_mr_pginfo *pginfo,
  1031. u32 *lkey, /*OUT*/
  1032. u32 *rkey) /*OUT*/
  1033. {
  1034. int ret;
  1035. u64 h_ret;
  1036. u32 hipz_acl;
  1037. u64 *kpage;
  1038. u64 rpage;
  1039. struct ehca_mr_pginfo pginfo_save;
  1040. struct ehca_mr_hipzout_parms hipzout;
  1041. ehca_mrmw_map_acl(acl, &hipz_acl);
  1042. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  1043. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  1044. if (!kpage) {
  1045. ehca_err(&shca->ib_device, "kpage alloc failed");
  1046. ret = -ENOMEM;
  1047. goto ehca_rereg_mr_rereg1_exit0;
  1048. }
  1049. pginfo_save = *pginfo;
  1050. ret = ehca_set_pagebuf(pginfo, pginfo->num_hwpages, kpage);
  1051. if (ret) {
  1052. ehca_err(&shca->ib_device, "set pagebuf failed, e_mr=%p "
  1053. "pginfo=%p type=%x num_kpages=%lx num_hwpages=%lx "
  1054. "kpage=%p", e_mr, pginfo, pginfo->type,
  1055. pginfo->num_kpages, pginfo->num_hwpages, kpage);
  1056. goto ehca_rereg_mr_rereg1_exit1;
  1057. }
  1058. rpage = virt_to_abs(kpage);
  1059. if (!rpage) {
  1060. ehca_err(&shca->ib_device, "kpage=%p", kpage);
  1061. ret = -EFAULT;
  1062. goto ehca_rereg_mr_rereg1_exit1;
  1063. }
  1064. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_mr,
  1065. (u64)iova_start, size, hipz_acl,
  1066. e_pd->fw_pd, rpage, &hipzout);
  1067. if (h_ret != H_SUCCESS) {
  1068. /*
  1069. * reregistration unsuccessful, try it again with the 3 hCalls,
  1070. * e.g. this is required in case H_MR_CONDITION
  1071. * (MW bound or MR is shared)
  1072. */
  1073. ehca_warn(&shca->ib_device, "hipz_h_reregister_pmr failed "
  1074. "(Rereg1), h_ret=%li e_mr=%p", h_ret, e_mr);
  1075. *pginfo = pginfo_save;
  1076. ret = -EAGAIN;
  1077. } else if ((u64 *)hipzout.vaddr != iova_start) {
  1078. ehca_err(&shca->ib_device, "PHYP changed iova_start in "
  1079. "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p "
  1080. "mr_handle=%lx lkey=%x lkey_out=%x", iova_start,
  1081. hipzout.vaddr, e_mr, e_mr->ipz_mr_handle.handle,
  1082. e_mr->ib.ib_mr.lkey, hipzout.lkey);
  1083. ret = -EFAULT;
  1084. } else {
  1085. /*
  1086. * successful reregistration
  1087. * note: start and start_out are identical for eServer HCAs
  1088. */
  1089. e_mr->num_kpages = pginfo->num_kpages;
  1090. e_mr->num_hwpages = pginfo->num_hwpages;
  1091. e_mr->hwpage_size = pginfo->hwpage_size;
  1092. e_mr->start = iova_start;
  1093. e_mr->size = size;
  1094. e_mr->acl = acl;
  1095. *lkey = hipzout.lkey;
  1096. *rkey = hipzout.rkey;
  1097. }
  1098. ehca_rereg_mr_rereg1_exit1:
  1099. ehca_free_fw_ctrlblock(kpage);
  1100. ehca_rereg_mr_rereg1_exit0:
  1101. if ( ret && (ret != -EAGAIN) )
  1102. ehca_err(&shca->ib_device, "ret=%i lkey=%x rkey=%x "
  1103. "pginfo=%p num_kpages=%lx num_hwpages=%lx",
  1104. ret, *lkey, *rkey, pginfo, pginfo->num_kpages,
  1105. pginfo->num_hwpages);
  1106. return ret;
  1107. } /* end ehca_rereg_mr_rereg1() */
  1108. /*----------------------------------------------------------------------*/
  1109. int ehca_rereg_mr(struct ehca_shca *shca,
  1110. struct ehca_mr *e_mr,
  1111. u64 *iova_start,
  1112. u64 size,
  1113. int acl,
  1114. struct ehca_pd *e_pd,
  1115. struct ehca_mr_pginfo *pginfo,
  1116. u32 *lkey,
  1117. u32 *rkey)
  1118. {
  1119. int ret = 0;
  1120. u64 h_ret;
  1121. int rereg_1_hcall = 1; /* 1: use hipz_h_reregister_pmr directly */
  1122. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for reregistration */
  1123. /* first determine reregistration hCall(s) */
  1124. if ((pginfo->num_hwpages > MAX_RPAGES) ||
  1125. (e_mr->num_hwpages > MAX_RPAGES) ||
  1126. (pginfo->num_hwpages > e_mr->num_hwpages)) {
  1127. ehca_dbg(&shca->ib_device, "Rereg3 case, "
  1128. "pginfo->num_hwpages=%lx e_mr->num_hwpages=%x",
  1129. pginfo->num_hwpages, e_mr->num_hwpages);
  1130. rereg_1_hcall = 0;
  1131. rereg_3_hcall = 1;
  1132. }
  1133. if (e_mr->flags & EHCA_MR_FLAG_MAXMR) { /* check for max-MR */
  1134. rereg_1_hcall = 0;
  1135. rereg_3_hcall = 1;
  1136. e_mr->flags &= ~EHCA_MR_FLAG_MAXMR;
  1137. ehca_err(&shca->ib_device, "Rereg MR for max-MR! e_mr=%p",
  1138. e_mr);
  1139. }
  1140. if (rereg_1_hcall) {
  1141. ret = ehca_rereg_mr_rereg1(shca, e_mr, iova_start, size,
  1142. acl, e_pd, pginfo, lkey, rkey);
  1143. if (ret) {
  1144. if (ret == -EAGAIN)
  1145. rereg_3_hcall = 1;
  1146. else
  1147. goto ehca_rereg_mr_exit0;
  1148. }
  1149. }
  1150. if (rereg_3_hcall) {
  1151. struct ehca_mr save_mr;
  1152. /* first deregister old MR */
  1153. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  1154. if (h_ret != H_SUCCESS) {
  1155. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1156. "h_ret=%li e_mr=%p hca_hndl=%lx mr_hndl=%lx "
  1157. "mr->lkey=%x",
  1158. h_ret, e_mr, shca->ipz_hca_handle.handle,
  1159. e_mr->ipz_mr_handle.handle,
  1160. e_mr->ib.ib_mr.lkey);
  1161. ret = ehca2ib_return_code(h_ret);
  1162. goto ehca_rereg_mr_exit0;
  1163. }
  1164. /* clean ehca_mr_t, without changing struct ib_mr and lock */
  1165. save_mr = *e_mr;
  1166. ehca_mr_deletenew(e_mr);
  1167. /* set some MR values */
  1168. e_mr->flags = save_mr.flags;
  1169. e_mr->hwpage_size = save_mr.hwpage_size;
  1170. e_mr->fmr_page_size = save_mr.fmr_page_size;
  1171. e_mr->fmr_max_pages = save_mr.fmr_max_pages;
  1172. e_mr->fmr_max_maps = save_mr.fmr_max_maps;
  1173. e_mr->fmr_map_cnt = save_mr.fmr_map_cnt;
  1174. ret = ehca_reg_mr(shca, e_mr, iova_start, size, acl,
  1175. e_pd, pginfo, lkey, rkey);
  1176. if (ret) {
  1177. u32 offset = (u64)(&e_mr->flags) - (u64)e_mr;
  1178. memcpy(&e_mr->flags, &(save_mr.flags),
  1179. sizeof(struct ehca_mr) - offset);
  1180. goto ehca_rereg_mr_exit0;
  1181. }
  1182. }
  1183. ehca_rereg_mr_exit0:
  1184. if (ret)
  1185. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  1186. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  1187. "num_kpages=%lx lkey=%x rkey=%x rereg_1_hcall=%x "
  1188. "rereg_3_hcall=%x", ret, shca, e_mr, iova_start, size,
  1189. acl, e_pd, pginfo, pginfo->num_kpages, *lkey, *rkey,
  1190. rereg_1_hcall, rereg_3_hcall);
  1191. return ret;
  1192. } /* end ehca_rereg_mr() */
  1193. /*----------------------------------------------------------------------*/
  1194. int ehca_unmap_one_fmr(struct ehca_shca *shca,
  1195. struct ehca_mr *e_fmr)
  1196. {
  1197. int ret = 0;
  1198. u64 h_ret;
  1199. struct ehca_pd *e_pd =
  1200. container_of(e_fmr->ib.ib_fmr.pd, struct ehca_pd, ib_pd);
  1201. struct ehca_mr save_fmr;
  1202. u32 tmp_lkey, tmp_rkey;
  1203. struct ehca_mr_pginfo pginfo;
  1204. struct ehca_mr_hipzout_parms hipzout;
  1205. struct ehca_mr save_mr;
  1206. if (e_fmr->fmr_max_pages <= MAX_RPAGES) {
  1207. /*
  1208. * note: after using rereg hcall with len=0,
  1209. * rereg hcall must be used again for registering pages
  1210. */
  1211. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_fmr, 0,
  1212. 0, 0, e_pd->fw_pd, 0, &hipzout);
  1213. if (h_ret == H_SUCCESS) {
  1214. /* successful reregistration */
  1215. e_fmr->start = NULL;
  1216. e_fmr->size = 0;
  1217. tmp_lkey = hipzout.lkey;
  1218. tmp_rkey = hipzout.rkey;
  1219. return 0;
  1220. }
  1221. /*
  1222. * should not happen, because length checked above,
  1223. * FMRs are not shared and no MW bound to FMRs
  1224. */
  1225. ehca_err(&shca->ib_device, "hipz_reregister_pmr failed "
  1226. "(Rereg1), h_ret=%li e_fmr=%p hca_hndl=%lx "
  1227. "mr_hndl=%lx lkey=%x lkey_out=%x",
  1228. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1229. e_fmr->ipz_mr_handle.handle,
  1230. e_fmr->ib.ib_fmr.lkey, hipzout.lkey);
  1231. /* try free and rereg */
  1232. }
  1233. /* first free old FMR */
  1234. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  1235. if (h_ret != H_SUCCESS) {
  1236. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1237. "h_ret=%li e_fmr=%p hca_hndl=%lx mr_hndl=%lx "
  1238. "lkey=%x",
  1239. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1240. e_fmr->ipz_mr_handle.handle,
  1241. e_fmr->ib.ib_fmr.lkey);
  1242. ret = ehca2ib_return_code(h_ret);
  1243. goto ehca_unmap_one_fmr_exit0;
  1244. }
  1245. /* clean ehca_mr_t, without changing lock */
  1246. save_fmr = *e_fmr;
  1247. ehca_mr_deletenew(e_fmr);
  1248. /* set some MR values */
  1249. e_fmr->flags = save_fmr.flags;
  1250. e_fmr->hwpage_size = save_fmr.hwpage_size;
  1251. e_fmr->fmr_page_size = save_fmr.fmr_page_size;
  1252. e_fmr->fmr_max_pages = save_fmr.fmr_max_pages;
  1253. e_fmr->fmr_max_maps = save_fmr.fmr_max_maps;
  1254. e_fmr->fmr_map_cnt = save_fmr.fmr_map_cnt;
  1255. e_fmr->acl = save_fmr.acl;
  1256. memset(&pginfo, 0, sizeof(pginfo));
  1257. pginfo.type = EHCA_MR_PGI_FMR;
  1258. ret = ehca_reg_mr(shca, e_fmr, NULL,
  1259. (e_fmr->fmr_max_pages * e_fmr->fmr_page_size),
  1260. e_fmr->acl, e_pd, &pginfo, &tmp_lkey,
  1261. &tmp_rkey);
  1262. if (ret) {
  1263. u32 offset = (u64)(&e_fmr->flags) - (u64)e_fmr;
  1264. memcpy(&e_fmr->flags, &(save_mr.flags),
  1265. sizeof(struct ehca_mr) - offset);
  1266. }
  1267. ehca_unmap_one_fmr_exit0:
  1268. if (ret)
  1269. ehca_err(&shca->ib_device, "ret=%i tmp_lkey=%x tmp_rkey=%x "
  1270. "fmr_max_pages=%x",
  1271. ret, tmp_lkey, tmp_rkey, e_fmr->fmr_max_pages);
  1272. return ret;
  1273. } /* end ehca_unmap_one_fmr() */
  1274. /*----------------------------------------------------------------------*/
  1275. int ehca_reg_smr(struct ehca_shca *shca,
  1276. struct ehca_mr *e_origmr,
  1277. struct ehca_mr *e_newmr,
  1278. u64 *iova_start,
  1279. int acl,
  1280. struct ehca_pd *e_pd,
  1281. u32 *lkey, /*OUT*/
  1282. u32 *rkey) /*OUT*/
  1283. {
  1284. int ret = 0;
  1285. u64 h_ret;
  1286. u32 hipz_acl;
  1287. struct ehca_mr_hipzout_parms hipzout;
  1288. ehca_mrmw_map_acl(acl, &hipz_acl);
  1289. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1290. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1291. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1292. &hipzout);
  1293. if (h_ret != H_SUCCESS) {
  1294. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%li "
  1295. "shca=%p e_origmr=%p e_newmr=%p iova_start=%p acl=%x "
  1296. "e_pd=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1297. h_ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd,
  1298. shca->ipz_hca_handle.handle,
  1299. e_origmr->ipz_mr_handle.handle,
  1300. e_origmr->ib.ib_mr.lkey);
  1301. ret = ehca2ib_return_code(h_ret);
  1302. goto ehca_reg_smr_exit0;
  1303. }
  1304. /* successful registration */
  1305. e_newmr->num_kpages = e_origmr->num_kpages;
  1306. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1307. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1308. e_newmr->start = iova_start;
  1309. e_newmr->size = e_origmr->size;
  1310. e_newmr->acl = acl;
  1311. e_newmr->ipz_mr_handle = hipzout.handle;
  1312. *lkey = hipzout.lkey;
  1313. *rkey = hipzout.rkey;
  1314. return 0;
  1315. ehca_reg_smr_exit0:
  1316. if (ret)
  1317. ehca_err(&shca->ib_device, "ret=%i shca=%p e_origmr=%p "
  1318. "e_newmr=%p iova_start=%p acl=%x e_pd=%p",
  1319. ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd);
  1320. return ret;
  1321. } /* end ehca_reg_smr() */
  1322. /*----------------------------------------------------------------------*/
  1323. /* register internal max-MR to internal SHCA */
  1324. int ehca_reg_internal_maxmr(
  1325. struct ehca_shca *shca,
  1326. struct ehca_pd *e_pd,
  1327. struct ehca_mr **e_maxmr) /*OUT*/
  1328. {
  1329. int ret;
  1330. struct ehca_mr *e_mr;
  1331. u64 *iova_start;
  1332. u64 size_maxmr;
  1333. struct ehca_mr_pginfo pginfo;
  1334. struct ib_phys_buf ib_pbuf;
  1335. u32 num_kpages;
  1336. u32 num_hwpages;
  1337. u64 hw_pgsize;
  1338. e_mr = ehca_mr_new();
  1339. if (!e_mr) {
  1340. ehca_err(&shca->ib_device, "out of memory");
  1341. ret = -ENOMEM;
  1342. goto ehca_reg_internal_maxmr_exit0;
  1343. }
  1344. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  1345. /* register internal max-MR on HCA */
  1346. size_maxmr = (u64)high_memory - PAGE_OFFSET;
  1347. iova_start = (u64 *)KERNELBASE;
  1348. ib_pbuf.addr = 0;
  1349. ib_pbuf.size = size_maxmr;
  1350. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr,
  1351. PAGE_SIZE);
  1352. hw_pgsize = ehca_get_max_hwpage_size(shca);
  1353. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size_maxmr,
  1354. hw_pgsize);
  1355. memset(&pginfo, 0, sizeof(pginfo));
  1356. pginfo.type = EHCA_MR_PGI_PHYS;
  1357. pginfo.num_kpages = num_kpages;
  1358. pginfo.num_hwpages = num_hwpages;
  1359. pginfo.hwpage_size = hw_pgsize;
  1360. pginfo.u.phy.num_phys_buf = 1;
  1361. pginfo.u.phy.phys_buf_array = &ib_pbuf;
  1362. ret = ehca_reg_mr(shca, e_mr, iova_start, size_maxmr, 0, e_pd,
  1363. &pginfo, &e_mr->ib.ib_mr.lkey,
  1364. &e_mr->ib.ib_mr.rkey);
  1365. if (ret) {
  1366. ehca_err(&shca->ib_device, "reg of internal max MR failed, "
  1367. "e_mr=%p iova_start=%p size_maxmr=%lx num_kpages=%x "
  1368. "num_hwpages=%x", e_mr, iova_start, size_maxmr,
  1369. num_kpages, num_hwpages);
  1370. goto ehca_reg_internal_maxmr_exit1;
  1371. }
  1372. /* successful registration of all pages */
  1373. e_mr->ib.ib_mr.device = e_pd->ib_pd.device;
  1374. e_mr->ib.ib_mr.pd = &e_pd->ib_pd;
  1375. e_mr->ib.ib_mr.uobject = NULL;
  1376. atomic_inc(&(e_pd->ib_pd.usecnt));
  1377. atomic_set(&(e_mr->ib.ib_mr.usecnt), 0);
  1378. *e_maxmr = e_mr;
  1379. return 0;
  1380. ehca_reg_internal_maxmr_exit1:
  1381. ehca_mr_delete(e_mr);
  1382. ehca_reg_internal_maxmr_exit0:
  1383. if (ret)
  1384. ehca_err(&shca->ib_device, "ret=%i shca=%p e_pd=%p e_maxmr=%p",
  1385. ret, shca, e_pd, e_maxmr);
  1386. return ret;
  1387. } /* end ehca_reg_internal_maxmr() */
  1388. /*----------------------------------------------------------------------*/
  1389. int ehca_reg_maxmr(struct ehca_shca *shca,
  1390. struct ehca_mr *e_newmr,
  1391. u64 *iova_start,
  1392. int acl,
  1393. struct ehca_pd *e_pd,
  1394. u32 *lkey,
  1395. u32 *rkey)
  1396. {
  1397. u64 h_ret;
  1398. struct ehca_mr *e_origmr = shca->maxmr;
  1399. u32 hipz_acl;
  1400. struct ehca_mr_hipzout_parms hipzout;
  1401. ehca_mrmw_map_acl(acl, &hipz_acl);
  1402. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1403. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1404. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1405. &hipzout);
  1406. if (h_ret != H_SUCCESS) {
  1407. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%li "
  1408. "e_origmr=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1409. h_ret, e_origmr, shca->ipz_hca_handle.handle,
  1410. e_origmr->ipz_mr_handle.handle,
  1411. e_origmr->ib.ib_mr.lkey);
  1412. return ehca2ib_return_code(h_ret);
  1413. }
  1414. /* successful registration */
  1415. e_newmr->num_kpages = e_origmr->num_kpages;
  1416. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1417. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1418. e_newmr->start = iova_start;
  1419. e_newmr->size = e_origmr->size;
  1420. e_newmr->acl = acl;
  1421. e_newmr->ipz_mr_handle = hipzout.handle;
  1422. *lkey = hipzout.lkey;
  1423. *rkey = hipzout.rkey;
  1424. return 0;
  1425. } /* end ehca_reg_maxmr() */
  1426. /*----------------------------------------------------------------------*/
  1427. int ehca_dereg_internal_maxmr(struct ehca_shca *shca)
  1428. {
  1429. int ret;
  1430. struct ehca_mr *e_maxmr;
  1431. struct ib_pd *ib_pd;
  1432. if (!shca->maxmr) {
  1433. ehca_err(&shca->ib_device, "bad call, shca=%p", shca);
  1434. ret = -EINVAL;
  1435. goto ehca_dereg_internal_maxmr_exit0;
  1436. }
  1437. e_maxmr = shca->maxmr;
  1438. ib_pd = e_maxmr->ib.ib_mr.pd;
  1439. shca->maxmr = NULL; /* remove internal max-MR indication from SHCA */
  1440. ret = ehca_dereg_mr(&e_maxmr->ib.ib_mr);
  1441. if (ret) {
  1442. ehca_err(&shca->ib_device, "dereg internal max-MR failed, "
  1443. "ret=%i e_maxmr=%p shca=%p lkey=%x",
  1444. ret, e_maxmr, shca, e_maxmr->ib.ib_mr.lkey);
  1445. shca->maxmr = e_maxmr;
  1446. goto ehca_dereg_internal_maxmr_exit0;
  1447. }
  1448. atomic_dec(&ib_pd->usecnt);
  1449. ehca_dereg_internal_maxmr_exit0:
  1450. if (ret)
  1451. ehca_err(&shca->ib_device, "ret=%i shca=%p shca->maxmr=%p",
  1452. ret, shca, shca->maxmr);
  1453. return ret;
  1454. } /* end ehca_dereg_internal_maxmr() */
  1455. /*----------------------------------------------------------------------*/
  1456. /*
  1457. * check physical buffer array of MR verbs for validness and
  1458. * calculates MR size
  1459. */
  1460. int ehca_mr_chk_buf_and_calc_size(struct ib_phys_buf *phys_buf_array,
  1461. int num_phys_buf,
  1462. u64 *iova_start,
  1463. u64 *size)
  1464. {
  1465. struct ib_phys_buf *pbuf = phys_buf_array;
  1466. u64 size_count = 0;
  1467. u32 i;
  1468. if (num_phys_buf == 0) {
  1469. ehca_gen_err("bad phys buf array len, num_phys_buf=0");
  1470. return -EINVAL;
  1471. }
  1472. /* check first buffer */
  1473. if (((u64)iova_start & ~PAGE_MASK) != (pbuf->addr & ~PAGE_MASK)) {
  1474. ehca_gen_err("iova_start/addr mismatch, iova_start=%p "
  1475. "pbuf->addr=%lx pbuf->size=%lx",
  1476. iova_start, pbuf->addr, pbuf->size);
  1477. return -EINVAL;
  1478. }
  1479. if (((pbuf->addr + pbuf->size) % PAGE_SIZE) &&
  1480. (num_phys_buf > 1)) {
  1481. ehca_gen_err("addr/size mismatch in 1st buf, pbuf->addr=%lx "
  1482. "pbuf->size=%lx", pbuf->addr, pbuf->size);
  1483. return -EINVAL;
  1484. }
  1485. for (i = 0; i < num_phys_buf; i++) {
  1486. if ((i > 0) && (pbuf->addr % PAGE_SIZE)) {
  1487. ehca_gen_err("bad address, i=%x pbuf->addr=%lx "
  1488. "pbuf->size=%lx",
  1489. i, pbuf->addr, pbuf->size);
  1490. return -EINVAL;
  1491. }
  1492. if (((i > 0) && /* not 1st */
  1493. (i < (num_phys_buf - 1)) && /* not last */
  1494. (pbuf->size % PAGE_SIZE)) || (pbuf->size == 0)) {
  1495. ehca_gen_err("bad size, i=%x pbuf->size=%lx",
  1496. i, pbuf->size);
  1497. return -EINVAL;
  1498. }
  1499. size_count += pbuf->size;
  1500. pbuf++;
  1501. }
  1502. *size = size_count;
  1503. return 0;
  1504. } /* end ehca_mr_chk_buf_and_calc_size() */
  1505. /*----------------------------------------------------------------------*/
  1506. /* check page list of map FMR verb for validness */
  1507. int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
  1508. u64 *page_list,
  1509. int list_len)
  1510. {
  1511. u32 i;
  1512. u64 *page;
  1513. if ((list_len == 0) || (list_len > e_fmr->fmr_max_pages)) {
  1514. ehca_gen_err("bad list_len, list_len=%x "
  1515. "e_fmr->fmr_max_pages=%x fmr=%p",
  1516. list_len, e_fmr->fmr_max_pages, e_fmr);
  1517. return -EINVAL;
  1518. }
  1519. /* each page must be aligned */
  1520. page = page_list;
  1521. for (i = 0; i < list_len; i++) {
  1522. if (*page % e_fmr->fmr_page_size) {
  1523. ehca_gen_err("bad page, i=%x *page=%lx page=%p fmr=%p "
  1524. "fmr_page_size=%x", i, *page, page, e_fmr,
  1525. e_fmr->fmr_page_size);
  1526. return -EINVAL;
  1527. }
  1528. page++;
  1529. }
  1530. return 0;
  1531. } /* end ehca_fmr_check_page_list() */
  1532. /*----------------------------------------------------------------------*/
  1533. /* PAGE_SIZE >= pginfo->hwpage_size */
  1534. static int ehca_set_pagebuf_user1(struct ehca_mr_pginfo *pginfo,
  1535. u32 number,
  1536. u64 *kpage)
  1537. {
  1538. int ret = 0;
  1539. struct ib_umem_chunk *prev_chunk;
  1540. struct ib_umem_chunk *chunk;
  1541. u64 pgaddr;
  1542. u32 i = 0;
  1543. u32 j = 0;
  1544. int hwpages_per_kpage = PAGE_SIZE / pginfo->hwpage_size;
  1545. /* loop over desired chunk entries */
  1546. chunk = pginfo->u.usr.next_chunk;
  1547. prev_chunk = pginfo->u.usr.next_chunk;
  1548. list_for_each_entry_continue(
  1549. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1550. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1551. pgaddr = page_to_pfn(sg_page(&chunk->page_list[i]))
  1552. << PAGE_SHIFT ;
  1553. *kpage = phys_to_abs(pgaddr +
  1554. (pginfo->next_hwpage *
  1555. pginfo->hwpage_size));
  1556. if ( !(*kpage) ) {
  1557. ehca_gen_err("pgaddr=%lx "
  1558. "chunk->page_list[i]=%lx "
  1559. "i=%x next_hwpage=%lx",
  1560. pgaddr, (u64)sg_dma_address(
  1561. &chunk->page_list[i]),
  1562. i, pginfo->next_hwpage);
  1563. return -EFAULT;
  1564. }
  1565. (pginfo->hwpage_cnt)++;
  1566. (pginfo->next_hwpage)++;
  1567. kpage++;
  1568. if (pginfo->next_hwpage % hwpages_per_kpage == 0) {
  1569. (pginfo->kpage_cnt)++;
  1570. (pginfo->u.usr.next_nmap)++;
  1571. pginfo->next_hwpage = 0;
  1572. i++;
  1573. }
  1574. j++;
  1575. if (j >= number) break;
  1576. }
  1577. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1578. (j >= number)) {
  1579. pginfo->u.usr.next_nmap = 0;
  1580. prev_chunk = chunk;
  1581. break;
  1582. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1583. pginfo->u.usr.next_nmap = 0;
  1584. prev_chunk = chunk;
  1585. } else if (j >= number)
  1586. break;
  1587. else
  1588. prev_chunk = chunk;
  1589. }
  1590. pginfo->u.usr.next_chunk =
  1591. list_prepare_entry(prev_chunk,
  1592. (&(pginfo->u.usr.region->chunk_list)),
  1593. list);
  1594. return ret;
  1595. }
  1596. /*
  1597. * check given pages for contiguous layout
  1598. * last page addr is returned in prev_pgaddr for further check
  1599. */
  1600. static int ehca_check_kpages_per_ate(struct scatterlist *page_list,
  1601. int start_idx, int end_idx,
  1602. u64 *prev_pgaddr)
  1603. {
  1604. int t;
  1605. for (t = start_idx; t <= end_idx; t++) {
  1606. u64 pgaddr = page_to_pfn(sg_page(&page_list[t])) << PAGE_SHIFT;
  1607. if (ehca_debug_level >= 3)
  1608. ehca_gen_dbg("chunk_page=%lx value=%016lx", pgaddr,
  1609. *(u64 *)abs_to_virt(phys_to_abs(pgaddr)));
  1610. if (pgaddr - PAGE_SIZE != *prev_pgaddr) {
  1611. ehca_gen_err("uncontiguous page found pgaddr=%lx "
  1612. "prev_pgaddr=%lx page_list_i=%x",
  1613. pgaddr, *prev_pgaddr, t);
  1614. return -EINVAL;
  1615. }
  1616. *prev_pgaddr = pgaddr;
  1617. }
  1618. return 0;
  1619. }
  1620. /* PAGE_SIZE < pginfo->hwpage_size */
  1621. static int ehca_set_pagebuf_user2(struct ehca_mr_pginfo *pginfo,
  1622. u32 number,
  1623. u64 *kpage)
  1624. {
  1625. int ret = 0;
  1626. struct ib_umem_chunk *prev_chunk;
  1627. struct ib_umem_chunk *chunk;
  1628. u64 pgaddr, prev_pgaddr;
  1629. u32 i = 0;
  1630. u32 j = 0;
  1631. int kpages_per_hwpage = pginfo->hwpage_size / PAGE_SIZE;
  1632. int nr_kpages = kpages_per_hwpage;
  1633. /* loop over desired chunk entries */
  1634. chunk = pginfo->u.usr.next_chunk;
  1635. prev_chunk = pginfo->u.usr.next_chunk;
  1636. list_for_each_entry_continue(
  1637. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1638. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1639. if (nr_kpages == kpages_per_hwpage) {
  1640. pgaddr = ( page_to_pfn(sg_page(&chunk->page_list[i]))
  1641. << PAGE_SHIFT );
  1642. *kpage = phys_to_abs(pgaddr);
  1643. if ( !(*kpage) ) {
  1644. ehca_gen_err("pgaddr=%lx i=%x",
  1645. pgaddr, i);
  1646. ret = -EFAULT;
  1647. return ret;
  1648. }
  1649. /*
  1650. * The first page in a hwpage must be aligned;
  1651. * the first MR page is exempt from this rule.
  1652. */
  1653. if (pgaddr & (pginfo->hwpage_size - 1)) {
  1654. if (pginfo->hwpage_cnt) {
  1655. ehca_gen_err(
  1656. "invalid alignment "
  1657. "pgaddr=%lx i=%x "
  1658. "mr_pgsize=%lx",
  1659. pgaddr, i,
  1660. pginfo->hwpage_size);
  1661. ret = -EFAULT;
  1662. return ret;
  1663. }
  1664. /* first MR page */
  1665. pginfo->kpage_cnt =
  1666. (pgaddr &
  1667. (pginfo->hwpage_size - 1)) >>
  1668. PAGE_SHIFT;
  1669. nr_kpages -= pginfo->kpage_cnt;
  1670. *kpage = phys_to_abs(
  1671. pgaddr &
  1672. ~(pginfo->hwpage_size - 1));
  1673. }
  1674. if (ehca_debug_level >= 3) {
  1675. u64 val = *(u64 *)abs_to_virt(
  1676. phys_to_abs(pgaddr));
  1677. ehca_gen_dbg("kpage=%lx chunk_page=%lx "
  1678. "value=%016lx",
  1679. *kpage, pgaddr, val);
  1680. }
  1681. prev_pgaddr = pgaddr;
  1682. i++;
  1683. pginfo->kpage_cnt++;
  1684. pginfo->u.usr.next_nmap++;
  1685. nr_kpages--;
  1686. if (!nr_kpages)
  1687. goto next_kpage;
  1688. continue;
  1689. }
  1690. if (i + nr_kpages > chunk->nmap) {
  1691. ret = ehca_check_kpages_per_ate(
  1692. chunk->page_list, i,
  1693. chunk->nmap - 1, &prev_pgaddr);
  1694. if (ret) return ret;
  1695. pginfo->kpage_cnt += chunk->nmap - i;
  1696. pginfo->u.usr.next_nmap += chunk->nmap - i;
  1697. nr_kpages -= chunk->nmap - i;
  1698. break;
  1699. }
  1700. ret = ehca_check_kpages_per_ate(chunk->page_list, i,
  1701. i + nr_kpages - 1,
  1702. &prev_pgaddr);
  1703. if (ret) return ret;
  1704. i += nr_kpages;
  1705. pginfo->kpage_cnt += nr_kpages;
  1706. pginfo->u.usr.next_nmap += nr_kpages;
  1707. next_kpage:
  1708. nr_kpages = kpages_per_hwpage;
  1709. (pginfo->hwpage_cnt)++;
  1710. kpage++;
  1711. j++;
  1712. if (j >= number) break;
  1713. }
  1714. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1715. (j >= number)) {
  1716. pginfo->u.usr.next_nmap = 0;
  1717. prev_chunk = chunk;
  1718. break;
  1719. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1720. pginfo->u.usr.next_nmap = 0;
  1721. prev_chunk = chunk;
  1722. } else if (j >= number)
  1723. break;
  1724. else
  1725. prev_chunk = chunk;
  1726. }
  1727. pginfo->u.usr.next_chunk =
  1728. list_prepare_entry(prev_chunk,
  1729. (&(pginfo->u.usr.region->chunk_list)),
  1730. list);
  1731. return ret;
  1732. }
  1733. static int ehca_set_pagebuf_phys(struct ehca_mr_pginfo *pginfo,
  1734. u32 number, u64 *kpage)
  1735. {
  1736. int ret = 0;
  1737. struct ib_phys_buf *pbuf;
  1738. u64 num_hw, offs_hw;
  1739. u32 i = 0;
  1740. /* loop over desired phys_buf_array entries */
  1741. while (i < number) {
  1742. pbuf = pginfo->u.phy.phys_buf_array + pginfo->u.phy.next_buf;
  1743. num_hw = NUM_CHUNKS((pbuf->addr % pginfo->hwpage_size) +
  1744. pbuf->size, pginfo->hwpage_size);
  1745. offs_hw = (pbuf->addr & ~(pginfo->hwpage_size - 1)) /
  1746. pginfo->hwpage_size;
  1747. while (pginfo->next_hwpage < offs_hw + num_hw) {
  1748. /* sanity check */
  1749. if ((pginfo->kpage_cnt >= pginfo->num_kpages) ||
  1750. (pginfo->hwpage_cnt >= pginfo->num_hwpages)) {
  1751. ehca_gen_err("kpage_cnt >= num_kpages, "
  1752. "kpage_cnt=%lx num_kpages=%lx "
  1753. "hwpage_cnt=%lx "
  1754. "num_hwpages=%lx i=%x",
  1755. pginfo->kpage_cnt,
  1756. pginfo->num_kpages,
  1757. pginfo->hwpage_cnt,
  1758. pginfo->num_hwpages, i);
  1759. return -EFAULT;
  1760. }
  1761. *kpage = phys_to_abs(
  1762. (pbuf->addr & ~(pginfo->hwpage_size - 1)) +
  1763. (pginfo->next_hwpage * pginfo->hwpage_size));
  1764. if ( !(*kpage) && pbuf->addr ) {
  1765. ehca_gen_err("pbuf->addr=%lx pbuf->size=%lx "
  1766. "next_hwpage=%lx", pbuf->addr,
  1767. pbuf->size, pginfo->next_hwpage);
  1768. return -EFAULT;
  1769. }
  1770. (pginfo->hwpage_cnt)++;
  1771. (pginfo->next_hwpage)++;
  1772. if (PAGE_SIZE >= pginfo->hwpage_size) {
  1773. if (pginfo->next_hwpage %
  1774. (PAGE_SIZE / pginfo->hwpage_size) == 0)
  1775. (pginfo->kpage_cnt)++;
  1776. } else
  1777. pginfo->kpage_cnt += pginfo->hwpage_size /
  1778. PAGE_SIZE;
  1779. kpage++;
  1780. i++;
  1781. if (i >= number) break;
  1782. }
  1783. if (pginfo->next_hwpage >= offs_hw + num_hw) {
  1784. (pginfo->u.phy.next_buf)++;
  1785. pginfo->next_hwpage = 0;
  1786. }
  1787. }
  1788. return ret;
  1789. }
  1790. static int ehca_set_pagebuf_fmr(struct ehca_mr_pginfo *pginfo,
  1791. u32 number, u64 *kpage)
  1792. {
  1793. int ret = 0;
  1794. u64 *fmrlist;
  1795. u32 i;
  1796. /* loop over desired page_list entries */
  1797. fmrlist = pginfo->u.fmr.page_list + pginfo->u.fmr.next_listelem;
  1798. for (i = 0; i < number; i++) {
  1799. *kpage = phys_to_abs((*fmrlist & ~(pginfo->hwpage_size - 1)) +
  1800. pginfo->next_hwpage * pginfo->hwpage_size);
  1801. if ( !(*kpage) ) {
  1802. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1803. "next_listelem=%lx next_hwpage=%lx",
  1804. *fmrlist, fmrlist,
  1805. pginfo->u.fmr.next_listelem,
  1806. pginfo->next_hwpage);
  1807. return -EFAULT;
  1808. }
  1809. (pginfo->hwpage_cnt)++;
  1810. if (pginfo->u.fmr.fmr_pgsize >= pginfo->hwpage_size) {
  1811. if (pginfo->next_hwpage %
  1812. (pginfo->u.fmr.fmr_pgsize /
  1813. pginfo->hwpage_size) == 0) {
  1814. (pginfo->kpage_cnt)++;
  1815. (pginfo->u.fmr.next_listelem)++;
  1816. fmrlist++;
  1817. pginfo->next_hwpage = 0;
  1818. } else
  1819. (pginfo->next_hwpage)++;
  1820. } else {
  1821. unsigned int cnt_per_hwpage = pginfo->hwpage_size /
  1822. pginfo->u.fmr.fmr_pgsize;
  1823. unsigned int j;
  1824. u64 prev = *kpage;
  1825. /* check if adrs are contiguous */
  1826. for (j = 1; j < cnt_per_hwpage; j++) {
  1827. u64 p = phys_to_abs(fmrlist[j] &
  1828. ~(pginfo->hwpage_size - 1));
  1829. if (prev + pginfo->u.fmr.fmr_pgsize != p) {
  1830. ehca_gen_err("uncontiguous fmr pages "
  1831. "found prev=%lx p=%lx "
  1832. "idx=%x", prev, p, i + j);
  1833. return -EINVAL;
  1834. }
  1835. prev = p;
  1836. }
  1837. pginfo->kpage_cnt += cnt_per_hwpage;
  1838. pginfo->u.fmr.next_listelem += cnt_per_hwpage;
  1839. fmrlist += cnt_per_hwpage;
  1840. }
  1841. kpage++;
  1842. }
  1843. return ret;
  1844. }
  1845. /* setup page buffer from page info */
  1846. int ehca_set_pagebuf(struct ehca_mr_pginfo *pginfo,
  1847. u32 number,
  1848. u64 *kpage)
  1849. {
  1850. int ret;
  1851. switch (pginfo->type) {
  1852. case EHCA_MR_PGI_PHYS:
  1853. ret = ehca_set_pagebuf_phys(pginfo, number, kpage);
  1854. break;
  1855. case EHCA_MR_PGI_USER:
  1856. ret = PAGE_SIZE >= pginfo->hwpage_size ?
  1857. ehca_set_pagebuf_user1(pginfo, number, kpage) :
  1858. ehca_set_pagebuf_user2(pginfo, number, kpage);
  1859. break;
  1860. case EHCA_MR_PGI_FMR:
  1861. ret = ehca_set_pagebuf_fmr(pginfo, number, kpage);
  1862. break;
  1863. default:
  1864. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1865. ret = -EFAULT;
  1866. break;
  1867. }
  1868. return ret;
  1869. } /* end ehca_set_pagebuf() */
  1870. /*----------------------------------------------------------------------*/
  1871. /*
  1872. * check MR if it is a max-MR, i.e. uses whole memory
  1873. * in case it's a max-MR 1 is returned, else 0
  1874. */
  1875. int ehca_mr_is_maxmr(u64 size,
  1876. u64 *iova_start)
  1877. {
  1878. /* a MR is treated as max-MR only if it fits following: */
  1879. if ((size == ((u64)high_memory - PAGE_OFFSET)) &&
  1880. (iova_start == (void *)KERNELBASE)) {
  1881. ehca_gen_dbg("this is a max-MR");
  1882. return 1;
  1883. } else
  1884. return 0;
  1885. } /* end ehca_mr_is_maxmr() */
  1886. /*----------------------------------------------------------------------*/
  1887. /* map access control for MR/MW. This routine is used for MR and MW. */
  1888. void ehca_mrmw_map_acl(int ib_acl,
  1889. u32 *hipz_acl)
  1890. {
  1891. *hipz_acl = 0;
  1892. if (ib_acl & IB_ACCESS_REMOTE_READ)
  1893. *hipz_acl |= HIPZ_ACCESSCTRL_R_READ;
  1894. if (ib_acl & IB_ACCESS_REMOTE_WRITE)
  1895. *hipz_acl |= HIPZ_ACCESSCTRL_R_WRITE;
  1896. if (ib_acl & IB_ACCESS_REMOTE_ATOMIC)
  1897. *hipz_acl |= HIPZ_ACCESSCTRL_R_ATOMIC;
  1898. if (ib_acl & IB_ACCESS_LOCAL_WRITE)
  1899. *hipz_acl |= HIPZ_ACCESSCTRL_L_WRITE;
  1900. if (ib_acl & IB_ACCESS_MW_BIND)
  1901. *hipz_acl |= HIPZ_ACCESSCTRL_MW_BIND;
  1902. } /* end ehca_mrmw_map_acl() */
  1903. /*----------------------------------------------------------------------*/
  1904. /* sets page size in hipz access control for MR/MW. */
  1905. void ehca_mrmw_set_pgsize_hipz_acl(u32 pgsize, u32 *hipz_acl) /*INOUT*/
  1906. {
  1907. *hipz_acl |= (ehca_encode_hwpage_size(pgsize) << 24);
  1908. } /* end ehca_mrmw_set_pgsize_hipz_acl() */
  1909. /*----------------------------------------------------------------------*/
  1910. /*
  1911. * reverse map access control for MR/MW.
  1912. * This routine is used for MR and MW.
  1913. */
  1914. void ehca_mrmw_reverse_map_acl(const u32 *hipz_acl,
  1915. int *ib_acl) /*OUT*/
  1916. {
  1917. *ib_acl = 0;
  1918. if (*hipz_acl & HIPZ_ACCESSCTRL_R_READ)
  1919. *ib_acl |= IB_ACCESS_REMOTE_READ;
  1920. if (*hipz_acl & HIPZ_ACCESSCTRL_R_WRITE)
  1921. *ib_acl |= IB_ACCESS_REMOTE_WRITE;
  1922. if (*hipz_acl & HIPZ_ACCESSCTRL_R_ATOMIC)
  1923. *ib_acl |= IB_ACCESS_REMOTE_ATOMIC;
  1924. if (*hipz_acl & HIPZ_ACCESSCTRL_L_WRITE)
  1925. *ib_acl |= IB_ACCESS_LOCAL_WRITE;
  1926. if (*hipz_acl & HIPZ_ACCESSCTRL_MW_BIND)
  1927. *ib_acl |= IB_ACCESS_MW_BIND;
  1928. } /* end ehca_mrmw_reverse_map_acl() */
  1929. /*----------------------------------------------------------------------*/
  1930. /*
  1931. * MR destructor and constructor
  1932. * used in Reregister MR verb, sets all fields in ehca_mr_t to 0,
  1933. * except struct ib_mr and spinlock
  1934. */
  1935. void ehca_mr_deletenew(struct ehca_mr *mr)
  1936. {
  1937. mr->flags = 0;
  1938. mr->num_kpages = 0;
  1939. mr->num_hwpages = 0;
  1940. mr->acl = 0;
  1941. mr->start = NULL;
  1942. mr->fmr_page_size = 0;
  1943. mr->fmr_max_pages = 0;
  1944. mr->fmr_max_maps = 0;
  1945. mr->fmr_map_cnt = 0;
  1946. memset(&mr->ipz_mr_handle, 0, sizeof(mr->ipz_mr_handle));
  1947. memset(&mr->galpas, 0, sizeof(mr->galpas));
  1948. } /* end ehca_mr_deletenew() */
  1949. int ehca_init_mrmw_cache(void)
  1950. {
  1951. mr_cache = kmem_cache_create("ehca_cache_mr",
  1952. sizeof(struct ehca_mr), 0,
  1953. SLAB_HWCACHE_ALIGN,
  1954. NULL);
  1955. if (!mr_cache)
  1956. return -ENOMEM;
  1957. mw_cache = kmem_cache_create("ehca_cache_mw",
  1958. sizeof(struct ehca_mw), 0,
  1959. SLAB_HWCACHE_ALIGN,
  1960. NULL);
  1961. if (!mw_cache) {
  1962. kmem_cache_destroy(mr_cache);
  1963. mr_cache = NULL;
  1964. return -ENOMEM;
  1965. }
  1966. return 0;
  1967. }
  1968. void ehca_cleanup_mrmw_cache(void)
  1969. {
  1970. if (mr_cache)
  1971. kmem_cache_destroy(mr_cache);
  1972. if (mw_cache)
  1973. kmem_cache_destroy(mw_cache);
  1974. }