c2_rnic.c 16 KB

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  1. /*
  2. * Copyright (c) 2005 Ammasso, Inc. All rights reserved.
  3. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/pci.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/etherdevice.h>
  39. #include <linux/delay.h>
  40. #include <linux/ethtool.h>
  41. #include <linux/mii.h>
  42. #include <linux/if_vlan.h>
  43. #include <linux/crc32.h>
  44. #include <linux/in.h>
  45. #include <linux/ip.h>
  46. #include <linux/tcp.h>
  47. #include <linux/init.h>
  48. #include <linux/dma-mapping.h>
  49. #include <linux/mm.h>
  50. #include <linux/inet.h>
  51. #include <linux/vmalloc.h>
  52. #include <linux/route.h>
  53. #include <asm/io.h>
  54. #include <asm/irq.h>
  55. #include <asm/byteorder.h>
  56. #include <rdma/ib_smi.h>
  57. #include "c2.h"
  58. #include "c2_vq.h"
  59. /* Device capabilities */
  60. #define C2_MIN_PAGESIZE 1024
  61. #define C2_MAX_MRS 32768
  62. #define C2_MAX_QPS 16000
  63. #define C2_MAX_WQE_SZ 256
  64. #define C2_MAX_QP_WR ((128*1024)/C2_MAX_WQE_SZ)
  65. #define C2_MAX_SGES 4
  66. #define C2_MAX_SGE_RD 1
  67. #define C2_MAX_CQS 32768
  68. #define C2_MAX_CQES 4096
  69. #define C2_MAX_PDS 16384
  70. /*
  71. * Send the adapter INIT message to the amso1100
  72. */
  73. static int c2_adapter_init(struct c2_dev *c2dev)
  74. {
  75. struct c2wr_init_req wr;
  76. int err;
  77. memset(&wr, 0, sizeof(wr));
  78. c2_wr_set_id(&wr, CCWR_INIT);
  79. wr.hdr.context = 0;
  80. wr.hint_count = cpu_to_be64(c2dev->hint_count_dma);
  81. wr.q0_host_shared = cpu_to_be64(c2dev->req_vq.shared_dma);
  82. wr.q1_host_shared = cpu_to_be64(c2dev->rep_vq.shared_dma);
  83. wr.q1_host_msg_pool = cpu_to_be64(c2dev->rep_vq.host_dma);
  84. wr.q2_host_shared = cpu_to_be64(c2dev->aeq.shared_dma);
  85. wr.q2_host_msg_pool = cpu_to_be64(c2dev->aeq.host_dma);
  86. /* Post the init message */
  87. err = vq_send_wr(c2dev, (union c2wr *) & wr);
  88. return err;
  89. }
  90. /*
  91. * Send the adapter TERM message to the amso1100
  92. */
  93. static void c2_adapter_term(struct c2_dev *c2dev)
  94. {
  95. struct c2wr_init_req wr;
  96. memset(&wr, 0, sizeof(wr));
  97. c2_wr_set_id(&wr, CCWR_TERM);
  98. wr.hdr.context = 0;
  99. /* Post the init message */
  100. vq_send_wr(c2dev, (union c2wr *) & wr);
  101. c2dev->init = 0;
  102. return;
  103. }
  104. /*
  105. * Query the adapter
  106. */
  107. static int c2_rnic_query(struct c2_dev *c2dev, struct ib_device_attr *props)
  108. {
  109. struct c2_vq_req *vq_req;
  110. struct c2wr_rnic_query_req wr;
  111. struct c2wr_rnic_query_rep *reply;
  112. int err;
  113. vq_req = vq_req_alloc(c2dev);
  114. if (!vq_req)
  115. return -ENOMEM;
  116. c2_wr_set_id(&wr, CCWR_RNIC_QUERY);
  117. wr.hdr.context = (unsigned long) vq_req;
  118. wr.rnic_handle = c2dev->adapter_handle;
  119. vq_req_get(c2dev, vq_req);
  120. err = vq_send_wr(c2dev, (union c2wr *) &wr);
  121. if (err) {
  122. vq_req_put(c2dev, vq_req);
  123. goto bail1;
  124. }
  125. err = vq_wait_for_reply(c2dev, vq_req);
  126. if (err)
  127. goto bail1;
  128. reply =
  129. (struct c2wr_rnic_query_rep *) (unsigned long) (vq_req->reply_msg);
  130. if (!reply)
  131. err = -ENOMEM;
  132. else
  133. err = c2_errno(reply);
  134. if (err)
  135. goto bail2;
  136. props->fw_ver =
  137. ((u64)be32_to_cpu(reply->fw_ver_major) << 32) |
  138. ((be32_to_cpu(reply->fw_ver_minor) & 0xFFFF) << 16) |
  139. (be32_to_cpu(reply->fw_ver_patch) & 0xFFFF);
  140. memcpy(&props->sys_image_guid, c2dev->netdev->dev_addr, 6);
  141. props->max_mr_size = 0xFFFFFFFF;
  142. props->page_size_cap = ~(C2_MIN_PAGESIZE-1);
  143. props->vendor_id = be32_to_cpu(reply->vendor_id);
  144. props->vendor_part_id = be32_to_cpu(reply->part_number);
  145. props->hw_ver = be32_to_cpu(reply->hw_version);
  146. props->max_qp = be32_to_cpu(reply->max_qps);
  147. props->max_qp_wr = be32_to_cpu(reply->max_qp_depth);
  148. props->device_cap_flags = c2dev->device_cap_flags;
  149. props->max_sge = C2_MAX_SGES;
  150. props->max_sge_rd = C2_MAX_SGE_RD;
  151. props->max_cq = be32_to_cpu(reply->max_cqs);
  152. props->max_cqe = be32_to_cpu(reply->max_cq_depth);
  153. props->max_mr = be32_to_cpu(reply->max_mrs);
  154. props->max_pd = be32_to_cpu(reply->max_pds);
  155. props->max_qp_rd_atom = be32_to_cpu(reply->max_qp_ird);
  156. props->max_ee_rd_atom = 0;
  157. props->max_res_rd_atom = be32_to_cpu(reply->max_global_ird);
  158. props->max_qp_init_rd_atom = be32_to_cpu(reply->max_qp_ord);
  159. props->max_ee_init_rd_atom = 0;
  160. props->atomic_cap = IB_ATOMIC_NONE;
  161. props->max_ee = 0;
  162. props->max_rdd = 0;
  163. props->max_mw = be32_to_cpu(reply->max_mws);
  164. props->max_raw_ipv6_qp = 0;
  165. props->max_raw_ethy_qp = 0;
  166. props->max_mcast_grp = 0;
  167. props->max_mcast_qp_attach = 0;
  168. props->max_total_mcast_qp_attach = 0;
  169. props->max_ah = 0;
  170. props->max_fmr = 0;
  171. props->max_map_per_fmr = 0;
  172. props->max_srq = 0;
  173. props->max_srq_wr = 0;
  174. props->max_srq_sge = 0;
  175. props->max_pkeys = 0;
  176. props->local_ca_ack_delay = 0;
  177. bail2:
  178. vq_repbuf_free(c2dev, reply);
  179. bail1:
  180. vq_req_free(c2dev, vq_req);
  181. return err;
  182. }
  183. /*
  184. * Add an IP address to the RNIC interface
  185. */
  186. int c2_add_addr(struct c2_dev *c2dev, __be32 inaddr, __be32 inmask)
  187. {
  188. struct c2_vq_req *vq_req;
  189. struct c2wr_rnic_setconfig_req *wr;
  190. struct c2wr_rnic_setconfig_rep *reply;
  191. struct c2_netaddr netaddr;
  192. int err, len;
  193. vq_req = vq_req_alloc(c2dev);
  194. if (!vq_req)
  195. return -ENOMEM;
  196. len = sizeof(struct c2_netaddr);
  197. wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
  198. if (!wr) {
  199. err = -ENOMEM;
  200. goto bail0;
  201. }
  202. c2_wr_set_id(wr, CCWR_RNIC_SETCONFIG);
  203. wr->hdr.context = (unsigned long) vq_req;
  204. wr->rnic_handle = c2dev->adapter_handle;
  205. wr->option = cpu_to_be32(C2_CFG_ADD_ADDR);
  206. netaddr.ip_addr = inaddr;
  207. netaddr.netmask = inmask;
  208. netaddr.mtu = 0;
  209. memcpy(wr->data, &netaddr, len);
  210. vq_req_get(c2dev, vq_req);
  211. err = vq_send_wr(c2dev, (union c2wr *) wr);
  212. if (err) {
  213. vq_req_put(c2dev, vq_req);
  214. goto bail1;
  215. }
  216. err = vq_wait_for_reply(c2dev, vq_req);
  217. if (err)
  218. goto bail1;
  219. reply =
  220. (struct c2wr_rnic_setconfig_rep *) (unsigned long) (vq_req->reply_msg);
  221. if (!reply) {
  222. err = -ENOMEM;
  223. goto bail1;
  224. }
  225. err = c2_errno(reply);
  226. vq_repbuf_free(c2dev, reply);
  227. bail1:
  228. kfree(wr);
  229. bail0:
  230. vq_req_free(c2dev, vq_req);
  231. return err;
  232. }
  233. /*
  234. * Delete an IP address from the RNIC interface
  235. */
  236. int c2_del_addr(struct c2_dev *c2dev, __be32 inaddr, __be32 inmask)
  237. {
  238. struct c2_vq_req *vq_req;
  239. struct c2wr_rnic_setconfig_req *wr;
  240. struct c2wr_rnic_setconfig_rep *reply;
  241. struct c2_netaddr netaddr;
  242. int err, len;
  243. vq_req = vq_req_alloc(c2dev);
  244. if (!vq_req)
  245. return -ENOMEM;
  246. len = sizeof(struct c2_netaddr);
  247. wr = kmalloc(c2dev->req_vq.msg_size, GFP_KERNEL);
  248. if (!wr) {
  249. err = -ENOMEM;
  250. goto bail0;
  251. }
  252. c2_wr_set_id(wr, CCWR_RNIC_SETCONFIG);
  253. wr->hdr.context = (unsigned long) vq_req;
  254. wr->rnic_handle = c2dev->adapter_handle;
  255. wr->option = cpu_to_be32(C2_CFG_DEL_ADDR);
  256. netaddr.ip_addr = inaddr;
  257. netaddr.netmask = inmask;
  258. netaddr.mtu = 0;
  259. memcpy(wr->data, &netaddr, len);
  260. vq_req_get(c2dev, vq_req);
  261. err = vq_send_wr(c2dev, (union c2wr *) wr);
  262. if (err) {
  263. vq_req_put(c2dev, vq_req);
  264. goto bail1;
  265. }
  266. err = vq_wait_for_reply(c2dev, vq_req);
  267. if (err)
  268. goto bail1;
  269. reply =
  270. (struct c2wr_rnic_setconfig_rep *) (unsigned long) (vq_req->reply_msg);
  271. if (!reply) {
  272. err = -ENOMEM;
  273. goto bail1;
  274. }
  275. err = c2_errno(reply);
  276. vq_repbuf_free(c2dev, reply);
  277. bail1:
  278. kfree(wr);
  279. bail0:
  280. vq_req_free(c2dev, vq_req);
  281. return err;
  282. }
  283. /*
  284. * Open a single RNIC instance to use with all
  285. * low level openib calls
  286. */
  287. static int c2_rnic_open(struct c2_dev *c2dev)
  288. {
  289. struct c2_vq_req *vq_req;
  290. union c2wr wr;
  291. struct c2wr_rnic_open_rep *reply;
  292. int err;
  293. vq_req = vq_req_alloc(c2dev);
  294. if (vq_req == NULL) {
  295. return -ENOMEM;
  296. }
  297. memset(&wr, 0, sizeof(wr));
  298. c2_wr_set_id(&wr, CCWR_RNIC_OPEN);
  299. wr.rnic_open.req.hdr.context = (unsigned long) (vq_req);
  300. wr.rnic_open.req.flags = cpu_to_be16(RNIC_PRIV_MODE);
  301. wr.rnic_open.req.port_num = cpu_to_be16(0);
  302. wr.rnic_open.req.user_context = (unsigned long) c2dev;
  303. vq_req_get(c2dev, vq_req);
  304. err = vq_send_wr(c2dev, &wr);
  305. if (err) {
  306. vq_req_put(c2dev, vq_req);
  307. goto bail0;
  308. }
  309. err = vq_wait_for_reply(c2dev, vq_req);
  310. if (err) {
  311. goto bail0;
  312. }
  313. reply = (struct c2wr_rnic_open_rep *) (unsigned long) (vq_req->reply_msg);
  314. if (!reply) {
  315. err = -ENOMEM;
  316. goto bail0;
  317. }
  318. if ((err = c2_errno(reply)) != 0) {
  319. goto bail1;
  320. }
  321. c2dev->adapter_handle = reply->rnic_handle;
  322. bail1:
  323. vq_repbuf_free(c2dev, reply);
  324. bail0:
  325. vq_req_free(c2dev, vq_req);
  326. return err;
  327. }
  328. /*
  329. * Close the RNIC instance
  330. */
  331. static int c2_rnic_close(struct c2_dev *c2dev)
  332. {
  333. struct c2_vq_req *vq_req;
  334. union c2wr wr;
  335. struct c2wr_rnic_close_rep *reply;
  336. int err;
  337. vq_req = vq_req_alloc(c2dev);
  338. if (vq_req == NULL) {
  339. return -ENOMEM;
  340. }
  341. memset(&wr, 0, sizeof(wr));
  342. c2_wr_set_id(&wr, CCWR_RNIC_CLOSE);
  343. wr.rnic_close.req.hdr.context = (unsigned long) vq_req;
  344. wr.rnic_close.req.rnic_handle = c2dev->adapter_handle;
  345. vq_req_get(c2dev, vq_req);
  346. err = vq_send_wr(c2dev, &wr);
  347. if (err) {
  348. vq_req_put(c2dev, vq_req);
  349. goto bail0;
  350. }
  351. err = vq_wait_for_reply(c2dev, vq_req);
  352. if (err) {
  353. goto bail0;
  354. }
  355. reply = (struct c2wr_rnic_close_rep *) (unsigned long) (vq_req->reply_msg);
  356. if (!reply) {
  357. err = -ENOMEM;
  358. goto bail0;
  359. }
  360. if ((err = c2_errno(reply)) != 0) {
  361. goto bail1;
  362. }
  363. c2dev->adapter_handle = 0;
  364. bail1:
  365. vq_repbuf_free(c2dev, reply);
  366. bail0:
  367. vq_req_free(c2dev, vq_req);
  368. return err;
  369. }
  370. /*
  371. * Called by c2_probe to initialize the RNIC. This principally
  372. * involves initalizing the various limits and resouce pools that
  373. * comprise the RNIC instance.
  374. */
  375. int __devinit c2_rnic_init(struct c2_dev *c2dev)
  376. {
  377. int err;
  378. u32 qsize, msgsize;
  379. void *q1_pages;
  380. void *q2_pages;
  381. void __iomem *mmio_regs;
  382. /* Device capabilities */
  383. c2dev->device_cap_flags =
  384. (IB_DEVICE_RESIZE_MAX_WR |
  385. IB_DEVICE_CURR_QP_STATE_MOD |
  386. IB_DEVICE_SYS_IMAGE_GUID |
  387. IB_DEVICE_LOCAL_DMA_LKEY |
  388. IB_DEVICE_MEM_WINDOW);
  389. /* Allocate the qptr_array */
  390. c2dev->qptr_array = vmalloc(C2_MAX_CQS * sizeof(void *));
  391. if (!c2dev->qptr_array) {
  392. return -ENOMEM;
  393. }
  394. /* Inialize the qptr_array */
  395. memset(c2dev->qptr_array, 0, C2_MAX_CQS * sizeof(void *));
  396. c2dev->qptr_array[0] = (void *) &c2dev->req_vq;
  397. c2dev->qptr_array[1] = (void *) &c2dev->rep_vq;
  398. c2dev->qptr_array[2] = (void *) &c2dev->aeq;
  399. /* Initialize data structures */
  400. init_waitqueue_head(&c2dev->req_vq_wo);
  401. spin_lock_init(&c2dev->vqlock);
  402. spin_lock_init(&c2dev->lock);
  403. /* Allocate MQ shared pointer pool for kernel clients. User
  404. * mode client pools are hung off the user context
  405. */
  406. err = c2_init_mqsp_pool(c2dev, GFP_KERNEL, &c2dev->kern_mqsp_pool);
  407. if (err) {
  408. goto bail0;
  409. }
  410. /* Allocate shared pointers for Q0, Q1, and Q2 from
  411. * the shared pointer pool.
  412. */
  413. c2dev->hint_count = c2_alloc_mqsp(c2dev, c2dev->kern_mqsp_pool,
  414. &c2dev->hint_count_dma,
  415. GFP_KERNEL);
  416. c2dev->req_vq.shared = c2_alloc_mqsp(c2dev, c2dev->kern_mqsp_pool,
  417. &c2dev->req_vq.shared_dma,
  418. GFP_KERNEL);
  419. c2dev->rep_vq.shared = c2_alloc_mqsp(c2dev, c2dev->kern_mqsp_pool,
  420. &c2dev->rep_vq.shared_dma,
  421. GFP_KERNEL);
  422. c2dev->aeq.shared = c2_alloc_mqsp(c2dev, c2dev->kern_mqsp_pool,
  423. &c2dev->aeq.shared_dma, GFP_KERNEL);
  424. if (!c2dev->hint_count || !c2dev->req_vq.shared ||
  425. !c2dev->rep_vq.shared || !c2dev->aeq.shared) {
  426. err = -ENOMEM;
  427. goto bail1;
  428. }
  429. mmio_regs = c2dev->kva;
  430. /* Initialize the Verbs Request Queue */
  431. c2_mq_req_init(&c2dev->req_vq, 0,
  432. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q0_QSIZE)),
  433. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q0_MSGSIZE)),
  434. mmio_regs +
  435. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q0_POOLSTART)),
  436. mmio_regs +
  437. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q0_SHARED)),
  438. C2_MQ_ADAPTER_TARGET);
  439. /* Initialize the Verbs Reply Queue */
  440. qsize = be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q1_QSIZE));
  441. msgsize = be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q1_MSGSIZE));
  442. q1_pages = dma_alloc_coherent(&c2dev->pcidev->dev, qsize * msgsize,
  443. &c2dev->rep_vq.host_dma, GFP_KERNEL);
  444. if (!q1_pages) {
  445. err = -ENOMEM;
  446. goto bail1;
  447. }
  448. pci_unmap_addr_set(&c2dev->rep_vq, mapping, c2dev->rep_vq.host_dma);
  449. pr_debug("%s rep_vq va %p dma %llx\n", __func__, q1_pages,
  450. (unsigned long long) c2dev->rep_vq.host_dma);
  451. c2_mq_rep_init(&c2dev->rep_vq,
  452. 1,
  453. qsize,
  454. msgsize,
  455. q1_pages,
  456. mmio_regs +
  457. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q1_SHARED)),
  458. C2_MQ_HOST_TARGET);
  459. /* Initialize the Asynchronus Event Queue */
  460. qsize = be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q2_QSIZE));
  461. msgsize = be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q2_MSGSIZE));
  462. q2_pages = dma_alloc_coherent(&c2dev->pcidev->dev, qsize * msgsize,
  463. &c2dev->aeq.host_dma, GFP_KERNEL);
  464. if (!q2_pages) {
  465. err = -ENOMEM;
  466. goto bail2;
  467. }
  468. pci_unmap_addr_set(&c2dev->aeq, mapping, c2dev->aeq.host_dma);
  469. pr_debug("%s aeq va %p dma %llx\n", __func__, q2_pages,
  470. (unsigned long long) c2dev->aeq.host_dma);
  471. c2_mq_rep_init(&c2dev->aeq,
  472. 2,
  473. qsize,
  474. msgsize,
  475. q2_pages,
  476. mmio_regs +
  477. be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_Q2_SHARED)),
  478. C2_MQ_HOST_TARGET);
  479. /* Initialize the verbs request allocator */
  480. err = vq_init(c2dev);
  481. if (err)
  482. goto bail3;
  483. /* Enable interrupts on the adapter */
  484. writel(0, c2dev->regs + C2_IDIS);
  485. /* create the WR init message */
  486. err = c2_adapter_init(c2dev);
  487. if (err)
  488. goto bail4;
  489. c2dev->init++;
  490. /* open an adapter instance */
  491. err = c2_rnic_open(c2dev);
  492. if (err)
  493. goto bail4;
  494. /* Initialize cached the adapter limits */
  495. if (c2_rnic_query(c2dev, &c2dev->props))
  496. goto bail5;
  497. /* Initialize the PD pool */
  498. err = c2_init_pd_table(c2dev);
  499. if (err)
  500. goto bail5;
  501. /* Initialize the QP pool */
  502. c2_init_qp_table(c2dev);
  503. return 0;
  504. bail5:
  505. c2_rnic_close(c2dev);
  506. bail4:
  507. vq_term(c2dev);
  508. bail3:
  509. dma_free_coherent(&c2dev->pcidev->dev,
  510. c2dev->aeq.q_size * c2dev->aeq.msg_size,
  511. q2_pages, pci_unmap_addr(&c2dev->aeq, mapping));
  512. bail2:
  513. dma_free_coherent(&c2dev->pcidev->dev,
  514. c2dev->rep_vq.q_size * c2dev->rep_vq.msg_size,
  515. q1_pages, pci_unmap_addr(&c2dev->rep_vq, mapping));
  516. bail1:
  517. c2_free_mqsp_pool(c2dev, c2dev->kern_mqsp_pool);
  518. bail0:
  519. vfree(c2dev->qptr_array);
  520. return err;
  521. }
  522. /*
  523. * Called by c2_remove to cleanup the RNIC resources.
  524. */
  525. void __devexit c2_rnic_term(struct c2_dev *c2dev)
  526. {
  527. /* Close the open adapter instance */
  528. c2_rnic_close(c2dev);
  529. /* Send the TERM message to the adapter */
  530. c2_adapter_term(c2dev);
  531. /* Disable interrupts on the adapter */
  532. writel(1, c2dev->regs + C2_IDIS);
  533. /* Free the QP pool */
  534. c2_cleanup_qp_table(c2dev);
  535. /* Free the PD pool */
  536. c2_cleanup_pd_table(c2dev);
  537. /* Free the verbs request allocator */
  538. vq_term(c2dev);
  539. /* Free the asynchronus event queue */
  540. dma_free_coherent(&c2dev->pcidev->dev,
  541. c2dev->aeq.q_size * c2dev->aeq.msg_size,
  542. c2dev->aeq.msg_pool.host,
  543. pci_unmap_addr(&c2dev->aeq, mapping));
  544. /* Free the verbs reply queue */
  545. dma_free_coherent(&c2dev->pcidev->dev,
  546. c2dev->rep_vq.q_size * c2dev->rep_vq.msg_size,
  547. c2dev->rep_vq.msg_pool.host,
  548. pci_unmap_addr(&c2dev->rep_vq, mapping));
  549. /* Free the MQ shared pointer pool */
  550. c2_free_mqsp_pool(c2dev, c2dev->kern_mqsp_pool);
  551. /* Free the qptr_array */
  552. vfree(c2dev->qptr_array);
  553. return;
  554. }