qd65xx.c 10 KB

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  1. /*
  2. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  3. */
  4. /*
  5. * Version 0.03 Cleaned auto-tune, added probe
  6. * Version 0.04 Added second channel tuning
  7. * Version 0.05 Enhanced tuning ; added qd6500 support
  8. * Version 0.06 Added dos driver's list
  9. * Version 0.07 Second channel bug fix
  10. *
  11. * QDI QD6500/QD6580 EIDE controller fast support
  12. *
  13. * To activate controller support, use "ide0=qd65xx"
  14. */
  15. /*
  16. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  17. * Samuel Thibault <samuel.thibault@fnac.net>
  18. */
  19. #include <linux/module.h>
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/delay.h>
  23. #include <linux/timer.h>
  24. #include <linux/mm.h>
  25. #include <linux/ioport.h>
  26. #include <linux/blkdev.h>
  27. #include <linux/hdreg.h>
  28. #include <linux/ide.h>
  29. #include <linux/init.h>
  30. #include <asm/system.h>
  31. #include <asm/io.h>
  32. #define DRV_NAME "qd65xx"
  33. #include "qd65xx.h"
  34. /*
  35. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  36. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  37. * -- qd6500 is a single IDE interface
  38. * -- qd6580 is a dual IDE interface
  39. *
  40. * More research on qd6580 being done by willmore@cig.mot.com (David)
  41. * More Information given by Petr Soucek (petr@ryston.cz)
  42. * http://www.ryston.cz/petr/vlb
  43. */
  44. /*
  45. * base: Timer1
  46. *
  47. *
  48. * base+0x01: Config (R/O)
  49. *
  50. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  51. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  52. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  53. * bit 3: qd6500: 1 = disabled, 0 = enabled
  54. * qd6580: 1
  55. * upper nibble:
  56. * qd6500: 1100
  57. * qd6580: either 1010 or 0101
  58. *
  59. *
  60. * base+0x02: Timer2 (qd6580 only)
  61. *
  62. *
  63. * base+0x03: Control (qd6580 only)
  64. *
  65. * bits 0-3 must always be set 1
  66. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  67. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  68. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  69. * channel 1 for hdc & hdd
  70. * bit 1 : 1 = only disks on primary port
  71. * 0 = disks & ATAPI devices on primary port
  72. * bit 2-4 : always 0
  73. * bit 5 : status, but of what ?
  74. * bit 6 : always set 1 by dos driver
  75. * bit 7 : set 1 for non-ATAPI devices on primary port
  76. * (maybe read-ahead and post-write buffer ?)
  77. */
  78. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  79. /*
  80. * qd65xx_select:
  81. *
  82. * This routine is invoked to prepare for access to a given drive.
  83. */
  84. static void qd65xx_select(ide_drive_t *drive)
  85. {
  86. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  87. (QD_TIMREG(drive) & 0x02);
  88. if (timings[index] != QD_TIMING(drive))
  89. outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  90. }
  91. /*
  92. * qd6500_compute_timing
  93. *
  94. * computes the timing value where
  95. * lower nibble represents active time, in count of VLB clocks
  96. * upper nibble represents recovery time, in count of VLB clocks
  97. */
  98. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  99. {
  100. int clk = ide_vlb_clk ? ide_vlb_clk : 50;
  101. u8 act_cyc, rec_cyc;
  102. if (clk <= 33) {
  103. act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
  104. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
  105. } else {
  106. act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
  107. rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
  108. }
  109. return (rec_cyc << 4) | 0x08 | act_cyc;
  110. }
  111. /*
  112. * qd6580_compute_timing
  113. *
  114. * idem for qd6580
  115. */
  116. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  117. {
  118. int clk = ide_vlb_clk ? ide_vlb_clk : 50;
  119. u8 act_cyc, rec_cyc;
  120. act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
  121. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
  122. return (rec_cyc << 4) | act_cyc;
  123. }
  124. /*
  125. * qd_find_disk_type
  126. *
  127. * tries to find timing from dos driver's table
  128. */
  129. static int qd_find_disk_type (ide_drive_t *drive,
  130. int *active_time, int *recovery_time)
  131. {
  132. struct qd65xx_timing_s *p;
  133. char model[40];
  134. if (!*drive->id->model) return 0;
  135. strncpy(model,drive->id->model,40);
  136. ide_fixstring(model,40,1); /* byte-swap */
  137. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  138. if (!strncmp(p->model, model+p->offset, 4)) {
  139. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  140. *active_time = p->active;
  141. *recovery_time = p->recovery;
  142. return 1;
  143. }
  144. }
  145. return 0;
  146. }
  147. /*
  148. * qd_set_timing:
  149. *
  150. * records the timing
  151. */
  152. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  153. {
  154. drive->drive_data &= 0xff00;
  155. drive->drive_data |= timing;
  156. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  157. }
  158. static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
  159. {
  160. int active_time = 175;
  161. int recovery_time = 415; /* worst case values from the dos driver */
  162. /*
  163. * FIXME: use "pio" value
  164. */
  165. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  166. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  167. && drive->id->eide_pio >= 240) {
  168. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  169. drive->id->tPIO);
  170. active_time = 110;
  171. recovery_time = drive->id->eide_pio - 120;
  172. }
  173. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  174. }
  175. static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
  176. {
  177. ide_hwif_t *hwif = drive->hwif;
  178. struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
  179. unsigned int cycle_time;
  180. int active_time = 175;
  181. int recovery_time = 415; /* worst case values from the dos driver */
  182. u8 base = (hwif->config_data & 0xff00) >> 8;
  183. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  184. cycle_time = ide_pio_cycle_time(drive, pio);
  185. switch (pio) {
  186. case 0: break;
  187. case 3:
  188. if (cycle_time >= 110) {
  189. active_time = 86;
  190. recovery_time = cycle_time - 102;
  191. } else
  192. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  193. break;
  194. case 4:
  195. if (cycle_time >= 69) {
  196. active_time = 70;
  197. recovery_time = cycle_time - 61;
  198. } else
  199. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  200. break;
  201. default:
  202. if (cycle_time >= 180) {
  203. active_time = 110;
  204. recovery_time = cycle_time - 120;
  205. } else {
  206. active_time = t->active;
  207. recovery_time = cycle_time - active_time;
  208. }
  209. }
  210. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  211. }
  212. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  213. outb(0x5f, QD_CONTROL_PORT);
  214. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  215. "and post-write buffer on %s.\n",
  216. drive->name, HWIF(drive)->name);
  217. }
  218. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  219. }
  220. /*
  221. * qd_testreg
  222. *
  223. * tests if the given port is a register
  224. */
  225. static int __init qd_testreg(int port)
  226. {
  227. unsigned long flags;
  228. u8 savereg, readreg;
  229. local_irq_save(flags);
  230. savereg = inb_p(port);
  231. outb_p(QD_TESTVAL, port); /* safe value */
  232. readreg = inb_p(port);
  233. outb(savereg, port);
  234. local_irq_restore(flags);
  235. if (savereg == QD_TESTVAL) {
  236. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  237. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  238. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  239. return 1;
  240. }
  241. return (readreg != QD_TESTVAL);
  242. }
  243. static void __init qd6500_init_dev(ide_drive_t *drive)
  244. {
  245. ide_hwif_t *hwif = drive->hwif;
  246. u8 base = (hwif->config_data & 0xff00) >> 8;
  247. u8 config = QD_CONFIG(hwif);
  248. drive->drive_data = QD6500_DEF_DATA;
  249. }
  250. static void __init qd6580_init_dev(ide_drive_t *drive)
  251. {
  252. ide_hwif_t *hwif = drive->hwif;
  253. u16 t1, t2;
  254. u8 base = (hwif->config_data & 0xff00) >> 8;
  255. u8 config = QD_CONFIG(hwif);
  256. if (hwif->host_flags & IDE_HFLAG_SINGLE) {
  257. t1 = QD6580_DEF_DATA;
  258. t2 = QD6580_DEF_DATA2;
  259. } else
  260. t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
  261. drive->drive_data = drive->select.b.unit ? t2 : t1;
  262. }
  263. static const struct ide_port_ops qd6500_port_ops = {
  264. .init_dev = qd6500_init_dev,
  265. .set_pio_mode = qd6500_set_pio_mode,
  266. .selectproc = qd65xx_select,
  267. };
  268. static const struct ide_port_ops qd6580_port_ops = {
  269. .init_dev = qd6580_init_dev,
  270. .set_pio_mode = qd6580_set_pio_mode,
  271. .selectproc = qd65xx_select,
  272. };
  273. static const struct ide_port_info qd65xx_port_info __initdata = {
  274. .name = DRV_NAME,
  275. .chipset = ide_qd65xx,
  276. .host_flags = IDE_HFLAG_IO_32BIT |
  277. IDE_HFLAG_NO_DMA,
  278. .pio_mask = ATA_PIO4,
  279. };
  280. /*
  281. * qd_probe:
  282. *
  283. * looks at the specified baseport, and if qd found, registers & initialises it
  284. * return 1 if another qd may be probed
  285. */
  286. static int __init qd_probe(int base)
  287. {
  288. int rc;
  289. u8 config, unit, control;
  290. struct ide_port_info d = qd65xx_port_info;
  291. config = inb(QD_CONFIG_PORT);
  292. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  293. return -ENODEV;
  294. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  295. if (unit)
  296. d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
  297. switch (config & 0xf0) {
  298. case QD_CONFIG_QD6500:
  299. if (qd_testreg(base))
  300. return -ENODEV; /* bad register */
  301. if (config & QD_CONFIG_DISABLED) {
  302. printk(KERN_WARNING "qd6500 is disabled !\n");
  303. return -ENODEV;
  304. }
  305. printk(KERN_NOTICE "qd6500 at %#x\n", base);
  306. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  307. config, QD_ID3);
  308. d.port_ops = &qd6500_port_ops;
  309. d.host_flags |= IDE_HFLAG_SINGLE;
  310. break;
  311. case QD_CONFIG_QD6580_A:
  312. case QD_CONFIG_QD6580_B:
  313. if (qd_testreg(base) || qd_testreg(base + 0x02))
  314. return -ENODEV; /* bad registers */
  315. control = inb(QD_CONTROL_PORT);
  316. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  317. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  318. config, control, QD_ID3);
  319. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  320. d.port_ops = &qd6580_port_ops;
  321. if (control & QD_CONTR_SEC_DISABLED)
  322. d.host_flags |= IDE_HFLAG_SINGLE;
  323. printk(KERN_INFO "qd6580: %s IDE board\n",
  324. (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
  325. break;
  326. default:
  327. return -ENODEV;
  328. }
  329. rc = ide_legacy_device_add(&d, (base << 8) | config);
  330. if (d.host_flags & IDE_HFLAG_SINGLE)
  331. return (rc == 0) ? 1 : rc;
  332. return rc;
  333. }
  334. static int probe_qd65xx;
  335. module_param_named(probe, probe_qd65xx, bool, 0);
  336. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  337. static int __init qd65xx_init(void)
  338. {
  339. int rc1, rc2 = -ENODEV;
  340. if (probe_qd65xx == 0)
  341. return -ENODEV;
  342. rc1 = qd_probe(0x30);
  343. if (rc1)
  344. rc2 = qd_probe(0xb0);
  345. if (rc1 < 0 && rc2 < 0)
  346. return -ENODEV;
  347. return 0;
  348. }
  349. module_init(qd65xx_init);
  350. MODULE_AUTHOR("Samuel Thibault");
  351. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  352. MODULE_LICENSE("GPL");