f71805f.c 48 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
  3. * chips integrated hardware monitoring features
  4. * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * The F71872F/FG is almost the same, with two more voltages monitored,
  11. * and 6 VID inputs.
  12. *
  13. * The F71806F/FG is essentially the same as the F71872F/FG. It even has
  14. * the same chip ID, so the driver can't differentiate between.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software
  28. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/slab.h>
  33. #include <linux/jiffies.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/hwmon.h>
  36. #include <linux/hwmon-sysfs.h>
  37. #include <linux/err.h>
  38. #include <linux/mutex.h>
  39. #include <linux/sysfs.h>
  40. #include <linux/ioport.h>
  41. #include <asm/io.h>
  42. static unsigned short force_id;
  43. module_param(force_id, ushort, 0);
  44. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  45. static struct platform_device *pdev;
  46. #define DRVNAME "f71805f"
  47. enum kinds { f71805f, f71872f };
  48. /*
  49. * Super-I/O constants and functions
  50. */
  51. #define F71805F_LD_HWM 0x04
  52. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  53. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  54. #define SIO_REG_DEVREV 0x22 /* Device revision */
  55. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  56. #define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
  57. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  58. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  59. #define SIO_FINTEK_ID 0x1934
  60. #define SIO_F71805F_ID 0x0406
  61. #define SIO_F71872F_ID 0x0341
  62. static inline int
  63. superio_inb(int base, int reg)
  64. {
  65. outb(reg, base);
  66. return inb(base + 1);
  67. }
  68. static int
  69. superio_inw(int base, int reg)
  70. {
  71. int val;
  72. outb(reg++, base);
  73. val = inb(base + 1) << 8;
  74. outb(reg, base);
  75. val |= inb(base + 1);
  76. return val;
  77. }
  78. static inline void
  79. superio_select(int base, int ld)
  80. {
  81. outb(SIO_REG_LDSEL, base);
  82. outb(ld, base + 1);
  83. }
  84. static inline void
  85. superio_enter(int base)
  86. {
  87. outb(0x87, base);
  88. outb(0x87, base);
  89. }
  90. static inline void
  91. superio_exit(int base)
  92. {
  93. outb(0xaa, base);
  94. }
  95. /*
  96. * ISA constants
  97. */
  98. #define REGION_LENGTH 8
  99. #define ADDR_REG_OFFSET 5
  100. #define DATA_REG_OFFSET 6
  101. /*
  102. * Registers
  103. */
  104. /* in nr from 0 to 10 (8-bit values) */
  105. #define F71805F_REG_IN(nr) (0x10 + (nr))
  106. #define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
  107. #define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
  108. /* fan nr from 0 to 2 (12-bit values, two registers) */
  109. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  110. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  111. #define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
  112. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  113. #define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
  114. #define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
  115. /* temp nr from 0 to 2 (8-bit values) */
  116. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  117. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  118. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  119. #define F71805F_REG_TEMP_MODE 0x01
  120. /* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
  121. /* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
  122. #define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
  123. (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
  124. #define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
  125. (0xA4 + 0x10 * (pwmnr) + \
  126. 2 * (2 - (apnr)))
  127. #define F71805F_REG_START 0x00
  128. /* status nr from 0 to 2 */
  129. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  130. /* individual register bits */
  131. #define FAN_CTRL_DC_MODE 0x10
  132. #define FAN_CTRL_LATCH_FULL 0x08
  133. #define FAN_CTRL_MODE_MASK 0x03
  134. #define FAN_CTRL_MODE_SPEED 0x00
  135. #define FAN_CTRL_MODE_TEMPERATURE 0x01
  136. #define FAN_CTRL_MODE_MANUAL 0x02
  137. /*
  138. * Data structures and manipulation thereof
  139. */
  140. struct f71805f_auto_point {
  141. u8 temp[3];
  142. u16 fan[3];
  143. };
  144. struct f71805f_data {
  145. unsigned short addr;
  146. const char *name;
  147. struct device *hwmon_dev;
  148. struct mutex update_lock;
  149. char valid; /* !=0 if following fields are valid */
  150. unsigned long last_updated; /* In jiffies */
  151. unsigned long last_limits; /* In jiffies */
  152. /* Register values */
  153. u8 in[11];
  154. u8 in_high[11];
  155. u8 in_low[11];
  156. u16 has_in;
  157. u16 fan[3];
  158. u16 fan_low[3];
  159. u16 fan_target[3];
  160. u8 fan_ctrl[3];
  161. u8 pwm[3];
  162. u8 pwm_freq[3];
  163. u8 temp[3];
  164. u8 temp_high[3];
  165. u8 temp_hyst[3];
  166. u8 temp_mode;
  167. unsigned long alarms;
  168. struct f71805f_auto_point auto_points[3];
  169. };
  170. struct f71805f_sio_data {
  171. enum kinds kind;
  172. u8 fnsel1;
  173. };
  174. static inline long in_from_reg(u8 reg)
  175. {
  176. return (reg * 8);
  177. }
  178. /* The 2 least significant bits are not used */
  179. static inline u8 in_to_reg(long val)
  180. {
  181. if (val <= 0)
  182. return 0;
  183. if (val >= 2016)
  184. return 0xfc;
  185. return (((val + 16) / 32) << 2);
  186. }
  187. /* in0 is downscaled by a factor 2 internally */
  188. static inline long in0_from_reg(u8 reg)
  189. {
  190. return (reg * 16);
  191. }
  192. static inline u8 in0_to_reg(long val)
  193. {
  194. if (val <= 0)
  195. return 0;
  196. if (val >= 4032)
  197. return 0xfc;
  198. return (((val + 32) / 64) << 2);
  199. }
  200. /* The 4 most significant bits are not used */
  201. static inline long fan_from_reg(u16 reg)
  202. {
  203. reg &= 0xfff;
  204. if (!reg || reg == 0xfff)
  205. return 0;
  206. return (1500000 / reg);
  207. }
  208. static inline u16 fan_to_reg(long rpm)
  209. {
  210. /* If the low limit is set below what the chip can measure,
  211. store the largest possible 12-bit value in the registers,
  212. so that no alarm will ever trigger. */
  213. if (rpm < 367)
  214. return 0xfff;
  215. return (1500000 / rpm);
  216. }
  217. static inline unsigned long pwm_freq_from_reg(u8 reg)
  218. {
  219. unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
  220. reg &= 0x7f;
  221. if (reg == 0)
  222. reg++;
  223. return clock / (reg << 8);
  224. }
  225. static inline u8 pwm_freq_to_reg(unsigned long val)
  226. {
  227. if (val >= 187500) /* The highest we can do */
  228. return 0x80;
  229. if (val >= 1475) /* Use 48 MHz clock */
  230. return 0x80 | (48000000UL / (val << 8));
  231. if (val < 31) /* The lowest we can do */
  232. return 0x7f;
  233. else /* Use 1 MHz clock */
  234. return 1000000UL / (val << 8);
  235. }
  236. static inline int pwm_mode_from_reg(u8 reg)
  237. {
  238. return !(reg & FAN_CTRL_DC_MODE);
  239. }
  240. static inline long temp_from_reg(u8 reg)
  241. {
  242. return (reg * 1000);
  243. }
  244. static inline u8 temp_to_reg(long val)
  245. {
  246. if (val < 0)
  247. val = 0;
  248. else if (val > 1000 * 0xff)
  249. val = 0xff;
  250. return ((val + 500) / 1000);
  251. }
  252. /*
  253. * Device I/O access
  254. */
  255. /* Must be called with data->update_lock held, except during initialization */
  256. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  257. {
  258. outb(reg, data->addr + ADDR_REG_OFFSET);
  259. return inb(data->addr + DATA_REG_OFFSET);
  260. }
  261. /* Must be called with data->update_lock held, except during initialization */
  262. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  263. {
  264. outb(reg, data->addr + ADDR_REG_OFFSET);
  265. outb(val, data->addr + DATA_REG_OFFSET);
  266. }
  267. /* It is important to read the MSB first, because doing so latches the
  268. value of the LSB, so we are sure both bytes belong to the same value.
  269. Must be called with data->update_lock held, except during initialization */
  270. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  271. {
  272. u16 val;
  273. outb(reg, data->addr + ADDR_REG_OFFSET);
  274. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  275. outb(++reg, data->addr + ADDR_REG_OFFSET);
  276. val |= inb(data->addr + DATA_REG_OFFSET);
  277. return val;
  278. }
  279. /* Must be called with data->update_lock held, except during initialization */
  280. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  281. {
  282. outb(reg, data->addr + ADDR_REG_OFFSET);
  283. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  284. outb(++reg, data->addr + ADDR_REG_OFFSET);
  285. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  286. }
  287. static struct f71805f_data *f71805f_update_device(struct device *dev)
  288. {
  289. struct f71805f_data *data = dev_get_drvdata(dev);
  290. int nr, apnr;
  291. mutex_lock(&data->update_lock);
  292. /* Limit registers cache is refreshed after 60 seconds */
  293. if (time_after(jiffies, data->last_updated + 60 * HZ)
  294. || !data->valid) {
  295. for (nr = 0; nr < 11; nr++) {
  296. if (!(data->has_in & (1 << nr)))
  297. continue;
  298. data->in_high[nr] = f71805f_read8(data,
  299. F71805F_REG_IN_HIGH(nr));
  300. data->in_low[nr] = f71805f_read8(data,
  301. F71805F_REG_IN_LOW(nr));
  302. }
  303. for (nr = 0; nr < 3; nr++) {
  304. data->fan_low[nr] = f71805f_read16(data,
  305. F71805F_REG_FAN_LOW(nr));
  306. data->fan_target[nr] = f71805f_read16(data,
  307. F71805F_REG_FAN_TARGET(nr));
  308. data->pwm_freq[nr] = f71805f_read8(data,
  309. F71805F_REG_PWM_FREQ(nr));
  310. }
  311. for (nr = 0; nr < 3; nr++) {
  312. data->temp_high[nr] = f71805f_read8(data,
  313. F71805F_REG_TEMP_HIGH(nr));
  314. data->temp_hyst[nr] = f71805f_read8(data,
  315. F71805F_REG_TEMP_HYST(nr));
  316. }
  317. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  318. for (nr = 0; nr < 3; nr++) {
  319. for (apnr = 0; apnr < 3; apnr++) {
  320. data->auto_points[nr].temp[apnr] =
  321. f71805f_read8(data,
  322. F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
  323. apnr));
  324. data->auto_points[nr].fan[apnr] =
  325. f71805f_read16(data,
  326. F71805F_REG_PWM_AUTO_POINT_FAN(nr,
  327. apnr));
  328. }
  329. }
  330. data->last_limits = jiffies;
  331. }
  332. /* Measurement registers cache is refreshed after 1 second */
  333. if (time_after(jiffies, data->last_updated + HZ)
  334. || !data->valid) {
  335. for (nr = 0; nr < 11; nr++) {
  336. if (!(data->has_in & (1 << nr)))
  337. continue;
  338. data->in[nr] = f71805f_read8(data,
  339. F71805F_REG_IN(nr));
  340. }
  341. for (nr = 0; nr < 3; nr++) {
  342. data->fan[nr] = f71805f_read16(data,
  343. F71805F_REG_FAN(nr));
  344. data->fan_ctrl[nr] = f71805f_read8(data,
  345. F71805F_REG_FAN_CTRL(nr));
  346. data->pwm[nr] = f71805f_read8(data,
  347. F71805F_REG_PWM_DUTY(nr));
  348. }
  349. for (nr = 0; nr < 3; nr++) {
  350. data->temp[nr] = f71805f_read8(data,
  351. F71805F_REG_TEMP(nr));
  352. }
  353. data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
  354. + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
  355. + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
  356. data->last_updated = jiffies;
  357. data->valid = 1;
  358. }
  359. mutex_unlock(&data->update_lock);
  360. return data;
  361. }
  362. /*
  363. * Sysfs interface
  364. */
  365. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  366. char *buf)
  367. {
  368. struct f71805f_data *data = f71805f_update_device(dev);
  369. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  370. int nr = attr->index;
  371. return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
  372. }
  373. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  374. *devattr, char *buf)
  375. {
  376. struct f71805f_data *data = f71805f_update_device(dev);
  377. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  378. int nr = attr->index;
  379. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
  380. }
  381. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  382. *devattr, char *buf)
  383. {
  384. struct f71805f_data *data = f71805f_update_device(dev);
  385. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  386. int nr = attr->index;
  387. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
  388. }
  389. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  390. *devattr, const char *buf, size_t count)
  391. {
  392. struct f71805f_data *data = dev_get_drvdata(dev);
  393. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  394. int nr = attr->index;
  395. long val = simple_strtol(buf, NULL, 10);
  396. mutex_lock(&data->update_lock);
  397. data->in_high[nr] = in0_to_reg(val);
  398. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  399. mutex_unlock(&data->update_lock);
  400. return count;
  401. }
  402. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  403. *devattr, const char *buf, size_t count)
  404. {
  405. struct f71805f_data *data = dev_get_drvdata(dev);
  406. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  407. int nr = attr->index;
  408. long val = simple_strtol(buf, NULL, 10);
  409. mutex_lock(&data->update_lock);
  410. data->in_low[nr] = in0_to_reg(val);
  411. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  412. mutex_unlock(&data->update_lock);
  413. return count;
  414. }
  415. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  416. char *buf)
  417. {
  418. struct f71805f_data *data = f71805f_update_device(dev);
  419. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  420. int nr = attr->index;
  421. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  422. }
  423. static ssize_t show_in_max(struct device *dev, struct device_attribute
  424. *devattr, char *buf)
  425. {
  426. struct f71805f_data *data = f71805f_update_device(dev);
  427. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  428. int nr = attr->index;
  429. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  430. }
  431. static ssize_t show_in_min(struct device *dev, struct device_attribute
  432. *devattr, char *buf)
  433. {
  434. struct f71805f_data *data = f71805f_update_device(dev);
  435. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  436. int nr = attr->index;
  437. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  438. }
  439. static ssize_t set_in_max(struct device *dev, struct device_attribute
  440. *devattr, const char *buf, size_t count)
  441. {
  442. struct f71805f_data *data = dev_get_drvdata(dev);
  443. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  444. int nr = attr->index;
  445. long val = simple_strtol(buf, NULL, 10);
  446. mutex_lock(&data->update_lock);
  447. data->in_high[nr] = in_to_reg(val);
  448. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  449. mutex_unlock(&data->update_lock);
  450. return count;
  451. }
  452. static ssize_t set_in_min(struct device *dev, struct device_attribute
  453. *devattr, const char *buf, size_t count)
  454. {
  455. struct f71805f_data *data = dev_get_drvdata(dev);
  456. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  457. int nr = attr->index;
  458. long val = simple_strtol(buf, NULL, 10);
  459. mutex_lock(&data->update_lock);
  460. data->in_low[nr] = in_to_reg(val);
  461. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  462. mutex_unlock(&data->update_lock);
  463. return count;
  464. }
  465. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  466. char *buf)
  467. {
  468. struct f71805f_data *data = f71805f_update_device(dev);
  469. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  470. int nr = attr->index;
  471. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  472. }
  473. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  474. *devattr, char *buf)
  475. {
  476. struct f71805f_data *data = f71805f_update_device(dev);
  477. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  478. int nr = attr->index;
  479. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  480. }
  481. static ssize_t show_fan_target(struct device *dev, struct device_attribute
  482. *devattr, char *buf)
  483. {
  484. struct f71805f_data *data = f71805f_update_device(dev);
  485. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  486. int nr = attr->index;
  487. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
  488. }
  489. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  490. *devattr, const char *buf, size_t count)
  491. {
  492. struct f71805f_data *data = dev_get_drvdata(dev);
  493. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  494. int nr = attr->index;
  495. long val = simple_strtol(buf, NULL, 10);
  496. mutex_lock(&data->update_lock);
  497. data->fan_low[nr] = fan_to_reg(val);
  498. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  499. mutex_unlock(&data->update_lock);
  500. return count;
  501. }
  502. static ssize_t set_fan_target(struct device *dev, struct device_attribute
  503. *devattr, const char *buf, size_t count)
  504. {
  505. struct f71805f_data *data = dev_get_drvdata(dev);
  506. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  507. int nr = attr->index;
  508. long val = simple_strtol(buf, NULL, 10);
  509. mutex_lock(&data->update_lock);
  510. data->fan_target[nr] = fan_to_reg(val);
  511. f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
  512. data->fan_target[nr]);
  513. mutex_unlock(&data->update_lock);
  514. return count;
  515. }
  516. static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
  517. char *buf)
  518. {
  519. struct f71805f_data *data = f71805f_update_device(dev);
  520. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  521. int nr = attr->index;
  522. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  523. }
  524. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  525. *devattr, char *buf)
  526. {
  527. struct f71805f_data *data = f71805f_update_device(dev);
  528. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  529. int nr = attr->index;
  530. int mode;
  531. switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
  532. case FAN_CTRL_MODE_SPEED:
  533. mode = 3;
  534. break;
  535. case FAN_CTRL_MODE_TEMPERATURE:
  536. mode = 2;
  537. break;
  538. default: /* MANUAL */
  539. mode = 1;
  540. }
  541. return sprintf(buf, "%d\n", mode);
  542. }
  543. static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
  544. *devattr, char *buf)
  545. {
  546. struct f71805f_data *data = f71805f_update_device(dev);
  547. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  548. int nr = attr->index;
  549. return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
  550. }
  551. static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
  552. *devattr, char *buf)
  553. {
  554. struct f71805f_data *data = f71805f_update_device(dev);
  555. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  556. int nr = attr->index;
  557. return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
  558. }
  559. static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
  560. const char *buf, size_t count)
  561. {
  562. struct f71805f_data *data = dev_get_drvdata(dev);
  563. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  564. int nr = attr->index;
  565. unsigned long val = simple_strtoul(buf, NULL, 10);
  566. if (val > 255)
  567. return -EINVAL;
  568. mutex_lock(&data->update_lock);
  569. data->pwm[nr] = val;
  570. f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
  571. mutex_unlock(&data->update_lock);
  572. return count;
  573. }
  574. static struct attribute *f71805f_attr_pwm[];
  575. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  576. *devattr, const char *buf, size_t count)
  577. {
  578. struct f71805f_data *data = dev_get_drvdata(dev);
  579. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  580. int nr = attr->index;
  581. unsigned long val = simple_strtoul(buf, NULL, 10);
  582. u8 reg;
  583. if (val < 1 || val > 3)
  584. return -EINVAL;
  585. if (val > 1) { /* Automatic mode, user can't set PWM value */
  586. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  587. S_IRUGO))
  588. dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
  589. }
  590. mutex_lock(&data->update_lock);
  591. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
  592. & ~FAN_CTRL_MODE_MASK;
  593. switch (val) {
  594. case 1:
  595. reg |= FAN_CTRL_MODE_MANUAL;
  596. break;
  597. case 2:
  598. reg |= FAN_CTRL_MODE_TEMPERATURE;
  599. break;
  600. case 3:
  601. reg |= FAN_CTRL_MODE_SPEED;
  602. break;
  603. }
  604. data->fan_ctrl[nr] = reg;
  605. f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
  606. mutex_unlock(&data->update_lock);
  607. if (val == 1) { /* Manual mode, user can set PWM value */
  608. if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
  609. S_IRUGO | S_IWUSR))
  610. dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
  611. }
  612. return count;
  613. }
  614. static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
  615. *devattr, const char *buf, size_t count)
  616. {
  617. struct f71805f_data *data = dev_get_drvdata(dev);
  618. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  619. int nr = attr->index;
  620. unsigned long val = simple_strtoul(buf, NULL, 10);
  621. mutex_lock(&data->update_lock);
  622. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  623. f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
  624. mutex_unlock(&data->update_lock);
  625. return count;
  626. }
  627. static ssize_t show_pwm_auto_point_temp(struct device *dev,
  628. struct device_attribute *devattr,
  629. char* buf)
  630. {
  631. struct f71805f_data *data = dev_get_drvdata(dev);
  632. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  633. int pwmnr = attr->nr;
  634. int apnr = attr->index;
  635. return sprintf(buf, "%ld\n",
  636. temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
  637. }
  638. static ssize_t set_pwm_auto_point_temp(struct device *dev,
  639. struct device_attribute *devattr,
  640. const char* buf, size_t count)
  641. {
  642. struct f71805f_data *data = dev_get_drvdata(dev);
  643. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  644. int pwmnr = attr->nr;
  645. int apnr = attr->index;
  646. unsigned long val = simple_strtol(buf, NULL, 10);
  647. mutex_lock(&data->update_lock);
  648. data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
  649. f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
  650. data->auto_points[pwmnr].temp[apnr]);
  651. mutex_unlock(&data->update_lock);
  652. return count;
  653. }
  654. static ssize_t show_pwm_auto_point_fan(struct device *dev,
  655. struct device_attribute *devattr,
  656. char* buf)
  657. {
  658. struct f71805f_data *data = dev_get_drvdata(dev);
  659. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  660. int pwmnr = attr->nr;
  661. int apnr = attr->index;
  662. return sprintf(buf, "%ld\n",
  663. fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
  664. }
  665. static ssize_t set_pwm_auto_point_fan(struct device *dev,
  666. struct device_attribute *devattr,
  667. const char* buf, size_t count)
  668. {
  669. struct f71805f_data *data = dev_get_drvdata(dev);
  670. struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
  671. int pwmnr = attr->nr;
  672. int apnr = attr->index;
  673. unsigned long val = simple_strtoul(buf, NULL, 10);
  674. mutex_lock(&data->update_lock);
  675. data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
  676. f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
  677. data->auto_points[pwmnr].fan[apnr]);
  678. mutex_unlock(&data->update_lock);
  679. return count;
  680. }
  681. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  682. char *buf)
  683. {
  684. struct f71805f_data *data = f71805f_update_device(dev);
  685. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  686. int nr = attr->index;
  687. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  688. }
  689. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  690. *devattr, char *buf)
  691. {
  692. struct f71805f_data *data = f71805f_update_device(dev);
  693. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  694. int nr = attr->index;
  695. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  696. }
  697. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  698. *devattr, char *buf)
  699. {
  700. struct f71805f_data *data = f71805f_update_device(dev);
  701. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  702. int nr = attr->index;
  703. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  704. }
  705. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  706. *devattr, char *buf)
  707. {
  708. struct f71805f_data *data = f71805f_update_device(dev);
  709. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  710. int nr = attr->index;
  711. /* 3 is diode, 4 is thermistor */
  712. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  713. }
  714. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  715. *devattr, const char *buf, size_t count)
  716. {
  717. struct f71805f_data *data = dev_get_drvdata(dev);
  718. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  719. int nr = attr->index;
  720. long val = simple_strtol(buf, NULL, 10);
  721. mutex_lock(&data->update_lock);
  722. data->temp_high[nr] = temp_to_reg(val);
  723. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  724. mutex_unlock(&data->update_lock);
  725. return count;
  726. }
  727. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  728. *devattr, const char *buf, size_t count)
  729. {
  730. struct f71805f_data *data = dev_get_drvdata(dev);
  731. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  732. int nr = attr->index;
  733. long val = simple_strtol(buf, NULL, 10);
  734. mutex_lock(&data->update_lock);
  735. data->temp_hyst[nr] = temp_to_reg(val);
  736. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  737. mutex_unlock(&data->update_lock);
  738. return count;
  739. }
  740. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  741. *devattr, char *buf)
  742. {
  743. struct f71805f_data *data = f71805f_update_device(dev);
  744. return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
  745. }
  746. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  747. *devattr, char *buf)
  748. {
  749. struct f71805f_data *data = f71805f_update_device(dev);
  750. return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
  751. }
  752. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  753. *devattr, char *buf)
  754. {
  755. struct f71805f_data *data = f71805f_update_device(dev);
  756. return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
  757. }
  758. static ssize_t show_alarm(struct device *dev, struct device_attribute
  759. *devattr, char *buf)
  760. {
  761. struct f71805f_data *data = f71805f_update_device(dev);
  762. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  763. int bitnr = attr->index;
  764. return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
  765. }
  766. static ssize_t show_name(struct device *dev, struct device_attribute
  767. *devattr, char *buf)
  768. {
  769. struct f71805f_data *data = dev_get_drvdata(dev);
  770. return sprintf(buf, "%s\n", data->name);
  771. }
  772. static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
  773. static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR,
  774. show_in0_max, set_in0_max, 0);
  775. static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR,
  776. show_in0_min, set_in0_min, 0);
  777. static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
  778. static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
  779. show_in_max, set_in_max, 1);
  780. static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
  781. show_in_min, set_in_min, 1);
  782. static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
  783. static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
  784. show_in_max, set_in_max, 2);
  785. static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
  786. show_in_min, set_in_min, 2);
  787. static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
  788. static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
  789. show_in_max, set_in_max, 3);
  790. static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
  791. show_in_min, set_in_min, 3);
  792. static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
  793. static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
  794. show_in_max, set_in_max, 4);
  795. static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
  796. show_in_min, set_in_min, 4);
  797. static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
  798. static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
  799. show_in_max, set_in_max, 5);
  800. static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
  801. show_in_min, set_in_min, 5);
  802. static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
  803. static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
  804. show_in_max, set_in_max, 6);
  805. static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
  806. show_in_min, set_in_min, 6);
  807. static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
  808. static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
  809. show_in_max, set_in_max, 7);
  810. static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
  811. show_in_min, set_in_min, 7);
  812. static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
  813. static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
  814. show_in_max, set_in_max, 8);
  815. static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
  816. show_in_min, set_in_min, 8);
  817. static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
  818. static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
  819. show_in0_max, set_in0_max, 9);
  820. static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
  821. show_in0_min, set_in0_min, 9);
  822. static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
  823. static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
  824. show_in0_max, set_in0_max, 10);
  825. static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
  826. show_in0_min, set_in0_min, 10);
  827. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  828. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  829. show_fan_min, set_fan_min, 0);
  830. static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
  831. show_fan_target, set_fan_target, 0);
  832. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  833. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  834. show_fan_min, set_fan_min, 1);
  835. static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
  836. show_fan_target, set_fan_target, 1);
  837. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  838. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  839. show_fan_min, set_fan_min, 2);
  840. static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
  841. show_fan_target, set_fan_target, 2);
  842. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
  843. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  844. show_temp_max, set_temp_max, 0);
  845. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  846. show_temp_hyst, set_temp_hyst, 0);
  847. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  848. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
  849. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  850. show_temp_max, set_temp_max, 1);
  851. static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  852. show_temp_hyst, set_temp_hyst, 1);
  853. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  854. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
  855. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  856. show_temp_max, set_temp_max, 2);
  857. static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  858. show_temp_hyst, set_temp_hyst, 2);
  859. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  860. /* pwm (value) files are created read-only, write permission is
  861. then added or removed dynamically as needed */
  862. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
  863. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
  864. show_pwm_enable, set_pwm_enable, 0);
  865. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
  866. show_pwm_freq, set_pwm_freq, 0);
  867. static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
  868. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
  869. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  870. show_pwm_enable, set_pwm_enable, 1);
  871. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
  872. show_pwm_freq, set_pwm_freq, 1);
  873. static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
  874. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
  875. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
  876. show_pwm_enable, set_pwm_enable, 2);
  877. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
  878. show_pwm_freq, set_pwm_freq, 2);
  879. static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
  880. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
  881. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  882. 0, 0);
  883. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
  884. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  885. 0, 0);
  886. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
  887. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  888. 0, 1);
  889. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
  890. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  891. 0, 1);
  892. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
  893. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  894. 0, 2);
  895. static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
  896. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  897. 0, 2);
  898. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
  899. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  900. 1, 0);
  901. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
  902. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  903. 1, 0);
  904. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
  905. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  906. 1, 1);
  907. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
  908. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  909. 1, 1);
  910. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
  911. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  912. 1, 2);
  913. static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
  914. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  915. 1, 2);
  916. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
  917. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  918. 2, 0);
  919. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
  920. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  921. 2, 0);
  922. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
  923. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  924. 2, 1);
  925. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
  926. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  927. 2, 1);
  928. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
  929. show_pwm_auto_point_temp, set_pwm_auto_point_temp,
  930. 2, 2);
  931. static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
  932. show_pwm_auto_point_fan, set_pwm_auto_point_fan,
  933. 2, 2);
  934. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  935. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  936. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  937. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  938. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
  939. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
  940. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
  941. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
  942. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
  943. static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
  944. static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
  945. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
  946. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
  947. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  948. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
  949. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
  950. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
  951. static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
  952. static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
  953. static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
  954. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  955. static struct attribute *f71805f_attributes[] = {
  956. &sensor_dev_attr_in0_input.dev_attr.attr,
  957. &sensor_dev_attr_in0_max.dev_attr.attr,
  958. &sensor_dev_attr_in0_min.dev_attr.attr,
  959. &sensor_dev_attr_in1_input.dev_attr.attr,
  960. &sensor_dev_attr_in1_max.dev_attr.attr,
  961. &sensor_dev_attr_in1_min.dev_attr.attr,
  962. &sensor_dev_attr_in2_input.dev_attr.attr,
  963. &sensor_dev_attr_in2_max.dev_attr.attr,
  964. &sensor_dev_attr_in2_min.dev_attr.attr,
  965. &sensor_dev_attr_in3_input.dev_attr.attr,
  966. &sensor_dev_attr_in3_max.dev_attr.attr,
  967. &sensor_dev_attr_in3_min.dev_attr.attr,
  968. &sensor_dev_attr_in5_input.dev_attr.attr,
  969. &sensor_dev_attr_in5_max.dev_attr.attr,
  970. &sensor_dev_attr_in5_min.dev_attr.attr,
  971. &sensor_dev_attr_in6_input.dev_attr.attr,
  972. &sensor_dev_attr_in6_max.dev_attr.attr,
  973. &sensor_dev_attr_in6_min.dev_attr.attr,
  974. &sensor_dev_attr_in7_input.dev_attr.attr,
  975. &sensor_dev_attr_in7_max.dev_attr.attr,
  976. &sensor_dev_attr_in7_min.dev_attr.attr,
  977. &sensor_dev_attr_fan1_input.dev_attr.attr,
  978. &sensor_dev_attr_fan1_min.dev_attr.attr,
  979. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  980. &sensor_dev_attr_fan1_target.dev_attr.attr,
  981. &sensor_dev_attr_fan2_input.dev_attr.attr,
  982. &sensor_dev_attr_fan2_min.dev_attr.attr,
  983. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  984. &sensor_dev_attr_fan2_target.dev_attr.attr,
  985. &sensor_dev_attr_fan3_input.dev_attr.attr,
  986. &sensor_dev_attr_fan3_min.dev_attr.attr,
  987. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  988. &sensor_dev_attr_fan3_target.dev_attr.attr,
  989. &sensor_dev_attr_pwm1.dev_attr.attr,
  990. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  991. &sensor_dev_attr_pwm1_mode.dev_attr.attr,
  992. &sensor_dev_attr_pwm2.dev_attr.attr,
  993. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  994. &sensor_dev_attr_pwm2_mode.dev_attr.attr,
  995. &sensor_dev_attr_pwm3.dev_attr.attr,
  996. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  997. &sensor_dev_attr_pwm3_mode.dev_attr.attr,
  998. &sensor_dev_attr_temp1_input.dev_attr.attr,
  999. &sensor_dev_attr_temp1_max.dev_attr.attr,
  1000. &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
  1001. &sensor_dev_attr_temp1_type.dev_attr.attr,
  1002. &sensor_dev_attr_temp2_input.dev_attr.attr,
  1003. &sensor_dev_attr_temp2_max.dev_attr.attr,
  1004. &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
  1005. &sensor_dev_attr_temp2_type.dev_attr.attr,
  1006. &sensor_dev_attr_temp3_input.dev_attr.attr,
  1007. &sensor_dev_attr_temp3_max.dev_attr.attr,
  1008. &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
  1009. &sensor_dev_attr_temp3_type.dev_attr.attr,
  1010. &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
  1011. &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
  1012. &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
  1013. &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
  1014. &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
  1015. &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
  1016. &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
  1017. &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
  1018. &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
  1019. &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
  1020. &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
  1021. &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
  1022. &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
  1023. &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
  1024. &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
  1025. &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
  1026. &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
  1027. &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
  1028. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  1029. &sensor_dev_attr_in1_alarm.dev_attr.attr,
  1030. &sensor_dev_attr_in2_alarm.dev_attr.attr,
  1031. &sensor_dev_attr_in3_alarm.dev_attr.attr,
  1032. &sensor_dev_attr_in5_alarm.dev_attr.attr,
  1033. &sensor_dev_attr_in6_alarm.dev_attr.attr,
  1034. &sensor_dev_attr_in7_alarm.dev_attr.attr,
  1035. &dev_attr_alarms_in.attr,
  1036. &sensor_dev_attr_temp1_alarm.dev_attr.attr,
  1037. &sensor_dev_attr_temp2_alarm.dev_attr.attr,
  1038. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  1039. &dev_attr_alarms_temp.attr,
  1040. &dev_attr_alarms_fan.attr,
  1041. &dev_attr_name.attr,
  1042. NULL
  1043. };
  1044. static const struct attribute_group f71805f_group = {
  1045. .attrs = f71805f_attributes,
  1046. };
  1047. static struct attribute *f71805f_attributes_optin[4][5] = {
  1048. {
  1049. &sensor_dev_attr_in4_input.dev_attr.attr,
  1050. &sensor_dev_attr_in4_max.dev_attr.attr,
  1051. &sensor_dev_attr_in4_min.dev_attr.attr,
  1052. &sensor_dev_attr_in4_alarm.dev_attr.attr,
  1053. NULL
  1054. }, {
  1055. &sensor_dev_attr_in8_input.dev_attr.attr,
  1056. &sensor_dev_attr_in8_max.dev_attr.attr,
  1057. &sensor_dev_attr_in8_min.dev_attr.attr,
  1058. &sensor_dev_attr_in8_alarm.dev_attr.attr,
  1059. NULL
  1060. }, {
  1061. &sensor_dev_attr_in9_input.dev_attr.attr,
  1062. &sensor_dev_attr_in9_max.dev_attr.attr,
  1063. &sensor_dev_attr_in9_min.dev_attr.attr,
  1064. &sensor_dev_attr_in9_alarm.dev_attr.attr,
  1065. NULL
  1066. }, {
  1067. &sensor_dev_attr_in10_input.dev_attr.attr,
  1068. &sensor_dev_attr_in10_max.dev_attr.attr,
  1069. &sensor_dev_attr_in10_min.dev_attr.attr,
  1070. &sensor_dev_attr_in10_alarm.dev_attr.attr,
  1071. NULL
  1072. }
  1073. };
  1074. static const struct attribute_group f71805f_group_optin[4] = {
  1075. { .attrs = f71805f_attributes_optin[0] },
  1076. { .attrs = f71805f_attributes_optin[1] },
  1077. { .attrs = f71805f_attributes_optin[2] },
  1078. { .attrs = f71805f_attributes_optin[3] },
  1079. };
  1080. /* We don't include pwm_freq files in the arrays above, because they must be
  1081. created conditionally (only if pwm_mode is 1 == PWM) */
  1082. static struct attribute *f71805f_attributes_pwm_freq[] = {
  1083. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  1084. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  1085. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  1086. NULL
  1087. };
  1088. static const struct attribute_group f71805f_group_pwm_freq = {
  1089. .attrs = f71805f_attributes_pwm_freq,
  1090. };
  1091. /* We also need an indexed access to pwmN files to toggle writability */
  1092. static struct attribute *f71805f_attr_pwm[] = {
  1093. &sensor_dev_attr_pwm1.dev_attr.attr,
  1094. &sensor_dev_attr_pwm2.dev_attr.attr,
  1095. &sensor_dev_attr_pwm3.dev_attr.attr,
  1096. };
  1097. /*
  1098. * Device registration and initialization
  1099. */
  1100. static void __devinit f71805f_init_device(struct f71805f_data *data)
  1101. {
  1102. u8 reg;
  1103. int i;
  1104. reg = f71805f_read8(data, F71805F_REG_START);
  1105. if ((reg & 0x41) != 0x01) {
  1106. printk(KERN_DEBUG DRVNAME ": Starting monitoring "
  1107. "operations\n");
  1108. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  1109. }
  1110. /* Fan monitoring can be disabled. If it is, we won't be polling
  1111. the register values, and won't create the related sysfs files. */
  1112. for (i = 0; i < 3; i++) {
  1113. data->fan_ctrl[i] = f71805f_read8(data,
  1114. F71805F_REG_FAN_CTRL(i));
  1115. /* Clear latch full bit, else "speed mode" fan speed control
  1116. doesn't work */
  1117. if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
  1118. data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
  1119. f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
  1120. data->fan_ctrl[i]);
  1121. }
  1122. }
  1123. }
  1124. static int __devinit f71805f_probe(struct platform_device *pdev)
  1125. {
  1126. struct f71805f_sio_data *sio_data = pdev->dev.platform_data;
  1127. struct f71805f_data *data;
  1128. struct resource *res;
  1129. int i, err;
  1130. static const char *names[] = {
  1131. "f71805f",
  1132. "f71872f",
  1133. };
  1134. if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
  1135. err = -ENOMEM;
  1136. printk(KERN_ERR DRVNAME ": Out of memory\n");
  1137. goto exit;
  1138. }
  1139. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1140. if (!request_region(res->start + ADDR_REG_OFFSET, 2, DRVNAME)) {
  1141. err = -EBUSY;
  1142. dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
  1143. (unsigned long)(res->start + ADDR_REG_OFFSET),
  1144. (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
  1145. goto exit_free;
  1146. }
  1147. data->addr = res->start;
  1148. data->name = names[sio_data->kind];
  1149. mutex_init(&data->update_lock);
  1150. platform_set_drvdata(pdev, data);
  1151. /* Some voltage inputs depend on chip model and configuration */
  1152. switch (sio_data->kind) {
  1153. case f71805f:
  1154. data->has_in = 0x1ff;
  1155. break;
  1156. case f71872f:
  1157. data->has_in = 0x6ef;
  1158. if (sio_data->fnsel1 & 0x01)
  1159. data->has_in |= (1 << 4); /* in4 */
  1160. if (sio_data->fnsel1 & 0x02)
  1161. data->has_in |= (1 << 8); /* in8 */
  1162. break;
  1163. }
  1164. /* Initialize the F71805F chip */
  1165. f71805f_init_device(data);
  1166. /* Register sysfs interface files */
  1167. if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
  1168. goto exit_release_region;
  1169. if (data->has_in & (1 << 4)) { /* in4 */
  1170. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1171. &f71805f_group_optin[0])))
  1172. goto exit_remove_files;
  1173. }
  1174. if (data->has_in & (1 << 8)) { /* in8 */
  1175. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1176. &f71805f_group_optin[1])))
  1177. goto exit_remove_files;
  1178. }
  1179. if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
  1180. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1181. &f71805f_group_optin[2])))
  1182. goto exit_remove_files;
  1183. }
  1184. if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
  1185. if ((err = sysfs_create_group(&pdev->dev.kobj,
  1186. &f71805f_group_optin[3])))
  1187. goto exit_remove_files;
  1188. }
  1189. for (i = 0; i < 3; i++) {
  1190. /* If control mode is PWM, create pwm_freq file */
  1191. if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
  1192. if ((err = sysfs_create_file(&pdev->dev.kobj,
  1193. f71805f_attributes_pwm_freq[i])))
  1194. goto exit_remove_files;
  1195. }
  1196. /* If PWM is in manual mode, add write permission */
  1197. if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
  1198. if ((err = sysfs_chmod_file(&pdev->dev.kobj,
  1199. f71805f_attr_pwm[i],
  1200. S_IRUGO | S_IWUSR))) {
  1201. dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
  1202. i + 1);
  1203. goto exit_remove_files;
  1204. }
  1205. }
  1206. }
  1207. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1208. if (IS_ERR(data->hwmon_dev)) {
  1209. err = PTR_ERR(data->hwmon_dev);
  1210. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  1211. goto exit_remove_files;
  1212. }
  1213. return 0;
  1214. exit_remove_files:
  1215. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1216. for (i = 0; i < 4; i++)
  1217. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1218. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1219. exit_release_region:
  1220. release_region(res->start + ADDR_REG_OFFSET, 2);
  1221. exit_free:
  1222. platform_set_drvdata(pdev, NULL);
  1223. kfree(data);
  1224. exit:
  1225. return err;
  1226. }
  1227. static int __devexit f71805f_remove(struct platform_device *pdev)
  1228. {
  1229. struct f71805f_data *data = platform_get_drvdata(pdev);
  1230. struct resource *res;
  1231. int i;
  1232. hwmon_device_unregister(data->hwmon_dev);
  1233. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
  1234. for (i = 0; i < 4; i++)
  1235. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
  1236. sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
  1237. platform_set_drvdata(pdev, NULL);
  1238. kfree(data);
  1239. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1240. release_region(res->start + ADDR_REG_OFFSET, 2);
  1241. return 0;
  1242. }
  1243. static struct platform_driver f71805f_driver = {
  1244. .driver = {
  1245. .owner = THIS_MODULE,
  1246. .name = DRVNAME,
  1247. },
  1248. .probe = f71805f_probe,
  1249. .remove = __devexit_p(f71805f_remove),
  1250. };
  1251. static int __init f71805f_device_add(unsigned short address,
  1252. const struct f71805f_sio_data *sio_data)
  1253. {
  1254. struct resource res = {
  1255. .start = address,
  1256. .end = address + REGION_LENGTH - 1,
  1257. .flags = IORESOURCE_IO,
  1258. };
  1259. int err;
  1260. pdev = platform_device_alloc(DRVNAME, address);
  1261. if (!pdev) {
  1262. err = -ENOMEM;
  1263. printk(KERN_ERR DRVNAME ": Device allocation failed\n");
  1264. goto exit;
  1265. }
  1266. res.name = pdev->name;
  1267. err = platform_device_add_resources(pdev, &res, 1);
  1268. if (err) {
  1269. printk(KERN_ERR DRVNAME ": Device resource addition failed "
  1270. "(%d)\n", err);
  1271. goto exit_device_put;
  1272. }
  1273. err = platform_device_add_data(pdev, sio_data,
  1274. sizeof(struct f71805f_sio_data));
  1275. if (err) {
  1276. printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
  1277. goto exit_device_put;
  1278. }
  1279. err = platform_device_add(pdev);
  1280. if (err) {
  1281. printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
  1282. err);
  1283. goto exit_device_put;
  1284. }
  1285. return 0;
  1286. exit_device_put:
  1287. platform_device_put(pdev);
  1288. exit:
  1289. return err;
  1290. }
  1291. static int __init f71805f_find(int sioaddr, unsigned short *address,
  1292. struct f71805f_sio_data *sio_data)
  1293. {
  1294. int err = -ENODEV;
  1295. u16 devid;
  1296. static const char *names[] = {
  1297. "F71805F/FG",
  1298. "F71872F/FG or F71806F/FG",
  1299. };
  1300. superio_enter(sioaddr);
  1301. devid = superio_inw(sioaddr, SIO_REG_MANID);
  1302. if (devid != SIO_FINTEK_ID)
  1303. goto exit;
  1304. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  1305. switch (devid) {
  1306. case SIO_F71805F_ID:
  1307. sio_data->kind = f71805f;
  1308. break;
  1309. case SIO_F71872F_ID:
  1310. sio_data->kind = f71872f;
  1311. sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
  1312. break;
  1313. default:
  1314. printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
  1315. "skipping\n");
  1316. goto exit;
  1317. }
  1318. superio_select(sioaddr, F71805F_LD_HWM);
  1319. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  1320. printk(KERN_WARNING DRVNAME ": Device not activated, "
  1321. "skipping\n");
  1322. goto exit;
  1323. }
  1324. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  1325. if (*address == 0) {
  1326. printk(KERN_WARNING DRVNAME ": Base address not set, "
  1327. "skipping\n");
  1328. goto exit;
  1329. }
  1330. *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
  1331. err = 0;
  1332. printk(KERN_INFO DRVNAME ": Found %s chip at %#x, revision %u\n",
  1333. names[sio_data->kind], *address,
  1334. superio_inb(sioaddr, SIO_REG_DEVREV));
  1335. exit:
  1336. superio_exit(sioaddr);
  1337. return err;
  1338. }
  1339. static int __init f71805f_init(void)
  1340. {
  1341. int err;
  1342. unsigned short address;
  1343. struct f71805f_sio_data sio_data;
  1344. if (f71805f_find(0x2e, &address, &sio_data)
  1345. && f71805f_find(0x4e, &address, &sio_data))
  1346. return -ENODEV;
  1347. err = platform_driver_register(&f71805f_driver);
  1348. if (err)
  1349. goto exit;
  1350. /* Sets global pdev as a side effect */
  1351. err = f71805f_device_add(address, &sio_data);
  1352. if (err)
  1353. goto exit_driver;
  1354. return 0;
  1355. exit_driver:
  1356. platform_driver_unregister(&f71805f_driver);
  1357. exit:
  1358. return err;
  1359. }
  1360. static void __exit f71805f_exit(void)
  1361. {
  1362. platform_device_unregister(pdev);
  1363. platform_driver_unregister(&f71805f_driver);
  1364. }
  1365. MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
  1366. MODULE_LICENSE("GPL");
  1367. MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
  1368. module_init(f71805f_init);
  1369. module_exit(f71805f_exit);