i915_irq.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623
  1. /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
  2. */
  3. /*
  4. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the
  9. * "Software"), to deal in the Software without restriction, including
  10. * without limitation the rights to use, copy, modify, merge, publish,
  11. * distribute, sub license, and/or sell copies of the Software, and to
  12. * permit persons to whom the Software is furnished to do so, subject to
  13. * the following conditions:
  14. *
  15. * The above copyright notice and this permission notice (including the
  16. * next paragraph) shall be included in all copies or substantial portions
  17. * of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26. *
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "i915_drm.h"
  31. #include "i915_drv.h"
  32. #define USER_INT_FLAG (1<<1)
  33. #define VSYNC_PIPEB_FLAG (1<<5)
  34. #define VSYNC_PIPEA_FLAG (1<<7)
  35. #define MAX_NOPID ((u32)~0)
  36. /**
  37. * Emit blits for scheduled buffer swaps.
  38. *
  39. * This function will be called with the HW lock held.
  40. */
  41. static void i915_vblank_tasklet(struct drm_device *dev)
  42. {
  43. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  44. unsigned long irqflags;
  45. struct list_head *list, *tmp, hits, *hit;
  46. int nhits, nrects, slice[2], upper[2], lower[2], i;
  47. unsigned counter[2] = { atomic_read(&dev->vbl_received),
  48. atomic_read(&dev->vbl_received2) };
  49. struct drm_drawable_info *drw;
  50. drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
  51. u32 cpp = dev_priv->cpp;
  52. u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
  53. XY_SRC_COPY_BLT_WRITE_ALPHA |
  54. XY_SRC_COPY_BLT_WRITE_RGB)
  55. : XY_SRC_COPY_BLT_CMD;
  56. u32 src_pitch = sarea_priv->pitch * cpp;
  57. u32 dst_pitch = sarea_priv->pitch * cpp;
  58. u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24);
  59. RING_LOCALS;
  60. if (IS_I965G(dev) && sarea_priv->front_tiled) {
  61. cmd |= XY_SRC_COPY_BLT_DST_TILED;
  62. dst_pitch >>= 2;
  63. }
  64. if (IS_I965G(dev) && sarea_priv->back_tiled) {
  65. cmd |= XY_SRC_COPY_BLT_SRC_TILED;
  66. src_pitch >>= 2;
  67. }
  68. DRM_DEBUG("\n");
  69. INIT_LIST_HEAD(&hits);
  70. nhits = nrects = 0;
  71. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  72. /* Find buffer swaps scheduled for this vertical blank */
  73. list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
  74. drm_i915_vbl_swap_t *vbl_swap =
  75. list_entry(list, drm_i915_vbl_swap_t, head);
  76. if ((counter[vbl_swap->pipe] - vbl_swap->sequence) > (1<<23))
  77. continue;
  78. list_del(list);
  79. dev_priv->swaps_pending--;
  80. spin_unlock(&dev_priv->swaps_lock);
  81. spin_lock(&dev->drw_lock);
  82. drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
  83. if (!drw) {
  84. spin_unlock(&dev->drw_lock);
  85. drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
  86. spin_lock(&dev_priv->swaps_lock);
  87. continue;
  88. }
  89. list_for_each(hit, &hits) {
  90. drm_i915_vbl_swap_t *swap_cmp =
  91. list_entry(hit, drm_i915_vbl_swap_t, head);
  92. struct drm_drawable_info *drw_cmp =
  93. drm_get_drawable_info(dev, swap_cmp->drw_id);
  94. if (drw_cmp &&
  95. drw_cmp->rects[0].y1 > drw->rects[0].y1) {
  96. list_add_tail(list, hit);
  97. break;
  98. }
  99. }
  100. spin_unlock(&dev->drw_lock);
  101. /* List of hits was empty, or we reached the end of it */
  102. if (hit == &hits)
  103. list_add_tail(list, hits.prev);
  104. nhits++;
  105. spin_lock(&dev_priv->swaps_lock);
  106. }
  107. if (nhits == 0) {
  108. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  109. return;
  110. }
  111. spin_unlock(&dev_priv->swaps_lock);
  112. i915_kernel_lost_context(dev);
  113. if (IS_I965G(dev)) {
  114. BEGIN_LP_RING(4);
  115. OUT_RING(GFX_OP_DRAWRECT_INFO_I965);
  116. OUT_RING(0);
  117. OUT_RING(((sarea_priv->width - 1) & 0xffff) | ((sarea_priv->height - 1) << 16));
  118. OUT_RING(0);
  119. ADVANCE_LP_RING();
  120. } else {
  121. BEGIN_LP_RING(6);
  122. OUT_RING(GFX_OP_DRAWRECT_INFO);
  123. OUT_RING(0);
  124. OUT_RING(0);
  125. OUT_RING(sarea_priv->width | sarea_priv->height << 16);
  126. OUT_RING(sarea_priv->width | sarea_priv->height << 16);
  127. OUT_RING(0);
  128. ADVANCE_LP_RING();
  129. }
  130. sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
  131. upper[0] = upper[1] = 0;
  132. slice[0] = max(sarea_priv->pipeA_h / nhits, 1);
  133. slice[1] = max(sarea_priv->pipeB_h / nhits, 1);
  134. lower[0] = sarea_priv->pipeA_y + slice[0];
  135. lower[1] = sarea_priv->pipeB_y + slice[0];
  136. spin_lock(&dev->drw_lock);
  137. /* Emit blits for buffer swaps, partitioning both outputs into as many
  138. * slices as there are buffer swaps scheduled in order to avoid tearing
  139. * (based on the assumption that a single buffer swap would always
  140. * complete before scanout starts).
  141. */
  142. for (i = 0; i++ < nhits;
  143. upper[0] = lower[0], lower[0] += slice[0],
  144. upper[1] = lower[1], lower[1] += slice[1]) {
  145. if (i == nhits)
  146. lower[0] = lower[1] = sarea_priv->height;
  147. list_for_each(hit, &hits) {
  148. drm_i915_vbl_swap_t *swap_hit =
  149. list_entry(hit, drm_i915_vbl_swap_t, head);
  150. struct drm_clip_rect *rect;
  151. int num_rects, pipe;
  152. unsigned short top, bottom;
  153. drw = drm_get_drawable_info(dev, swap_hit->drw_id);
  154. if (!drw)
  155. continue;
  156. rect = drw->rects;
  157. pipe = swap_hit->pipe;
  158. top = upper[pipe];
  159. bottom = lower[pipe];
  160. for (num_rects = drw->num_rects; num_rects--; rect++) {
  161. int y1 = max(rect->y1, top);
  162. int y2 = min(rect->y2, bottom);
  163. if (y1 >= y2)
  164. continue;
  165. BEGIN_LP_RING(8);
  166. OUT_RING(cmd);
  167. OUT_RING(ropcpp | dst_pitch);
  168. OUT_RING((y1 << 16) | rect->x1);
  169. OUT_RING((y2 << 16) | rect->x2);
  170. OUT_RING(sarea_priv->front_offset);
  171. OUT_RING((y1 << 16) | rect->x1);
  172. OUT_RING(src_pitch);
  173. OUT_RING(sarea_priv->back_offset);
  174. ADVANCE_LP_RING();
  175. }
  176. }
  177. }
  178. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  179. list_for_each_safe(hit, tmp, &hits) {
  180. drm_i915_vbl_swap_t *swap_hit =
  181. list_entry(hit, drm_i915_vbl_swap_t, head);
  182. list_del(hit);
  183. drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
  184. }
  185. }
  186. irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
  187. {
  188. struct drm_device *dev = (struct drm_device *) arg;
  189. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  190. u16 temp;
  191. u32 pipea_stats, pipeb_stats;
  192. pipea_stats = I915_READ(I915REG_PIPEASTAT);
  193. pipeb_stats = I915_READ(I915REG_PIPEBSTAT);
  194. temp = I915_READ16(I915REG_INT_IDENTITY_R);
  195. temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG);
  196. DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
  197. if (temp == 0)
  198. return IRQ_NONE;
  199. I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
  200. (void) I915_READ16(I915REG_INT_IDENTITY_R);
  201. DRM_READMEMORYBARRIER();
  202. dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
  203. if (temp & USER_INT_FLAG)
  204. DRM_WAKEUP(&dev_priv->irq_queue);
  205. if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
  206. int vblank_pipe = dev_priv->vblank_pipe;
  207. if ((vblank_pipe &
  208. (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B))
  209. == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) {
  210. if (temp & VSYNC_PIPEA_FLAG)
  211. atomic_inc(&dev->vbl_received);
  212. if (temp & VSYNC_PIPEB_FLAG)
  213. atomic_inc(&dev->vbl_received2);
  214. } else if (((temp & VSYNC_PIPEA_FLAG) &&
  215. (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) ||
  216. ((temp & VSYNC_PIPEB_FLAG) &&
  217. (vblank_pipe & DRM_I915_VBLANK_PIPE_B)))
  218. atomic_inc(&dev->vbl_received);
  219. DRM_WAKEUP(&dev->vbl_queue);
  220. drm_vbl_send_signals(dev);
  221. if (dev_priv->swaps_pending > 0)
  222. drm_locked_tasklet(dev, i915_vblank_tasklet);
  223. I915_WRITE(I915REG_PIPEASTAT,
  224. pipea_stats|I915_VBLANK_INTERRUPT_ENABLE|
  225. I915_VBLANK_CLEAR);
  226. I915_WRITE(I915REG_PIPEBSTAT,
  227. pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE|
  228. I915_VBLANK_CLEAR);
  229. }
  230. return IRQ_HANDLED;
  231. }
  232. static int i915_emit_irq(struct drm_device * dev)
  233. {
  234. drm_i915_private_t *dev_priv = dev->dev_private;
  235. RING_LOCALS;
  236. i915_kernel_lost_context(dev);
  237. DRM_DEBUG("\n");
  238. dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
  239. if (dev_priv->counter > 0x7FFFFFFFUL)
  240. dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
  241. BEGIN_LP_RING(6);
  242. OUT_RING(CMD_STORE_DWORD_IDX);
  243. OUT_RING(20);
  244. OUT_RING(dev_priv->counter);
  245. OUT_RING(0);
  246. OUT_RING(0);
  247. OUT_RING(GFX_OP_USER_INTERRUPT);
  248. ADVANCE_LP_RING();
  249. return dev_priv->counter;
  250. }
  251. static int i915_wait_irq(struct drm_device * dev, int irq_nr)
  252. {
  253. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  254. int ret = 0;
  255. DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr,
  256. READ_BREADCRUMB(dev_priv));
  257. if (READ_BREADCRUMB(dev_priv) >= irq_nr)
  258. return 0;
  259. dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  260. DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
  261. READ_BREADCRUMB(dev_priv) >= irq_nr);
  262. if (ret == -EBUSY) {
  263. DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
  264. READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
  265. }
  266. dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
  267. return ret;
  268. }
  269. static int i915_driver_vblank_do_wait(struct drm_device *dev, unsigned int *sequence,
  270. atomic_t *counter)
  271. {
  272. drm_i915_private_t *dev_priv = dev->dev_private;
  273. unsigned int cur_vblank;
  274. int ret = 0;
  275. if (!dev_priv) {
  276. DRM_ERROR("called with no initialization\n");
  277. return -EINVAL;
  278. }
  279. DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
  280. (((cur_vblank = atomic_read(counter))
  281. - *sequence) <= (1<<23)));
  282. *sequence = cur_vblank;
  283. return ret;
  284. }
  285. int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence)
  286. {
  287. return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received);
  288. }
  289. int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence)
  290. {
  291. return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2);
  292. }
  293. /* Needs the lock as it touches the ring.
  294. */
  295. int i915_irq_emit(struct drm_device *dev, void *data,
  296. struct drm_file *file_priv)
  297. {
  298. drm_i915_private_t *dev_priv = dev->dev_private;
  299. drm_i915_irq_emit_t *emit = data;
  300. int result;
  301. LOCK_TEST_WITH_RETURN(dev, file_priv);
  302. if (!dev_priv) {
  303. DRM_ERROR("called with no initialization\n");
  304. return -EINVAL;
  305. }
  306. result = i915_emit_irq(dev);
  307. if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
  308. DRM_ERROR("copy_to_user\n");
  309. return -EFAULT;
  310. }
  311. return 0;
  312. }
  313. /* Doesn't need the hardware lock.
  314. */
  315. int i915_irq_wait(struct drm_device *dev, void *data,
  316. struct drm_file *file_priv)
  317. {
  318. drm_i915_private_t *dev_priv = dev->dev_private;
  319. drm_i915_irq_wait_t *irqwait = data;
  320. if (!dev_priv) {
  321. DRM_ERROR("called with no initialization\n");
  322. return -EINVAL;
  323. }
  324. return i915_wait_irq(dev, irqwait->irq_seq);
  325. }
  326. static void i915_enable_interrupt (struct drm_device *dev)
  327. {
  328. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  329. u16 flag;
  330. flag = 0;
  331. if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
  332. flag |= VSYNC_PIPEA_FLAG;
  333. if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
  334. flag |= VSYNC_PIPEB_FLAG;
  335. I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag);
  336. }
  337. /* Set the vblank monitor pipe
  338. */
  339. int i915_vblank_pipe_set(struct drm_device *dev, void *data,
  340. struct drm_file *file_priv)
  341. {
  342. drm_i915_private_t *dev_priv = dev->dev_private;
  343. drm_i915_vblank_pipe_t *pipe = data;
  344. if (!dev_priv) {
  345. DRM_ERROR("called with no initialization\n");
  346. return -EINVAL;
  347. }
  348. if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
  349. DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe);
  350. return -EINVAL;
  351. }
  352. dev_priv->vblank_pipe = pipe->pipe;
  353. i915_enable_interrupt (dev);
  354. return 0;
  355. }
  356. int i915_vblank_pipe_get(struct drm_device *dev, void *data,
  357. struct drm_file *file_priv)
  358. {
  359. drm_i915_private_t *dev_priv = dev->dev_private;
  360. drm_i915_vblank_pipe_t *pipe = data;
  361. u16 flag;
  362. if (!dev_priv) {
  363. DRM_ERROR("called with no initialization\n");
  364. return -EINVAL;
  365. }
  366. flag = I915_READ(I915REG_INT_ENABLE_R);
  367. pipe->pipe = 0;
  368. if (flag & VSYNC_PIPEA_FLAG)
  369. pipe->pipe |= DRM_I915_VBLANK_PIPE_A;
  370. if (flag & VSYNC_PIPEB_FLAG)
  371. pipe->pipe |= DRM_I915_VBLANK_PIPE_B;
  372. return 0;
  373. }
  374. /**
  375. * Schedule buffer swap at given vertical blank.
  376. */
  377. int i915_vblank_swap(struct drm_device *dev, void *data,
  378. struct drm_file *file_priv)
  379. {
  380. drm_i915_private_t *dev_priv = dev->dev_private;
  381. drm_i915_vblank_swap_t *swap = data;
  382. drm_i915_vbl_swap_t *vbl_swap;
  383. unsigned int pipe, seqtype, curseq;
  384. unsigned long irqflags;
  385. struct list_head *list;
  386. if (!dev_priv) {
  387. DRM_ERROR("%s called with no initialization\n", __func__);
  388. return -EINVAL;
  389. }
  390. if (dev_priv->sarea_priv->rotation) {
  391. DRM_DEBUG("Rotation not supported\n");
  392. return -EINVAL;
  393. }
  394. if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
  395. _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) {
  396. DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype);
  397. return -EINVAL;
  398. }
  399. pipe = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
  400. seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
  401. if (!(dev_priv->vblank_pipe & (1 << pipe))) {
  402. DRM_ERROR("Invalid pipe %d\n", pipe);
  403. return -EINVAL;
  404. }
  405. spin_lock_irqsave(&dev->drw_lock, irqflags);
  406. if (!drm_get_drawable_info(dev, swap->drawable)) {
  407. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  408. DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable);
  409. return -EINVAL;
  410. }
  411. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  412. curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received);
  413. if (seqtype == _DRM_VBLANK_RELATIVE)
  414. swap->sequence += curseq;
  415. if ((curseq - swap->sequence) <= (1<<23)) {
  416. if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) {
  417. swap->sequence = curseq + 1;
  418. } else {
  419. DRM_DEBUG("Missed target sequence\n");
  420. return -EINVAL;
  421. }
  422. }
  423. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  424. list_for_each(list, &dev_priv->vbl_swaps.head) {
  425. vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
  426. if (vbl_swap->drw_id == swap->drawable &&
  427. vbl_swap->pipe == pipe &&
  428. vbl_swap->sequence == swap->sequence) {
  429. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  430. DRM_DEBUG("Already scheduled\n");
  431. return 0;
  432. }
  433. }
  434. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  435. if (dev_priv->swaps_pending >= 100) {
  436. DRM_DEBUG("Too many swaps queued\n");
  437. return -EBUSY;
  438. }
  439. vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER);
  440. if (!vbl_swap) {
  441. DRM_ERROR("Failed to allocate memory to queue swap\n");
  442. return -ENOMEM;
  443. }
  444. DRM_DEBUG("\n");
  445. vbl_swap->drw_id = swap->drawable;
  446. vbl_swap->pipe = pipe;
  447. vbl_swap->sequence = swap->sequence;
  448. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  449. list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head);
  450. dev_priv->swaps_pending++;
  451. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  452. return 0;
  453. }
  454. /* drm_dma.h hooks
  455. */
  456. void i915_driver_irq_preinstall(struct drm_device * dev)
  457. {
  458. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  459. I915_WRITE16(I915REG_HWSTAM, 0xfffe);
  460. I915_WRITE16(I915REG_INT_MASK_R, 0x0);
  461. I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
  462. }
  463. void i915_driver_irq_postinstall(struct drm_device * dev)
  464. {
  465. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  466. spin_lock_init(&dev_priv->swaps_lock);
  467. INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
  468. dev_priv->swaps_pending = 0;
  469. if (!dev_priv->vblank_pipe)
  470. dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
  471. i915_enable_interrupt(dev);
  472. DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
  473. }
  474. void i915_driver_irq_uninstall(struct drm_device * dev)
  475. {
  476. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  477. u16 temp;
  478. if (!dev_priv)
  479. return;
  480. I915_WRITE16(I915REG_HWSTAM, 0xffff);
  481. I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
  482. I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
  483. temp = I915_READ16(I915REG_INT_IDENTITY_R);
  484. I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
  485. }