ati_pcigart.c 4.9 KB

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  1. /**
  2. * \file ati_pcigart.c
  3. * ATI PCI GART support
  4. *
  5. * \author Gareth Hughes <gareth@valinux.com>
  6. */
  7. /*
  8. * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
  9. *
  10. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  11. * All Rights Reserved.
  12. *
  13. * Permission is hereby granted, free of charge, to any person obtaining a
  14. * copy of this software and associated documentation files (the "Software"),
  15. * to deal in the Software without restriction, including without limitation
  16. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  17. * and/or sell copies of the Software, and to permit persons to whom the
  18. * Software is furnished to do so, subject to the following conditions:
  19. *
  20. * The above copyright notice and this permission notice (including the next
  21. * paragraph) shall be included in all copies or substantial portions of the
  22. * Software.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  25. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  26. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  27. * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  28. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  29. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  30. * DEALINGS IN THE SOFTWARE.
  31. */
  32. #include "drmP.h"
  33. # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
  34. static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
  35. struct drm_ati_pcigart_info *gart_info)
  36. {
  37. gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
  38. PAGE_SIZE,
  39. gart_info->table_mask);
  40. if (gart_info->table_handle == NULL)
  41. return -ENOMEM;
  42. return 0;
  43. }
  44. static void drm_ati_free_pcigart_table(struct drm_device *dev,
  45. struct drm_ati_pcigart_info *gart_info)
  46. {
  47. drm_pci_free(dev, gart_info->table_handle);
  48. gart_info->table_handle = NULL;
  49. }
  50. int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  51. {
  52. struct drm_sg_mem *entry = dev->sg;
  53. unsigned long pages;
  54. int i;
  55. int max_pages;
  56. /* we need to support large memory configurations */
  57. if (!entry) {
  58. DRM_ERROR("no scatter/gather memory!\n");
  59. return 0;
  60. }
  61. if (gart_info->bus_addr) {
  62. max_pages = (gart_info->table_size / sizeof(u32));
  63. pages = (entry->pages <= max_pages)
  64. ? entry->pages : max_pages;
  65. for (i = 0; i < pages; i++) {
  66. if (!entry->busaddr[i])
  67. break;
  68. pci_unmap_page(dev->pdev, entry->busaddr[i],
  69. PAGE_SIZE, PCI_DMA_TODEVICE);
  70. }
  71. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
  72. gart_info->bus_addr = 0;
  73. }
  74. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
  75. gart_info->table_handle) {
  76. drm_ati_free_pcigart_table(dev, gart_info);
  77. }
  78. return 1;
  79. }
  80. EXPORT_SYMBOL(drm_ati_pcigart_cleanup);
  81. int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
  82. {
  83. struct drm_sg_mem *entry = dev->sg;
  84. void *address = NULL;
  85. unsigned long pages;
  86. u32 *pci_gart, page_base;
  87. dma_addr_t bus_address = 0;
  88. int i, j, ret = 0;
  89. int max_pages;
  90. if (!entry) {
  91. DRM_ERROR("no scatter/gather memory!\n");
  92. goto done;
  93. }
  94. if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
  95. DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
  96. ret = drm_ati_alloc_pcigart_table(dev, gart_info);
  97. if (ret) {
  98. DRM_ERROR("cannot allocate PCI GART page!\n");
  99. goto done;
  100. }
  101. address = gart_info->table_handle->vaddr;
  102. bus_address = gart_info->table_handle->busaddr;
  103. } else {
  104. address = gart_info->addr;
  105. bus_address = gart_info->bus_addr;
  106. DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
  107. (unsigned long long)bus_address,
  108. (unsigned long)address);
  109. }
  110. pci_gart = (u32 *) address;
  111. max_pages = (gart_info->table_size / sizeof(u32));
  112. pages = (entry->pages <= max_pages)
  113. ? entry->pages : max_pages;
  114. memset(pci_gart, 0, max_pages * sizeof(u32));
  115. for (i = 0; i < pages; i++) {
  116. /* we need to support large memory configurations */
  117. entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
  118. 0, PAGE_SIZE, PCI_DMA_TODEVICE);
  119. if (entry->busaddr[i] == 0) {
  120. DRM_ERROR("unable to map PCIGART pages!\n");
  121. drm_ati_pcigart_cleanup(dev, gart_info);
  122. address = NULL;
  123. bus_address = 0;
  124. goto done;
  125. }
  126. page_base = (u32) entry->busaddr[i];
  127. for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
  128. switch(gart_info->gart_reg_if) {
  129. case DRM_ATI_GART_IGP:
  130. *pci_gart = cpu_to_le32((page_base) | 0xc);
  131. break;
  132. case DRM_ATI_GART_PCIE:
  133. *pci_gart = cpu_to_le32((page_base >> 8) | 0xc);
  134. break;
  135. default:
  136. case DRM_ATI_GART_PCI:
  137. *pci_gart = cpu_to_le32(page_base);
  138. break;
  139. }
  140. pci_gart++;
  141. page_base += ATI_PCIGART_PAGE_SIZE;
  142. }
  143. }
  144. ret = 1;
  145. #if defined(__i386__) || defined(__x86_64__)
  146. wbinvd();
  147. #else
  148. mb();
  149. #endif
  150. done:
  151. gart_info->addr = address;
  152. gart_info->bus_addr = bus_address;
  153. return ret;
  154. }
  155. EXPORT_SYMBOL(drm_ati_pcigart_init);