nwflash.c 14 KB

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  1. /*
  2. * Flash memory interface rev.5 driver for the Intel
  3. * Flash chips used on the NetWinder.
  4. *
  5. * 20/08/2000 RMK use __ioremap to map flash into virtual memory
  6. * make a few more places use "volatile"
  7. * 22/05/2001 RMK - Lock read against write
  8. * - merge printk level changes (with mods) from Alan Cox.
  9. * - use *ppos as the file position, not file->f_pos.
  10. * - fix check for out of range pos and r/w size
  11. *
  12. * Please note that we are tampering with the only flash chip in the
  13. * machine, which contains the bootup code. We therefore have the
  14. * power to convert these machines into doorstops...
  15. */
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/fs.h>
  19. #include <linux/errno.h>
  20. #include <linux/mm.h>
  21. #include <linux/delay.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/miscdevice.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/rwsem.h>
  26. #include <linux/init.h>
  27. #include <linux/smp_lock.h>
  28. #include <linux/mutex.h>
  29. #include <asm/hardware/dec21285.h>
  30. #include <asm/io.h>
  31. #include <asm/leds.h>
  32. #include <asm/mach-types.h>
  33. #include <asm/system.h>
  34. #include <asm/uaccess.h>
  35. /*****************************************************************************/
  36. #include <asm/nwflash.h>
  37. #define NWFLASH_VERSION "6.4"
  38. static void kick_open(void);
  39. static int get_flash_id(void);
  40. static int erase_block(int nBlock);
  41. static int write_block(unsigned long p, const char __user *buf, int count);
  42. #define KFLASH_SIZE 1024*1024 //1 Meg
  43. #define KFLASH_SIZE4 4*1024*1024 //4 Meg
  44. #define KFLASH_ID 0x89A6 //Intel flash
  45. #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
  46. static int flashdebug; //if set - we will display progress msgs
  47. static int gbWriteEnable;
  48. static int gbWriteBase64Enable;
  49. static volatile unsigned char *FLASH_BASE;
  50. static int gbFlashSize = KFLASH_SIZE;
  51. static DEFINE_MUTEX(nwflash_mutex);
  52. extern spinlock_t gpio_lock;
  53. static int get_flash_id(void)
  54. {
  55. volatile unsigned int c1, c2;
  56. /*
  57. * try to get flash chip ID
  58. */
  59. kick_open();
  60. c2 = inb(0x80);
  61. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
  62. udelay(15);
  63. c1 = *(volatile unsigned char *) FLASH_BASE;
  64. c2 = inb(0x80);
  65. /*
  66. * on 4 Meg flash the second byte is actually at offset 2...
  67. */
  68. if (c1 == 0xB0)
  69. c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
  70. else
  71. c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
  72. c2 += (c1 << 8);
  73. /*
  74. * set it back to read mode
  75. */
  76. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  77. if (c2 == KFLASH_ID4)
  78. gbFlashSize = KFLASH_SIZE4;
  79. return c2;
  80. }
  81. static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg)
  82. {
  83. switch (cmd) {
  84. case CMD_WRITE_DISABLE:
  85. gbWriteBase64Enable = 0;
  86. gbWriteEnable = 0;
  87. break;
  88. case CMD_WRITE_ENABLE:
  89. gbWriteEnable = 1;
  90. break;
  91. case CMD_WRITE_BASE64K_ENABLE:
  92. gbWriteBase64Enable = 1;
  93. break;
  94. default:
  95. gbWriteBase64Enable = 0;
  96. gbWriteEnable = 0;
  97. return -EINVAL;
  98. }
  99. return 0;
  100. }
  101. static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
  102. loff_t *ppos)
  103. {
  104. ssize_t ret;
  105. if (flashdebug)
  106. printk(KERN_DEBUG "flash_read: flash_read: offset=0x%llx, "
  107. "buffer=%p, count=0x%zx.\n", *ppos, buf, size);
  108. /*
  109. * We now lock against reads and writes. --rmk
  110. */
  111. if (mutex_lock_interruptible(&nwflash_mutex))
  112. return -ERESTARTSYS;
  113. ret = simple_read_from_buffer(buf, size, ppos, (void *)FLASH_BASE, gbFlashSize);
  114. mutex_unlock(&nwflash_mutex);
  115. return ret;
  116. }
  117. static ssize_t flash_write(struct file *file, const char __user *buf,
  118. size_t size, loff_t * ppos)
  119. {
  120. unsigned long p = *ppos;
  121. unsigned int count = size;
  122. int written;
  123. int nBlock, temp, rc;
  124. int i, j;
  125. if (flashdebug)
  126. printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
  127. p, buf, count);
  128. if (!gbWriteEnable)
  129. return -EINVAL;
  130. if (p < 64 * 1024 && (!gbWriteBase64Enable))
  131. return -EINVAL;
  132. /*
  133. * check for out of range pos or count
  134. */
  135. if (p >= gbFlashSize)
  136. return count ? -ENXIO : 0;
  137. if (count > gbFlashSize - p)
  138. count = gbFlashSize - p;
  139. if (!access_ok(VERIFY_READ, buf, count))
  140. return -EFAULT;
  141. /*
  142. * We now lock against reads and writes. --rmk
  143. */
  144. if (mutex_lock_interruptible(&nwflash_mutex))
  145. return -ERESTARTSYS;
  146. written = 0;
  147. leds_event(led_claim);
  148. leds_event(led_green_on);
  149. nBlock = (int) p >> 16; //block # of 64K bytes
  150. /*
  151. * # of 64K blocks to erase and write
  152. */
  153. temp = ((int) (p + count) >> 16) - nBlock + 1;
  154. /*
  155. * write ends at exactly 64k boundary?
  156. */
  157. if (((int) (p + count) & 0xFFFF) == 0)
  158. temp -= 1;
  159. if (flashdebug)
  160. printk(KERN_DEBUG "flash_write: writing %d block(s) "
  161. "starting at %d.\n", temp, nBlock);
  162. for (; temp; temp--, nBlock++) {
  163. if (flashdebug)
  164. printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
  165. /*
  166. * first we have to erase the block(s), where we will write...
  167. */
  168. i = 0;
  169. j = 0;
  170. RetryBlock:
  171. do {
  172. rc = erase_block(nBlock);
  173. i++;
  174. } while (rc && i < 10);
  175. if (rc) {
  176. printk(KERN_ERR "flash_write: erase error %x\n", rc);
  177. break;
  178. }
  179. if (flashdebug)
  180. printk(KERN_DEBUG "flash_write: writing offset %lX, "
  181. "from buf %p, bytes left %X.\n", p, buf,
  182. count - written);
  183. /*
  184. * write_block will limit write to space left in this block
  185. */
  186. rc = write_block(p, buf, count - written);
  187. j++;
  188. /*
  189. * if somehow write verify failed? Can't happen??
  190. */
  191. if (!rc) {
  192. /*
  193. * retry up to 10 times
  194. */
  195. if (j < 10)
  196. goto RetryBlock;
  197. else
  198. /*
  199. * else quit with error...
  200. */
  201. rc = -1;
  202. }
  203. if (rc < 0) {
  204. printk(KERN_ERR "flash_write: write error %X\n", rc);
  205. break;
  206. }
  207. p += rc;
  208. buf += rc;
  209. written += rc;
  210. *ppos += rc;
  211. if (flashdebug)
  212. printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
  213. }
  214. /*
  215. * restore reg on exit
  216. */
  217. leds_event(led_release);
  218. mutex_unlock(&nwflash_mutex);
  219. return written;
  220. }
  221. /*
  222. * The memory devices use the full 32/64 bits of the offset, and so we cannot
  223. * check against negative addresses: they are ok. The return value is weird,
  224. * though, in that case (0).
  225. *
  226. * also note that seeking relative to the "end of file" isn't supported:
  227. * it has no meaning, so it returns -EINVAL.
  228. */
  229. static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
  230. {
  231. loff_t ret;
  232. lock_kernel();
  233. if (flashdebug)
  234. printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
  235. (unsigned int) offset, orig);
  236. switch (orig) {
  237. case 0:
  238. if (offset < 0) {
  239. ret = -EINVAL;
  240. break;
  241. }
  242. if ((unsigned int) offset > gbFlashSize) {
  243. ret = -EINVAL;
  244. break;
  245. }
  246. file->f_pos = (unsigned int) offset;
  247. ret = file->f_pos;
  248. break;
  249. case 1:
  250. if ((file->f_pos + offset) > gbFlashSize) {
  251. ret = -EINVAL;
  252. break;
  253. }
  254. if ((file->f_pos + offset) < 0) {
  255. ret = -EINVAL;
  256. break;
  257. }
  258. file->f_pos += offset;
  259. ret = file->f_pos;
  260. break;
  261. default:
  262. ret = -EINVAL;
  263. }
  264. unlock_kernel();
  265. return ret;
  266. }
  267. /*
  268. * assume that main Write routine did the parameter checking...
  269. * so just go ahead and erase, what requested!
  270. */
  271. static int erase_block(int nBlock)
  272. {
  273. volatile unsigned int c1;
  274. volatile unsigned char *pWritePtr;
  275. unsigned long timeout;
  276. int temp, temp1;
  277. /*
  278. * orange LED == erase
  279. */
  280. leds_event(led_amber_on);
  281. /*
  282. * reset footbridge to the correct offset 0 (...0..3)
  283. */
  284. *CSR_ROMWRITEREG = 0;
  285. /*
  286. * dummy ROM read
  287. */
  288. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  289. kick_open();
  290. /*
  291. * reset status if old errors
  292. */
  293. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  294. /*
  295. * erase a block...
  296. * aim at the middle of a current block...
  297. */
  298. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
  299. /*
  300. * dummy read
  301. */
  302. c1 = *pWritePtr;
  303. kick_open();
  304. /*
  305. * erase
  306. */
  307. *(volatile unsigned char *) pWritePtr = 0x20;
  308. /*
  309. * confirm
  310. */
  311. *(volatile unsigned char *) pWritePtr = 0xD0;
  312. /*
  313. * wait 10 ms
  314. */
  315. msleep(10);
  316. /*
  317. * wait while erasing in process (up to 10 sec)
  318. */
  319. timeout = jiffies + 10 * HZ;
  320. c1 = 0;
  321. while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
  322. msleep(10);
  323. /*
  324. * read any address
  325. */
  326. c1 = *(volatile unsigned char *) (pWritePtr);
  327. // printk("Flash_erase: status=%X.\n",c1);
  328. }
  329. /*
  330. * set flash for normal read access
  331. */
  332. kick_open();
  333. // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
  334. *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
  335. /*
  336. * check if erase errors were reported
  337. */
  338. if (c1 & 0x20) {
  339. printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
  340. /*
  341. * reset error
  342. */
  343. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  344. return -2;
  345. }
  346. /*
  347. * just to make sure - verify if erased OK...
  348. */
  349. msleep(10);
  350. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
  351. for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
  352. if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
  353. printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
  354. pWritePtr, temp1);
  355. return -1;
  356. }
  357. }
  358. return 0;
  359. }
  360. /*
  361. * write_block will limit number of bytes written to the space in this block
  362. */
  363. static int write_block(unsigned long p, const char __user *buf, int count)
  364. {
  365. volatile unsigned int c1;
  366. volatile unsigned int c2;
  367. unsigned char *pWritePtr;
  368. unsigned int uAddress;
  369. unsigned int offset;
  370. unsigned long timeout;
  371. unsigned long timeout1;
  372. /*
  373. * red LED == write
  374. */
  375. leds_event(led_amber_off);
  376. leds_event(led_red_on);
  377. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  378. /*
  379. * check if write will end in this block....
  380. */
  381. offset = p & 0xFFFF;
  382. if (offset + count > 0x10000)
  383. count = 0x10000 - offset;
  384. /*
  385. * wait up to 30 sec for this block
  386. */
  387. timeout = jiffies + 30 * HZ;
  388. for (offset = 0; offset < count; offset++, pWritePtr++) {
  389. uAddress = (unsigned int) pWritePtr;
  390. uAddress &= 0xFFFFFFFC;
  391. if (__get_user(c2, buf + offset))
  392. return -EFAULT;
  393. WriteRetry:
  394. /*
  395. * dummy read
  396. */
  397. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  398. /*
  399. * kick open the write gate
  400. */
  401. kick_open();
  402. /*
  403. * program footbridge to the correct offset...0..3
  404. */
  405. *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
  406. /*
  407. * write cmd
  408. */
  409. *(volatile unsigned char *) (uAddress) = 0x40;
  410. /*
  411. * data to write
  412. */
  413. *(volatile unsigned char *) (uAddress) = c2;
  414. /*
  415. * get status
  416. */
  417. *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
  418. c1 = 0;
  419. /*
  420. * wait up to 1 sec for this byte
  421. */
  422. timeout1 = jiffies + 1 * HZ;
  423. /*
  424. * while not ready...
  425. */
  426. while (!(c1 & 0x80) && time_before(jiffies, timeout1))
  427. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  428. /*
  429. * if timeout getting status
  430. */
  431. if (time_after_eq(jiffies, timeout1)) {
  432. kick_open();
  433. /*
  434. * reset err
  435. */
  436. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  437. goto WriteRetry;
  438. }
  439. /*
  440. * switch on read access, as a default flash operation mode
  441. */
  442. kick_open();
  443. /*
  444. * read access
  445. */
  446. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  447. /*
  448. * if hardware reports an error writing, and not timeout -
  449. * reset the chip and retry
  450. */
  451. if (c1 & 0x10) {
  452. kick_open();
  453. /*
  454. * reset err
  455. */
  456. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  457. /*
  458. * before timeout?
  459. */
  460. if (time_before(jiffies, timeout)) {
  461. if (flashdebug)
  462. printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
  463. pWritePtr - FLASH_BASE);
  464. /*
  465. * no LED == waiting
  466. */
  467. leds_event(led_amber_off);
  468. /*
  469. * wait couple ms
  470. */
  471. msleep(10);
  472. /*
  473. * red LED == write
  474. */
  475. leds_event(led_red_on);
  476. goto WriteRetry;
  477. } else {
  478. printk(KERN_ERR "write_block: timeout at 0x%X\n",
  479. pWritePtr - FLASH_BASE);
  480. /*
  481. * return error -2
  482. */
  483. return -2;
  484. }
  485. }
  486. }
  487. /*
  488. * green LED == read/verify
  489. */
  490. leds_event(led_amber_off);
  491. leds_event(led_green_on);
  492. msleep(10);
  493. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  494. for (offset = 0; offset < count; offset++) {
  495. char c, c1;
  496. if (__get_user(c, buf))
  497. return -EFAULT;
  498. buf++;
  499. if ((c1 = *pWritePtr++) != c) {
  500. printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
  501. pWritePtr - FLASH_BASE, c1, c);
  502. return 0;
  503. }
  504. }
  505. return count;
  506. }
  507. static void kick_open(void)
  508. {
  509. unsigned long flags;
  510. /*
  511. * we want to write a bit pattern XXX1 to Xilinx to enable
  512. * the write gate, which will be open for about the next 2ms.
  513. */
  514. spin_lock_irqsave(&gpio_lock, flags);
  515. cpld_modify(1, 1);
  516. spin_unlock_irqrestore(&gpio_lock, flags);
  517. /*
  518. * let the ISA bus to catch on...
  519. */
  520. udelay(25);
  521. }
  522. static const struct file_operations flash_fops =
  523. {
  524. .owner = THIS_MODULE,
  525. .llseek = flash_llseek,
  526. .read = flash_read,
  527. .write = flash_write,
  528. .ioctl = flash_ioctl,
  529. };
  530. static struct miscdevice flash_miscdev =
  531. {
  532. FLASH_MINOR,
  533. "nwflash",
  534. &flash_fops
  535. };
  536. static int __init nwflash_init(void)
  537. {
  538. int ret = -ENODEV;
  539. if (machine_is_netwinder()) {
  540. int id;
  541. FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
  542. if (!FLASH_BASE)
  543. goto out;
  544. id = get_flash_id();
  545. if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
  546. ret = -ENXIO;
  547. iounmap((void *)FLASH_BASE);
  548. printk("Flash: incorrect ID 0x%04X.\n", id);
  549. goto out;
  550. }
  551. printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
  552. NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
  553. ret = misc_register(&flash_miscdev);
  554. if (ret < 0) {
  555. iounmap((void *)FLASH_BASE);
  556. }
  557. }
  558. out:
  559. return ret;
  560. }
  561. static void __exit nwflash_exit(void)
  562. {
  563. misc_deregister(&flash_miscdev);
  564. iounmap((void *)FLASH_BASE);
  565. }
  566. MODULE_LICENSE("GPL");
  567. module_param(flashdebug, bool, 0644);
  568. module_init(nwflash_init);
  569. module_exit(nwflash_exit);