omap-rng.c 4.6 KB

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  1. /*
  2. * omap-rng.c - RNG driver for TI OMAP CPU family
  3. *
  4. * Author: Deepak Saxena <dsaxena@plexity.net>
  5. *
  6. * Copyright 2005 (c) MontaVista Software, Inc.
  7. *
  8. * Mostly based on original driver:
  9. *
  10. * Copyright (C) 2005 Nokia Corporation
  11. * Author: Juha Yrjölä <juha.yrjola@nokia.com>
  12. *
  13. * This file is licensed under the terms of the GNU General Public
  14. * License version 2. This program is licensed "as is" without any
  15. * warranty of any kind, whether express or implied.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/init.h>
  19. #include <linux/random.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/hw_random.h>
  24. #include <linux/delay.h>
  25. #include <asm/io.h>
  26. #define RNG_OUT_REG 0x00 /* Output register */
  27. #define RNG_STAT_REG 0x04 /* Status register
  28. [0] = STAT_BUSY */
  29. #define RNG_ALARM_REG 0x24 /* Alarm register
  30. [7:0] = ALARM_COUNTER */
  31. #define RNG_CONFIG_REG 0x28 /* Configuration register
  32. [11:6] = RESET_COUNT
  33. [5:3] = RING2_DELAY
  34. [2:0] = RING1_DELAY */
  35. #define RNG_REV_REG 0x3c /* Revision register
  36. [7:0] = REV_NB */
  37. #define RNG_MASK_REG 0x40 /* Mask and reset register
  38. [2] = IT_EN
  39. [1] = SOFTRESET
  40. [0] = AUTOIDLE */
  41. #define RNG_SYSSTATUS 0x44 /* System status
  42. [0] = RESETDONE */
  43. static void __iomem *rng_base;
  44. static struct clk *rng_ick;
  45. static struct platform_device *rng_dev;
  46. static inline u32 omap_rng_read_reg(int reg)
  47. {
  48. return __raw_readl(rng_base + reg);
  49. }
  50. static inline void omap_rng_write_reg(int reg, u32 val)
  51. {
  52. __raw_writel(val, rng_base + reg);
  53. }
  54. static int omap_rng_data_present(struct hwrng *rng, int wait)
  55. {
  56. int data, i;
  57. for (i = 0; i < 20; i++) {
  58. data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
  59. if (data || !wait)
  60. break;
  61. /* RNG produces data fast enough (2+ MBit/sec, even
  62. * during "rngtest" loads, that these delays don't
  63. * seem to trigger. We *could* use the RNG IRQ, but
  64. * that'd be higher overhead ... so why bother?
  65. */
  66. udelay(10);
  67. }
  68. return data;
  69. }
  70. static int omap_rng_data_read(struct hwrng *rng, u32 *data)
  71. {
  72. *data = omap_rng_read_reg(RNG_OUT_REG);
  73. return 4;
  74. }
  75. static struct hwrng omap_rng_ops = {
  76. .name = "omap",
  77. .data_present = omap_rng_data_present,
  78. .data_read = omap_rng_data_read,
  79. };
  80. static int __init omap_rng_probe(struct platform_device *pdev)
  81. {
  82. struct resource *res, *mem;
  83. int ret;
  84. /*
  85. * A bit ugly, and it will never actually happen but there can
  86. * be only one RNG and this catches any bork
  87. */
  88. if (rng_dev)
  89. return -EBUSY;
  90. if (cpu_is_omap24xx()) {
  91. rng_ick = clk_get(NULL, "rng_ick");
  92. if (IS_ERR(rng_ick)) {
  93. dev_err(&pdev->dev, "Could not get rng_ick\n");
  94. ret = PTR_ERR(rng_ick);
  95. return ret;
  96. } else
  97. clk_enable(rng_ick);
  98. }
  99. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  100. if (!res)
  101. return -ENOENT;
  102. mem = request_mem_region(res->start, res->end - res->start + 1,
  103. pdev->name);
  104. if (mem == NULL)
  105. return -EBUSY;
  106. dev_set_drvdata(&pdev->dev, mem);
  107. rng_base = (u32 __force __iomem *)io_p2v(res->start);
  108. ret = hwrng_register(&omap_rng_ops);
  109. if (ret) {
  110. release_resource(mem);
  111. rng_base = NULL;
  112. return ret;
  113. }
  114. dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
  115. omap_rng_read_reg(RNG_REV_REG));
  116. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  117. rng_dev = pdev;
  118. return 0;
  119. }
  120. static int __exit omap_rng_remove(struct platform_device *pdev)
  121. {
  122. struct resource *mem = dev_get_drvdata(&pdev->dev);
  123. hwrng_unregister(&omap_rng_ops);
  124. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  125. if (cpu_is_omap24xx()) {
  126. clk_disable(rng_ick);
  127. clk_put(rng_ick);
  128. }
  129. release_resource(mem);
  130. rng_base = NULL;
  131. return 0;
  132. }
  133. #ifdef CONFIG_PM
  134. static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
  135. {
  136. omap_rng_write_reg(RNG_MASK_REG, 0x0);
  137. return 0;
  138. }
  139. static int omap_rng_resume(struct platform_device *pdev)
  140. {
  141. omap_rng_write_reg(RNG_MASK_REG, 0x1);
  142. return 0;
  143. }
  144. #else
  145. #define omap_rng_suspend NULL
  146. #define omap_rng_resume NULL
  147. #endif
  148. /* work with hotplug and coldplug */
  149. MODULE_ALIAS("platform:omap_rng");
  150. static struct platform_driver omap_rng_driver = {
  151. .driver = {
  152. .name = "omap_rng",
  153. .owner = THIS_MODULE,
  154. },
  155. .probe = omap_rng_probe,
  156. .remove = __exit_p(omap_rng_remove),
  157. .suspend = omap_rng_suspend,
  158. .resume = omap_rng_resume
  159. };
  160. static int __init omap_rng_init(void)
  161. {
  162. if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
  163. return -ENODEV;
  164. return platform_driver_register(&omap_rng_driver);
  165. }
  166. static void __exit omap_rng_exit(void)
  167. {
  168. platform_driver_unregister(&omap_rng_driver);
  169. }
  170. module_init(omap_rng_init);
  171. module_exit(omap_rng_exit);
  172. MODULE_AUTHOR("Deepak Saxena (and others)");
  173. MODULE_LICENSE("GPL");