swim3.c 29 KB

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  1. /*
  2. * Driver for the SWIM3 (Super Woz Integrated Machine 3)
  3. * floppy controller found on Power Macintoshes.
  4. *
  5. * Copyright (C) 1996 Paul Mackerras.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * TODO:
  14. * handle 2 drives
  15. * handle GCR disks
  16. */
  17. #include <linux/stddef.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/timer.h>
  21. #include <linux/delay.h>
  22. #include <linux/fd.h>
  23. #include <linux/ioctl.h>
  24. #include <linux/blkdev.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/module.h>
  27. #include <linux/spinlock.h>
  28. #include <asm/io.h>
  29. #include <asm/dbdma.h>
  30. #include <asm/prom.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/mediabay.h>
  33. #include <asm/machdep.h>
  34. #include <asm/pmac_feature.h>
  35. static struct request_queue *swim3_queue;
  36. static struct gendisk *disks[2];
  37. static struct request *fd_req;
  38. #define MAX_FLOPPIES 2
  39. enum swim_state {
  40. idle,
  41. locating,
  42. seeking,
  43. settling,
  44. do_transfer,
  45. jogging,
  46. available,
  47. revalidating,
  48. ejecting
  49. };
  50. #define REG(x) unsigned char x; char x ## _pad[15];
  51. /*
  52. * The names for these registers mostly represent speculation on my part.
  53. * It will be interesting to see how close they are to the names Apple uses.
  54. */
  55. struct swim3 {
  56. REG(data);
  57. REG(timer); /* counts down at 1MHz */
  58. REG(error);
  59. REG(mode);
  60. REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */
  61. REG(setup);
  62. REG(control); /* writing bits clears them */
  63. REG(status); /* writing bits sets them in control */
  64. REG(intr);
  65. REG(nseek); /* # tracks to seek */
  66. REG(ctrack); /* current track number */
  67. REG(csect); /* current sector number */
  68. REG(gap3); /* size of gap 3 in track format */
  69. REG(sector); /* sector # to read or write */
  70. REG(nsect); /* # sectors to read or write */
  71. REG(intr_enable);
  72. };
  73. #define control_bic control
  74. #define control_bis status
  75. /* Bits in select register */
  76. #define CA_MASK 7
  77. #define LSTRB 8
  78. /* Bits in control register */
  79. #define DO_SEEK 0x80
  80. #define FORMAT 0x40
  81. #define SELECT 0x20
  82. #define WRITE_SECTORS 0x10
  83. #define DO_ACTION 0x08
  84. #define DRIVE2_ENABLE 0x04
  85. #define DRIVE_ENABLE 0x02
  86. #define INTR_ENABLE 0x01
  87. /* Bits in status register */
  88. #define FIFO_1BYTE 0x80
  89. #define FIFO_2BYTE 0x40
  90. #define ERROR 0x20
  91. #define DATA 0x08
  92. #define RDDATA 0x04
  93. #define INTR_PENDING 0x02
  94. #define MARK_BYTE 0x01
  95. /* Bits in intr and intr_enable registers */
  96. #define ERROR_INTR 0x20
  97. #define DATA_CHANGED 0x10
  98. #define TRANSFER_DONE 0x08
  99. #define SEEN_SECTOR 0x04
  100. #define SEEK_DONE 0x02
  101. #define TIMER_DONE 0x01
  102. /* Bits in error register */
  103. #define ERR_DATA_CRC 0x80
  104. #define ERR_ADDR_CRC 0x40
  105. #define ERR_OVERRUN 0x04
  106. #define ERR_UNDERRUN 0x01
  107. /* Bits in setup register */
  108. #define S_SW_RESET 0x80
  109. #define S_GCR_WRITE 0x40
  110. #define S_IBM_DRIVE 0x20
  111. #define S_TEST_MODE 0x10
  112. #define S_FCLK_DIV2 0x08
  113. #define S_GCR 0x04
  114. #define S_COPY_PROT 0x02
  115. #define S_INV_WDATA 0x01
  116. /* Select values for swim3_action */
  117. #define SEEK_POSITIVE 0
  118. #define SEEK_NEGATIVE 4
  119. #define STEP 1
  120. #define MOTOR_ON 2
  121. #define MOTOR_OFF 6
  122. #define INDEX 3
  123. #define EJECT 7
  124. #define SETMFM 9
  125. #define SETGCR 13
  126. /* Select values for swim3_select and swim3_readbit */
  127. #define STEP_DIR 0
  128. #define STEPPING 1
  129. #define MOTOR_ON 2
  130. #define RELAX 3 /* also eject in progress */
  131. #define READ_DATA_0 4
  132. #define TWOMEG_DRIVE 5
  133. #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */
  134. #define DRIVE_PRESENT 7
  135. #define DISK_IN 8
  136. #define WRITE_PROT 9
  137. #define TRACK_ZERO 10
  138. #define TACHO 11
  139. #define READ_DATA_1 12
  140. #define MFM_MODE 13
  141. #define SEEK_COMPLETE 14
  142. #define ONEMEG_MEDIA 15
  143. /* Definitions of values used in writing and formatting */
  144. #define DATA_ESCAPE 0x99
  145. #define GCR_SYNC_EXC 0x3f
  146. #define GCR_SYNC_CONV 0x80
  147. #define GCR_FIRST_MARK 0xd5
  148. #define GCR_SECOND_MARK 0xaa
  149. #define GCR_ADDR_MARK "\xd5\xaa\x00"
  150. #define GCR_DATA_MARK "\xd5\xaa\x0b"
  151. #define GCR_SLIP_BYTE "\x27\xaa"
  152. #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f"
  153. #define DATA_99 "\x99\x99"
  154. #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe"
  155. #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc"
  156. #define MFM_GAP_LEN 12
  157. struct floppy_state {
  158. enum swim_state state;
  159. spinlock_t lock;
  160. struct swim3 __iomem *swim3; /* hardware registers */
  161. struct dbdma_regs __iomem *dma; /* DMA controller registers */
  162. int swim3_intr; /* interrupt number for SWIM3 */
  163. int dma_intr; /* interrupt number for DMA channel */
  164. int cur_cyl; /* cylinder head is on, or -1 */
  165. int cur_sector; /* last sector we saw go past */
  166. int req_cyl; /* the cylinder for the current r/w request */
  167. int head; /* head number ditto */
  168. int req_sector; /* sector number ditto */
  169. int scount; /* # sectors we're transferring at present */
  170. int retries;
  171. int settle_time;
  172. int secpercyl; /* disk geometry information */
  173. int secpertrack;
  174. int total_secs;
  175. int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */
  176. struct dbdma_cmd *dma_cmd;
  177. int ref_count;
  178. int expect_cyl;
  179. struct timer_list timeout;
  180. int timeout_pending;
  181. int ejected;
  182. wait_queue_head_t wait;
  183. int wanted;
  184. struct device_node* media_bay; /* NULL when not in bay */
  185. char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)];
  186. };
  187. static struct floppy_state floppy_states[MAX_FLOPPIES];
  188. static int floppy_count = 0;
  189. static DEFINE_SPINLOCK(swim3_lock);
  190. static unsigned short write_preamble[] = {
  191. 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */
  192. 0, 0, 0, 0, 0, 0, /* sync field */
  193. 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */
  194. 0x990f /* no escape for 512 bytes */
  195. };
  196. static unsigned short write_postamble[] = {
  197. 0x9904, /* insert CRC */
  198. 0x4e4e, 0x4e4e,
  199. 0x9908, /* stop writing */
  200. 0, 0, 0, 0, 0, 0
  201. };
  202. static void swim3_select(struct floppy_state *fs, int sel);
  203. static void swim3_action(struct floppy_state *fs, int action);
  204. static int swim3_readbit(struct floppy_state *fs, int bit);
  205. static void do_fd_request(struct request_queue * q);
  206. static void start_request(struct floppy_state *fs);
  207. static void set_timeout(struct floppy_state *fs, int nticks,
  208. void (*proc)(unsigned long));
  209. static void scan_track(struct floppy_state *fs);
  210. static void seek_track(struct floppy_state *fs, int n);
  211. static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count);
  212. static void setup_transfer(struct floppy_state *fs);
  213. static void act(struct floppy_state *fs);
  214. static void scan_timeout(unsigned long data);
  215. static void seek_timeout(unsigned long data);
  216. static void settle_timeout(unsigned long data);
  217. static void xfer_timeout(unsigned long data);
  218. static irqreturn_t swim3_interrupt(int irq, void *dev_id);
  219. /*static void fd_dma_interrupt(int irq, void *dev_id);*/
  220. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  221. int interruptible);
  222. static void release_drive(struct floppy_state *fs);
  223. static int fd_eject(struct floppy_state *fs);
  224. static int floppy_ioctl(struct inode *inode, struct file *filp,
  225. unsigned int cmd, unsigned long param);
  226. static int floppy_open(struct inode *inode, struct file *filp);
  227. static int floppy_release(struct inode *inode, struct file *filp);
  228. static int floppy_check_change(struct gendisk *disk);
  229. static int floppy_revalidate(struct gendisk *disk);
  230. static void swim3_select(struct floppy_state *fs, int sel)
  231. {
  232. struct swim3 __iomem *sw = fs->swim3;
  233. out_8(&sw->select, RELAX);
  234. if (sel & 8)
  235. out_8(&sw->control_bis, SELECT);
  236. else
  237. out_8(&sw->control_bic, SELECT);
  238. out_8(&sw->select, sel & CA_MASK);
  239. }
  240. static void swim3_action(struct floppy_state *fs, int action)
  241. {
  242. struct swim3 __iomem *sw = fs->swim3;
  243. swim3_select(fs, action);
  244. udelay(1);
  245. out_8(&sw->select, sw->select | LSTRB);
  246. udelay(2);
  247. out_8(&sw->select, sw->select & ~LSTRB);
  248. udelay(1);
  249. }
  250. static int swim3_readbit(struct floppy_state *fs, int bit)
  251. {
  252. struct swim3 __iomem *sw = fs->swim3;
  253. int stat;
  254. swim3_select(fs, bit);
  255. udelay(1);
  256. stat = in_8(&sw->status);
  257. return (stat & DATA) == 0;
  258. }
  259. static void do_fd_request(struct request_queue * q)
  260. {
  261. int i;
  262. for(i=0;i<floppy_count;i++)
  263. {
  264. #ifdef CONFIG_PMAC_MEDIABAY
  265. if (floppy_states[i].media_bay &&
  266. check_media_bay(floppy_states[i].media_bay, MB_FD))
  267. continue;
  268. #endif /* CONFIG_PMAC_MEDIABAY */
  269. start_request(&floppy_states[i]);
  270. }
  271. }
  272. static void start_request(struct floppy_state *fs)
  273. {
  274. struct request *req;
  275. unsigned long x;
  276. if (fs->state == idle && fs->wanted) {
  277. fs->state = available;
  278. wake_up(&fs->wait);
  279. return;
  280. }
  281. while (fs->state == idle && (req = elv_next_request(swim3_queue))) {
  282. #if 0
  283. printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%ld buf=%p\n",
  284. req->rq_disk->disk_name, req->cmd,
  285. (long)req->sector, req->nr_sectors, req->buffer);
  286. printk(" errors=%d current_nr_sectors=%ld\n",
  287. req->errors, req->current_nr_sectors);
  288. #endif
  289. if (req->sector < 0 || req->sector >= fs->total_secs) {
  290. end_request(req, 0);
  291. continue;
  292. }
  293. if (req->current_nr_sectors == 0) {
  294. end_request(req, 1);
  295. continue;
  296. }
  297. if (fs->ejected) {
  298. end_request(req, 0);
  299. continue;
  300. }
  301. if (rq_data_dir(req) == WRITE) {
  302. if (fs->write_prot < 0)
  303. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  304. if (fs->write_prot) {
  305. end_request(req, 0);
  306. continue;
  307. }
  308. }
  309. /* Do not remove the cast. req->sector is now a sector_t and
  310. * can be 64 bits, but it will never go past 32 bits for this
  311. * driver anyway, so we can safely cast it down and not have
  312. * to do a 64/32 division
  313. */
  314. fs->req_cyl = ((long)req->sector) / fs->secpercyl;
  315. x = ((long)req->sector) % fs->secpercyl;
  316. fs->head = x / fs->secpertrack;
  317. fs->req_sector = x % fs->secpertrack + 1;
  318. fd_req = req;
  319. fs->state = do_transfer;
  320. fs->retries = 0;
  321. act(fs);
  322. }
  323. }
  324. static void set_timeout(struct floppy_state *fs, int nticks,
  325. void (*proc)(unsigned long))
  326. {
  327. unsigned long flags;
  328. spin_lock_irqsave(&fs->lock, flags);
  329. if (fs->timeout_pending)
  330. del_timer(&fs->timeout);
  331. fs->timeout.expires = jiffies + nticks;
  332. fs->timeout.function = proc;
  333. fs->timeout.data = (unsigned long) fs;
  334. add_timer(&fs->timeout);
  335. fs->timeout_pending = 1;
  336. spin_unlock_irqrestore(&fs->lock, flags);
  337. }
  338. static inline void scan_track(struct floppy_state *fs)
  339. {
  340. struct swim3 __iomem *sw = fs->swim3;
  341. swim3_select(fs, READ_DATA_0);
  342. in_8(&sw->intr); /* clear SEEN_SECTOR bit */
  343. in_8(&sw->error);
  344. out_8(&sw->intr_enable, SEEN_SECTOR);
  345. out_8(&sw->control_bis, DO_ACTION);
  346. /* enable intr when track found */
  347. set_timeout(fs, HZ, scan_timeout); /* enable timeout */
  348. }
  349. static inline void seek_track(struct floppy_state *fs, int n)
  350. {
  351. struct swim3 __iomem *sw = fs->swim3;
  352. if (n >= 0) {
  353. swim3_action(fs, SEEK_POSITIVE);
  354. sw->nseek = n;
  355. } else {
  356. swim3_action(fs, SEEK_NEGATIVE);
  357. sw->nseek = -n;
  358. }
  359. fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1;
  360. swim3_select(fs, STEP);
  361. in_8(&sw->error);
  362. /* enable intr when seek finished */
  363. out_8(&sw->intr_enable, SEEK_DONE);
  364. out_8(&sw->control_bis, DO_SEEK);
  365. set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */
  366. fs->settle_time = 0;
  367. }
  368. static inline void init_dma(struct dbdma_cmd *cp, int cmd,
  369. void *buf, int count)
  370. {
  371. st_le16(&cp->req_count, count);
  372. st_le16(&cp->command, cmd);
  373. st_le32(&cp->phy_addr, virt_to_bus(buf));
  374. cp->xfer_status = 0;
  375. }
  376. static inline void setup_transfer(struct floppy_state *fs)
  377. {
  378. int n;
  379. struct swim3 __iomem *sw = fs->swim3;
  380. struct dbdma_cmd *cp = fs->dma_cmd;
  381. struct dbdma_regs __iomem *dr = fs->dma;
  382. if (fd_req->current_nr_sectors <= 0) {
  383. printk(KERN_ERR "swim3: transfer 0 sectors?\n");
  384. return;
  385. }
  386. if (rq_data_dir(fd_req) == WRITE)
  387. n = 1;
  388. else {
  389. n = fs->secpertrack - fs->req_sector + 1;
  390. if (n > fd_req->current_nr_sectors)
  391. n = fd_req->current_nr_sectors;
  392. }
  393. fs->scount = n;
  394. swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0);
  395. out_8(&sw->sector, fs->req_sector);
  396. out_8(&sw->nsect, n);
  397. out_8(&sw->gap3, 0);
  398. out_le32(&dr->cmdptr, virt_to_bus(cp));
  399. if (rq_data_dir(fd_req) == WRITE) {
  400. /* Set up 3 dma commands: write preamble, data, postamble */
  401. init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble));
  402. ++cp;
  403. init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512);
  404. ++cp;
  405. init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble));
  406. } else {
  407. init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512);
  408. }
  409. ++cp;
  410. out_le16(&cp->command, DBDMA_STOP);
  411. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  412. in_8(&sw->error);
  413. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  414. if (rq_data_dir(fd_req) == WRITE)
  415. out_8(&sw->control_bis, WRITE_SECTORS);
  416. in_8(&sw->intr);
  417. out_le32(&dr->control, (RUN << 16) | RUN);
  418. /* enable intr when transfer complete */
  419. out_8(&sw->intr_enable, TRANSFER_DONE);
  420. out_8(&sw->control_bis, DO_ACTION);
  421. set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */
  422. }
  423. static void act(struct floppy_state *fs)
  424. {
  425. for (;;) {
  426. switch (fs->state) {
  427. case idle:
  428. return; /* XXX shouldn't get here */
  429. case locating:
  430. if (swim3_readbit(fs, TRACK_ZERO)) {
  431. fs->cur_cyl = 0;
  432. if (fs->req_cyl == 0)
  433. fs->state = do_transfer;
  434. else
  435. fs->state = seeking;
  436. break;
  437. }
  438. scan_track(fs);
  439. return;
  440. case seeking:
  441. if (fs->cur_cyl < 0) {
  442. fs->expect_cyl = -1;
  443. fs->state = locating;
  444. break;
  445. }
  446. if (fs->req_cyl == fs->cur_cyl) {
  447. printk("whoops, seeking 0\n");
  448. fs->state = do_transfer;
  449. break;
  450. }
  451. seek_track(fs, fs->req_cyl - fs->cur_cyl);
  452. return;
  453. case settling:
  454. /* check for SEEK_COMPLETE after 30ms */
  455. fs->settle_time = (HZ + 32) / 33;
  456. set_timeout(fs, fs->settle_time, settle_timeout);
  457. return;
  458. case do_transfer:
  459. if (fs->cur_cyl != fs->req_cyl) {
  460. if (fs->retries > 5) {
  461. end_request(fd_req, 0);
  462. fs->state = idle;
  463. return;
  464. }
  465. fs->state = seeking;
  466. break;
  467. }
  468. setup_transfer(fs);
  469. return;
  470. case jogging:
  471. seek_track(fs, -5);
  472. return;
  473. default:
  474. printk(KERN_ERR"swim3: unknown state %d\n", fs->state);
  475. return;
  476. }
  477. }
  478. }
  479. static void scan_timeout(unsigned long data)
  480. {
  481. struct floppy_state *fs = (struct floppy_state *) data;
  482. struct swim3 __iomem *sw = fs->swim3;
  483. fs->timeout_pending = 0;
  484. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  485. out_8(&sw->select, RELAX);
  486. out_8(&sw->intr_enable, 0);
  487. fs->cur_cyl = -1;
  488. if (fs->retries > 5) {
  489. end_request(fd_req, 0);
  490. fs->state = idle;
  491. start_request(fs);
  492. } else {
  493. fs->state = jogging;
  494. act(fs);
  495. }
  496. }
  497. static void seek_timeout(unsigned long data)
  498. {
  499. struct floppy_state *fs = (struct floppy_state *) data;
  500. struct swim3 __iomem *sw = fs->swim3;
  501. fs->timeout_pending = 0;
  502. out_8(&sw->control_bic, DO_SEEK);
  503. out_8(&sw->select, RELAX);
  504. out_8(&sw->intr_enable, 0);
  505. printk(KERN_ERR "swim3: seek timeout\n");
  506. end_request(fd_req, 0);
  507. fs->state = idle;
  508. start_request(fs);
  509. }
  510. static void settle_timeout(unsigned long data)
  511. {
  512. struct floppy_state *fs = (struct floppy_state *) data;
  513. struct swim3 __iomem *sw = fs->swim3;
  514. fs->timeout_pending = 0;
  515. if (swim3_readbit(fs, SEEK_COMPLETE)) {
  516. out_8(&sw->select, RELAX);
  517. fs->state = locating;
  518. act(fs);
  519. return;
  520. }
  521. out_8(&sw->select, RELAX);
  522. if (fs->settle_time < 2*HZ) {
  523. ++fs->settle_time;
  524. set_timeout(fs, 1, settle_timeout);
  525. return;
  526. }
  527. printk(KERN_ERR "swim3: seek settle timeout\n");
  528. end_request(fd_req, 0);
  529. fs->state = idle;
  530. start_request(fs);
  531. }
  532. static void xfer_timeout(unsigned long data)
  533. {
  534. struct floppy_state *fs = (struct floppy_state *) data;
  535. struct swim3 __iomem *sw = fs->swim3;
  536. struct dbdma_regs __iomem *dr = fs->dma;
  537. struct dbdma_cmd *cp = fs->dma_cmd;
  538. unsigned long s;
  539. int n;
  540. fs->timeout_pending = 0;
  541. out_le32(&dr->control, RUN << 16);
  542. /* We must wait a bit for dbdma to stop */
  543. for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++)
  544. udelay(1);
  545. out_8(&sw->intr_enable, 0);
  546. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  547. out_8(&sw->select, RELAX);
  548. if (rq_data_dir(fd_req) == WRITE)
  549. ++cp;
  550. if (ld_le16(&cp->xfer_status) != 0)
  551. s = fs->scount - ((ld_le16(&cp->res_count) + 511) >> 9);
  552. else
  553. s = 0;
  554. fd_req->sector += s;
  555. fd_req->current_nr_sectors -= s;
  556. printk(KERN_ERR "swim3: timeout %sing sector %ld\n",
  557. (rq_data_dir(fd_req)==WRITE? "writ": "read"), (long)fd_req->sector);
  558. end_request(fd_req, 0);
  559. fs->state = idle;
  560. start_request(fs);
  561. }
  562. static irqreturn_t swim3_interrupt(int irq, void *dev_id)
  563. {
  564. struct floppy_state *fs = (struct floppy_state *) dev_id;
  565. struct swim3 __iomem *sw = fs->swim3;
  566. int intr, err, n;
  567. int stat, resid;
  568. struct dbdma_regs __iomem *dr;
  569. struct dbdma_cmd *cp;
  570. intr = in_8(&sw->intr);
  571. err = (intr & ERROR_INTR)? in_8(&sw->error): 0;
  572. if ((intr & ERROR_INTR) && fs->state != do_transfer)
  573. printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n",
  574. fs->state, rq_data_dir(fd_req), intr, err);
  575. switch (fs->state) {
  576. case locating:
  577. if (intr & SEEN_SECTOR) {
  578. out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS);
  579. out_8(&sw->select, RELAX);
  580. out_8(&sw->intr_enable, 0);
  581. del_timer(&fs->timeout);
  582. fs->timeout_pending = 0;
  583. if (sw->ctrack == 0xff) {
  584. printk(KERN_ERR "swim3: seen sector but cyl=ff?\n");
  585. fs->cur_cyl = -1;
  586. if (fs->retries > 5) {
  587. end_request(fd_req, 0);
  588. fs->state = idle;
  589. start_request(fs);
  590. } else {
  591. fs->state = jogging;
  592. act(fs);
  593. }
  594. break;
  595. }
  596. fs->cur_cyl = sw->ctrack;
  597. fs->cur_sector = sw->csect;
  598. if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl)
  599. printk(KERN_ERR "swim3: expected cyl %d, got %d\n",
  600. fs->expect_cyl, fs->cur_cyl);
  601. fs->state = do_transfer;
  602. act(fs);
  603. }
  604. break;
  605. case seeking:
  606. case jogging:
  607. if (sw->nseek == 0) {
  608. out_8(&sw->control_bic, DO_SEEK);
  609. out_8(&sw->select, RELAX);
  610. out_8(&sw->intr_enable, 0);
  611. del_timer(&fs->timeout);
  612. fs->timeout_pending = 0;
  613. if (fs->state == seeking)
  614. ++fs->retries;
  615. fs->state = settling;
  616. act(fs);
  617. }
  618. break;
  619. case settling:
  620. out_8(&sw->intr_enable, 0);
  621. del_timer(&fs->timeout);
  622. fs->timeout_pending = 0;
  623. act(fs);
  624. break;
  625. case do_transfer:
  626. if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0)
  627. break;
  628. out_8(&sw->intr_enable, 0);
  629. out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION);
  630. out_8(&sw->select, RELAX);
  631. del_timer(&fs->timeout);
  632. fs->timeout_pending = 0;
  633. dr = fs->dma;
  634. cp = fs->dma_cmd;
  635. if (rq_data_dir(fd_req) == WRITE)
  636. ++cp;
  637. /*
  638. * Check that the main data transfer has finished.
  639. * On writing, the swim3 sometimes doesn't use
  640. * up all the bytes of the postamble, so we can still
  641. * see DMA active here. That doesn't matter as long
  642. * as all the sector data has been transferred.
  643. */
  644. if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) {
  645. /* wait a little while for DMA to complete */
  646. for (n = 0; n < 100; ++n) {
  647. if (cp->xfer_status != 0)
  648. break;
  649. udelay(1);
  650. barrier();
  651. }
  652. }
  653. /* turn off DMA */
  654. out_le32(&dr->control, (RUN | PAUSE) << 16);
  655. stat = ld_le16(&cp->xfer_status);
  656. resid = ld_le16(&cp->res_count);
  657. if (intr & ERROR_INTR) {
  658. n = fs->scount - 1 - resid / 512;
  659. if (n > 0) {
  660. fd_req->sector += n;
  661. fd_req->current_nr_sectors -= n;
  662. fd_req->buffer += n * 512;
  663. fs->req_sector += n;
  664. }
  665. if (fs->retries < 5) {
  666. ++fs->retries;
  667. act(fs);
  668. } else {
  669. printk("swim3: error %sing block %ld (err=%x)\n",
  670. rq_data_dir(fd_req) == WRITE? "writ": "read",
  671. (long)fd_req->sector, err);
  672. end_request(fd_req, 0);
  673. fs->state = idle;
  674. }
  675. } else {
  676. if ((stat & ACTIVE) == 0 || resid != 0) {
  677. /* musta been an error */
  678. printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid);
  679. printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n",
  680. fs->state, rq_data_dir(fd_req), intr, err);
  681. end_request(fd_req, 0);
  682. fs->state = idle;
  683. start_request(fs);
  684. break;
  685. }
  686. fd_req->sector += fs->scount;
  687. fd_req->current_nr_sectors -= fs->scount;
  688. fd_req->buffer += fs->scount * 512;
  689. if (fd_req->current_nr_sectors <= 0) {
  690. end_request(fd_req, 1);
  691. fs->state = idle;
  692. } else {
  693. fs->req_sector += fs->scount;
  694. if (fs->req_sector > fs->secpertrack) {
  695. fs->req_sector -= fs->secpertrack;
  696. if (++fs->head > 1) {
  697. fs->head = 0;
  698. ++fs->req_cyl;
  699. }
  700. }
  701. act(fs);
  702. }
  703. }
  704. if (fs->state == idle)
  705. start_request(fs);
  706. break;
  707. default:
  708. printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state);
  709. }
  710. return IRQ_HANDLED;
  711. }
  712. /*
  713. static void fd_dma_interrupt(int irq, void *dev_id)
  714. {
  715. }
  716. */
  717. static int grab_drive(struct floppy_state *fs, enum swim_state state,
  718. int interruptible)
  719. {
  720. unsigned long flags;
  721. spin_lock_irqsave(&fs->lock, flags);
  722. if (fs->state != idle) {
  723. ++fs->wanted;
  724. while (fs->state != available) {
  725. if (interruptible && signal_pending(current)) {
  726. --fs->wanted;
  727. spin_unlock_irqrestore(&fs->lock, flags);
  728. return -EINTR;
  729. }
  730. interruptible_sleep_on(&fs->wait);
  731. }
  732. --fs->wanted;
  733. }
  734. fs->state = state;
  735. spin_unlock_irqrestore(&fs->lock, flags);
  736. return 0;
  737. }
  738. static void release_drive(struct floppy_state *fs)
  739. {
  740. unsigned long flags;
  741. spin_lock_irqsave(&fs->lock, flags);
  742. fs->state = idle;
  743. start_request(fs);
  744. spin_unlock_irqrestore(&fs->lock, flags);
  745. }
  746. static int fd_eject(struct floppy_state *fs)
  747. {
  748. int err, n;
  749. err = grab_drive(fs, ejecting, 1);
  750. if (err)
  751. return err;
  752. swim3_action(fs, EJECT);
  753. for (n = 20; n > 0; --n) {
  754. if (signal_pending(current)) {
  755. err = -EINTR;
  756. break;
  757. }
  758. swim3_select(fs, RELAX);
  759. schedule_timeout_interruptible(1);
  760. if (swim3_readbit(fs, DISK_IN) == 0)
  761. break;
  762. }
  763. swim3_select(fs, RELAX);
  764. udelay(150);
  765. fs->ejected = 1;
  766. release_drive(fs);
  767. return err;
  768. }
  769. static struct floppy_struct floppy_type =
  770. { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */
  771. static int floppy_ioctl(struct inode *inode, struct file *filp,
  772. unsigned int cmd, unsigned long param)
  773. {
  774. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  775. int err;
  776. if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN))
  777. return -EPERM;
  778. #ifdef CONFIG_PMAC_MEDIABAY
  779. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  780. return -ENXIO;
  781. #endif
  782. switch (cmd) {
  783. case FDEJECT:
  784. if (fs->ref_count != 1)
  785. return -EBUSY;
  786. err = fd_eject(fs);
  787. return err;
  788. case FDGETPRM:
  789. if (copy_to_user((void __user *) param, &floppy_type,
  790. sizeof(struct floppy_struct)))
  791. return -EFAULT;
  792. return 0;
  793. }
  794. return -ENOTTY;
  795. }
  796. static int floppy_open(struct inode *inode, struct file *filp)
  797. {
  798. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  799. struct swim3 __iomem *sw = fs->swim3;
  800. int n, err = 0;
  801. if (fs->ref_count == 0) {
  802. #ifdef CONFIG_PMAC_MEDIABAY
  803. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  804. return -ENXIO;
  805. #endif
  806. out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2);
  807. out_8(&sw->control_bic, 0xff);
  808. out_8(&sw->mode, 0x95);
  809. udelay(10);
  810. out_8(&sw->intr_enable, 0);
  811. out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE);
  812. swim3_action(fs, MOTOR_ON);
  813. fs->write_prot = -1;
  814. fs->cur_cyl = -1;
  815. for (n = 0; n < 2 * HZ; ++n) {
  816. if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE))
  817. break;
  818. if (signal_pending(current)) {
  819. err = -EINTR;
  820. break;
  821. }
  822. swim3_select(fs, RELAX);
  823. schedule_timeout_interruptible(1);
  824. }
  825. if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0
  826. || swim3_readbit(fs, DISK_IN) == 0))
  827. err = -ENXIO;
  828. swim3_action(fs, SETMFM);
  829. swim3_select(fs, RELAX);
  830. } else if (fs->ref_count == -1 || filp->f_flags & O_EXCL)
  831. return -EBUSY;
  832. if (err == 0 && (filp->f_flags & O_NDELAY) == 0
  833. && (filp->f_mode & 3)) {
  834. check_disk_change(inode->i_bdev);
  835. if (fs->ejected)
  836. err = -ENXIO;
  837. }
  838. if (err == 0 && (filp->f_mode & 2)) {
  839. if (fs->write_prot < 0)
  840. fs->write_prot = swim3_readbit(fs, WRITE_PROT);
  841. if (fs->write_prot)
  842. err = -EROFS;
  843. }
  844. if (err) {
  845. if (fs->ref_count == 0) {
  846. swim3_action(fs, MOTOR_OFF);
  847. out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE);
  848. swim3_select(fs, RELAX);
  849. }
  850. return err;
  851. }
  852. if (filp->f_flags & O_EXCL)
  853. fs->ref_count = -1;
  854. else
  855. ++fs->ref_count;
  856. return 0;
  857. }
  858. static int floppy_release(struct inode *inode, struct file *filp)
  859. {
  860. struct floppy_state *fs = inode->i_bdev->bd_disk->private_data;
  861. struct swim3 __iomem *sw = fs->swim3;
  862. if (fs->ref_count > 0 && --fs->ref_count == 0) {
  863. swim3_action(fs, MOTOR_OFF);
  864. out_8(&sw->control_bic, 0xff);
  865. swim3_select(fs, RELAX);
  866. }
  867. return 0;
  868. }
  869. static int floppy_check_change(struct gendisk *disk)
  870. {
  871. struct floppy_state *fs = disk->private_data;
  872. return fs->ejected;
  873. }
  874. static int floppy_revalidate(struct gendisk *disk)
  875. {
  876. struct floppy_state *fs = disk->private_data;
  877. struct swim3 __iomem *sw;
  878. int ret, n;
  879. #ifdef CONFIG_PMAC_MEDIABAY
  880. if (fs->media_bay && check_media_bay(fs->media_bay, MB_FD))
  881. return -ENXIO;
  882. #endif
  883. sw = fs->swim3;
  884. grab_drive(fs, revalidating, 0);
  885. out_8(&sw->intr_enable, 0);
  886. out_8(&sw->control_bis, DRIVE_ENABLE);
  887. swim3_action(fs, MOTOR_ON); /* necessary? */
  888. fs->write_prot = -1;
  889. fs->cur_cyl = -1;
  890. mdelay(1);
  891. for (n = HZ; n > 0; --n) {
  892. if (swim3_readbit(fs, SEEK_COMPLETE))
  893. break;
  894. if (signal_pending(current))
  895. break;
  896. swim3_select(fs, RELAX);
  897. schedule_timeout_interruptible(1);
  898. }
  899. ret = swim3_readbit(fs, SEEK_COMPLETE) == 0
  900. || swim3_readbit(fs, DISK_IN) == 0;
  901. if (ret)
  902. swim3_action(fs, MOTOR_OFF);
  903. else {
  904. fs->ejected = 0;
  905. swim3_action(fs, SETMFM);
  906. }
  907. swim3_select(fs, RELAX);
  908. release_drive(fs);
  909. return ret;
  910. }
  911. static struct block_device_operations floppy_fops = {
  912. .open = floppy_open,
  913. .release = floppy_release,
  914. .ioctl = floppy_ioctl,
  915. .media_changed = floppy_check_change,
  916. .revalidate_disk= floppy_revalidate,
  917. };
  918. static int swim3_add_device(struct macio_dev *mdev, int index)
  919. {
  920. struct device_node *swim = mdev->ofdev.node;
  921. struct device_node *mediabay;
  922. struct floppy_state *fs = &floppy_states[index];
  923. int rc = -EBUSY;
  924. /* Check & Request resources */
  925. if (macio_resource_count(mdev) < 2) {
  926. printk(KERN_WARNING "ifd%d: no address for %s\n",
  927. index, swim->full_name);
  928. return -ENXIO;
  929. }
  930. if (macio_irq_count(mdev) < 2) {
  931. printk(KERN_WARNING "fd%d: no intrs for device %s\n",
  932. index, swim->full_name);
  933. }
  934. if (macio_request_resource(mdev, 0, "swim3 (mmio)")) {
  935. printk(KERN_ERR "fd%d: can't request mmio resource for %s\n",
  936. index, swim->full_name);
  937. return -EBUSY;
  938. }
  939. if (macio_request_resource(mdev, 1, "swim3 (dma)")) {
  940. printk(KERN_ERR "fd%d: can't request dma resource for %s\n",
  941. index, swim->full_name);
  942. macio_release_resource(mdev, 0);
  943. return -EBUSY;
  944. }
  945. dev_set_drvdata(&mdev->ofdev.dev, fs);
  946. mediabay = (strcasecmp(swim->parent->type, "media-bay") == 0) ?
  947. swim->parent : NULL;
  948. if (mediabay == NULL)
  949. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1);
  950. memset(fs, 0, sizeof(*fs));
  951. spin_lock_init(&fs->lock);
  952. fs->state = idle;
  953. fs->swim3 = (struct swim3 __iomem *)
  954. ioremap(macio_resource_start(mdev, 0), 0x200);
  955. if (fs->swim3 == NULL) {
  956. printk("fd%d: couldn't map registers for %s\n",
  957. index, swim->full_name);
  958. rc = -ENOMEM;
  959. goto out_release;
  960. }
  961. fs->dma = (struct dbdma_regs __iomem *)
  962. ioremap(macio_resource_start(mdev, 1), 0x200);
  963. if (fs->dma == NULL) {
  964. printk("fd%d: couldn't map DMA for %s\n",
  965. index, swim->full_name);
  966. iounmap(fs->swim3);
  967. rc = -ENOMEM;
  968. goto out_release;
  969. }
  970. fs->swim3_intr = macio_irq(mdev, 0);
  971. fs->dma_intr = macio_irq(mdev, 1);;
  972. fs->cur_cyl = -1;
  973. fs->cur_sector = -1;
  974. fs->secpercyl = 36;
  975. fs->secpertrack = 18;
  976. fs->total_secs = 2880;
  977. fs->media_bay = mediabay;
  978. init_waitqueue_head(&fs->wait);
  979. fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space);
  980. memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd));
  981. st_le16(&fs->dma_cmd[1].command, DBDMA_STOP);
  982. if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) {
  983. printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n",
  984. index, fs->swim3_intr, swim->full_name);
  985. pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0);
  986. goto out_unmap;
  987. return -EBUSY;
  988. }
  989. /*
  990. if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) {
  991. printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA",
  992. fs->dma_intr);
  993. return -EBUSY;
  994. }
  995. */
  996. init_timer(&fs->timeout);
  997. printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count,
  998. mediabay ? "in media bay" : "");
  999. return 0;
  1000. out_unmap:
  1001. iounmap(fs->dma);
  1002. iounmap(fs->swim3);
  1003. out_release:
  1004. macio_release_resource(mdev, 0);
  1005. macio_release_resource(mdev, 1);
  1006. return rc;
  1007. }
  1008. static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match)
  1009. {
  1010. int i, rc;
  1011. struct gendisk *disk;
  1012. /* Add the drive */
  1013. rc = swim3_add_device(mdev, floppy_count);
  1014. if (rc)
  1015. return rc;
  1016. /* Now create the queue if not there yet */
  1017. if (swim3_queue == NULL) {
  1018. /* If we failed, there isn't much we can do as the driver is still
  1019. * too dumb to remove the device, just bail out
  1020. */
  1021. if (register_blkdev(FLOPPY_MAJOR, "fd"))
  1022. return 0;
  1023. swim3_queue = blk_init_queue(do_fd_request, &swim3_lock);
  1024. if (swim3_queue == NULL) {
  1025. unregister_blkdev(FLOPPY_MAJOR, "fd");
  1026. return 0;
  1027. }
  1028. }
  1029. /* Now register that disk. Same comment about failure handling */
  1030. i = floppy_count++;
  1031. disk = disks[i] = alloc_disk(1);
  1032. if (disk == NULL)
  1033. return 0;
  1034. disk->major = FLOPPY_MAJOR;
  1035. disk->first_minor = i;
  1036. disk->fops = &floppy_fops;
  1037. disk->private_data = &floppy_states[i];
  1038. disk->queue = swim3_queue;
  1039. disk->flags |= GENHD_FL_REMOVABLE;
  1040. sprintf(disk->disk_name, "fd%d", i);
  1041. set_capacity(disk, 2880);
  1042. add_disk(disk);
  1043. return 0;
  1044. }
  1045. static struct of_device_id swim3_match[] =
  1046. {
  1047. {
  1048. .name = "swim3",
  1049. },
  1050. {
  1051. .compatible = "ohare-swim3"
  1052. },
  1053. {
  1054. .compatible = "swim3"
  1055. },
  1056. };
  1057. static struct macio_driver swim3_driver =
  1058. {
  1059. .name = "swim3",
  1060. .match_table = swim3_match,
  1061. .probe = swim3_attach,
  1062. #if 0
  1063. .suspend = swim3_suspend,
  1064. .resume = swim3_resume,
  1065. #endif
  1066. };
  1067. int swim3_init(void)
  1068. {
  1069. macio_register_driver(&swim3_driver);
  1070. return 0;
  1071. }
  1072. module_init(swim3_init)
  1073. MODULE_LICENSE("GPL");
  1074. MODULE_AUTHOR("Paul Mackerras");
  1075. MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR);