mmu.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974
  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched.h>
  42. #include <linux/highmem.h>
  43. #include <linux/bug.h>
  44. #include <asm/pgtable.h>
  45. #include <asm/tlbflush.h>
  46. #include <asm/fixmap.h>
  47. #include <asm/mmu_context.h>
  48. #include <asm/paravirt.h>
  49. #include <asm/linkage.h>
  50. #include <asm/xen/hypercall.h>
  51. #include <asm/xen/hypervisor.h>
  52. #include <xen/page.h>
  53. #include <xen/interface/xen.h>
  54. #include "multicalls.h"
  55. #include "mmu.h"
  56. /*
  57. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  58. * redzone above it, so round it up to a PGD boundary.
  59. */
  60. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  61. #define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
  62. #define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
  63. /* Placeholder for holes in the address space */
  64. static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
  65. { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
  66. /* Array of pointers to pages containing p2m entries */
  67. static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
  68. { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
  69. /* Arrays of p2m arrays expressed in mfns used for save/restore */
  70. static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
  71. static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
  72. __page_aligned_bss;
  73. static inline unsigned p2m_top_index(unsigned long pfn)
  74. {
  75. BUG_ON(pfn >= MAX_DOMAIN_PAGES);
  76. return pfn / P2M_ENTRIES_PER_PAGE;
  77. }
  78. static inline unsigned p2m_index(unsigned long pfn)
  79. {
  80. return pfn % P2M_ENTRIES_PER_PAGE;
  81. }
  82. /* Build the parallel p2m_top_mfn structures */
  83. void xen_setup_mfn_list_list(void)
  84. {
  85. unsigned pfn, idx;
  86. for(pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
  87. unsigned topidx = p2m_top_index(pfn);
  88. p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
  89. }
  90. for(idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
  91. unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
  92. p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
  93. }
  94. BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
  95. HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
  96. virt_to_mfn(p2m_top_mfn_list);
  97. HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
  98. }
  99. /* Set up p2m_top to point to the domain-builder provided p2m pages */
  100. void __init xen_build_dynamic_phys_to_machine(void)
  101. {
  102. unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
  103. unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
  104. unsigned pfn;
  105. for(pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
  106. unsigned topidx = p2m_top_index(pfn);
  107. p2m_top[topidx] = &mfn_list[pfn];
  108. }
  109. }
  110. unsigned long get_phys_to_machine(unsigned long pfn)
  111. {
  112. unsigned topidx, idx;
  113. if (unlikely(pfn >= MAX_DOMAIN_PAGES))
  114. return INVALID_P2M_ENTRY;
  115. topidx = p2m_top_index(pfn);
  116. idx = p2m_index(pfn);
  117. return p2m_top[topidx][idx];
  118. }
  119. EXPORT_SYMBOL_GPL(get_phys_to_machine);
  120. static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
  121. {
  122. unsigned long *p;
  123. unsigned i;
  124. p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
  125. BUG_ON(p == NULL);
  126. for(i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
  127. p[i] = INVALID_P2M_ENTRY;
  128. if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
  129. free_page((unsigned long)p);
  130. else
  131. *mfnp = virt_to_mfn(p);
  132. }
  133. void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
  134. {
  135. unsigned topidx, idx;
  136. if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
  137. BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
  138. return;
  139. }
  140. if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
  141. BUG_ON(mfn != INVALID_P2M_ENTRY);
  142. return;
  143. }
  144. topidx = p2m_top_index(pfn);
  145. if (p2m_top[topidx] == p2m_missing) {
  146. /* no need to allocate a page to store an invalid entry */
  147. if (mfn == INVALID_P2M_ENTRY)
  148. return;
  149. alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
  150. }
  151. idx = p2m_index(pfn);
  152. p2m_top[topidx][idx] = mfn;
  153. }
  154. xmaddr_t arbitrary_virt_to_machine(void *vaddr)
  155. {
  156. unsigned long address = (unsigned long)vaddr;
  157. unsigned int level;
  158. pte_t *pte = lookup_address(address, &level);
  159. unsigned offset = address & ~PAGE_MASK;
  160. BUG_ON(pte == NULL);
  161. return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
  162. }
  163. void make_lowmem_page_readonly(void *vaddr)
  164. {
  165. pte_t *pte, ptev;
  166. unsigned long address = (unsigned long)vaddr;
  167. unsigned int level;
  168. pte = lookup_address(address, &level);
  169. BUG_ON(pte == NULL);
  170. ptev = pte_wrprotect(*pte);
  171. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  172. BUG();
  173. }
  174. void make_lowmem_page_readwrite(void *vaddr)
  175. {
  176. pte_t *pte, ptev;
  177. unsigned long address = (unsigned long)vaddr;
  178. unsigned int level;
  179. pte = lookup_address(address, &level);
  180. BUG_ON(pte == NULL);
  181. ptev = pte_mkwrite(*pte);
  182. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  183. BUG();
  184. }
  185. static bool page_pinned(void *ptr)
  186. {
  187. struct page *page = virt_to_page(ptr);
  188. return PagePinned(page);
  189. }
  190. static void extend_mmu_update(const struct mmu_update *update)
  191. {
  192. struct multicall_space mcs;
  193. struct mmu_update *u;
  194. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  195. if (mcs.mc != NULL)
  196. mcs.mc->args[1]++;
  197. else {
  198. mcs = __xen_mc_entry(sizeof(*u));
  199. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  200. }
  201. u = mcs.args;
  202. *u = *update;
  203. }
  204. void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  205. {
  206. struct mmu_update u;
  207. preempt_disable();
  208. xen_mc_batch();
  209. /* ptr may be ioremapped for 64-bit pagetable setup */
  210. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  211. u.val = pmd_val_ma(val);
  212. extend_mmu_update(&u);
  213. xen_mc_issue(PARAVIRT_LAZY_MMU);
  214. preempt_enable();
  215. }
  216. void xen_set_pmd(pmd_t *ptr, pmd_t val)
  217. {
  218. /* If page is not pinned, we can just update the entry
  219. directly */
  220. if (!page_pinned(ptr)) {
  221. *ptr = val;
  222. return;
  223. }
  224. xen_set_pmd_hyper(ptr, val);
  225. }
  226. /*
  227. * Associate a virtual page frame with a given physical page frame
  228. * and protection flags for that frame.
  229. */
  230. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  231. {
  232. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  233. }
  234. void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  235. pte_t *ptep, pte_t pteval)
  236. {
  237. /* updates to init_mm may be done without lock */
  238. if (mm == &init_mm)
  239. preempt_disable();
  240. if (mm == current->mm || mm == &init_mm) {
  241. if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
  242. struct multicall_space mcs;
  243. mcs = xen_mc_entry(0);
  244. MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
  245. xen_mc_issue(PARAVIRT_LAZY_MMU);
  246. goto out;
  247. } else
  248. if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
  249. goto out;
  250. }
  251. xen_set_pte(ptep, pteval);
  252. out:
  253. if (mm == &init_mm)
  254. preempt_enable();
  255. }
  256. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  257. {
  258. /* Just return the pte as-is. We preserve the bits on commit */
  259. return *ptep;
  260. }
  261. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  262. pte_t *ptep, pte_t pte)
  263. {
  264. struct mmu_update u;
  265. xen_mc_batch();
  266. u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  267. u.val = pte_val_ma(pte);
  268. extend_mmu_update(&u);
  269. xen_mc_issue(PARAVIRT_LAZY_MMU);
  270. }
  271. /* Assume pteval_t is equivalent to all the other *val_t types. */
  272. static pteval_t pte_mfn_to_pfn(pteval_t val)
  273. {
  274. if (val & _PAGE_PRESENT) {
  275. unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  276. pteval_t flags = val & PTE_FLAGS_MASK;
  277. val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
  278. }
  279. return val;
  280. }
  281. static pteval_t pte_pfn_to_mfn(pteval_t val)
  282. {
  283. if (val & _PAGE_PRESENT) {
  284. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  285. pteval_t flags = val & PTE_FLAGS_MASK;
  286. val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
  287. }
  288. return val;
  289. }
  290. pteval_t xen_pte_val(pte_t pte)
  291. {
  292. return pte_mfn_to_pfn(pte.pte);
  293. }
  294. pgdval_t xen_pgd_val(pgd_t pgd)
  295. {
  296. return pte_mfn_to_pfn(pgd.pgd);
  297. }
  298. pte_t xen_make_pte(pteval_t pte)
  299. {
  300. pte = pte_pfn_to_mfn(pte);
  301. return native_make_pte(pte);
  302. }
  303. pgd_t xen_make_pgd(pgdval_t pgd)
  304. {
  305. pgd = pte_pfn_to_mfn(pgd);
  306. return native_make_pgd(pgd);
  307. }
  308. pmdval_t xen_pmd_val(pmd_t pmd)
  309. {
  310. return pte_mfn_to_pfn(pmd.pmd);
  311. }
  312. void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  313. {
  314. struct mmu_update u;
  315. preempt_disable();
  316. xen_mc_batch();
  317. /* ptr may be ioremapped for 64-bit pagetable setup */
  318. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  319. u.val = pud_val_ma(val);
  320. extend_mmu_update(&u);
  321. xen_mc_issue(PARAVIRT_LAZY_MMU);
  322. preempt_enable();
  323. }
  324. void xen_set_pud(pud_t *ptr, pud_t val)
  325. {
  326. /* If page is not pinned, we can just update the entry
  327. directly */
  328. if (!page_pinned(ptr)) {
  329. *ptr = val;
  330. return;
  331. }
  332. xen_set_pud_hyper(ptr, val);
  333. }
  334. void xen_set_pte(pte_t *ptep, pte_t pte)
  335. {
  336. #ifdef CONFIG_X86_PAE
  337. ptep->pte_high = pte.pte_high;
  338. smp_wmb();
  339. ptep->pte_low = pte.pte_low;
  340. #else
  341. *ptep = pte;
  342. #endif
  343. }
  344. #ifdef CONFIG_X86_PAE
  345. void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  346. {
  347. set_64bit((u64 *)ptep, native_pte_val(pte));
  348. }
  349. void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  350. {
  351. ptep->pte_low = 0;
  352. smp_wmb(); /* make sure low gets written first */
  353. ptep->pte_high = 0;
  354. }
  355. void xen_pmd_clear(pmd_t *pmdp)
  356. {
  357. set_pmd(pmdp, __pmd(0));
  358. }
  359. #endif /* CONFIG_X86_PAE */
  360. pmd_t xen_make_pmd(pmdval_t pmd)
  361. {
  362. pmd = pte_pfn_to_mfn(pmd);
  363. return native_make_pmd(pmd);
  364. }
  365. #if PAGETABLE_LEVELS == 4
  366. pudval_t xen_pud_val(pud_t pud)
  367. {
  368. return pte_mfn_to_pfn(pud.pud);
  369. }
  370. pud_t xen_make_pud(pudval_t pud)
  371. {
  372. pud = pte_pfn_to_mfn(pud);
  373. return native_make_pud(pud);
  374. }
  375. pgd_t *xen_get_user_pgd(pgd_t *pgd)
  376. {
  377. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  378. unsigned offset = pgd - pgd_page;
  379. pgd_t *user_ptr = NULL;
  380. if (offset < pgd_index(USER_LIMIT)) {
  381. struct page *page = virt_to_page(pgd_page);
  382. user_ptr = (pgd_t *)page->private;
  383. if (user_ptr)
  384. user_ptr += offset;
  385. }
  386. return user_ptr;
  387. }
  388. static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  389. {
  390. struct mmu_update u;
  391. u.ptr = virt_to_machine(ptr).maddr;
  392. u.val = pgd_val_ma(val);
  393. extend_mmu_update(&u);
  394. }
  395. /*
  396. * Raw hypercall-based set_pgd, intended for in early boot before
  397. * there's a page structure. This implies:
  398. * 1. The only existing pagetable is the kernel's
  399. * 2. It is always pinned
  400. * 3. It has no user pagetable attached to it
  401. */
  402. void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  403. {
  404. preempt_disable();
  405. xen_mc_batch();
  406. __xen_set_pgd_hyper(ptr, val);
  407. xen_mc_issue(PARAVIRT_LAZY_MMU);
  408. preempt_enable();
  409. }
  410. void xen_set_pgd(pgd_t *ptr, pgd_t val)
  411. {
  412. pgd_t *user_ptr = xen_get_user_pgd(ptr);
  413. /* If page is not pinned, we can just update the entry
  414. directly */
  415. if (!page_pinned(ptr)) {
  416. *ptr = val;
  417. if (user_ptr) {
  418. WARN_ON(page_pinned(user_ptr));
  419. *user_ptr = val;
  420. }
  421. return;
  422. }
  423. /* If it's pinned, then we can at least batch the kernel and
  424. user updates together. */
  425. xen_mc_batch();
  426. __xen_set_pgd_hyper(ptr, val);
  427. if (user_ptr)
  428. __xen_set_pgd_hyper(user_ptr, val);
  429. xen_mc_issue(PARAVIRT_LAZY_MMU);
  430. }
  431. #endif /* PAGETABLE_LEVELS == 4 */
  432. /*
  433. * (Yet another) pagetable walker. This one is intended for pinning a
  434. * pagetable. This means that it walks a pagetable and calls the
  435. * callback function on each page it finds making up the page table,
  436. * at every level. It walks the entire pagetable, but it only bothers
  437. * pinning pte pages which are below limit. In the normal case this
  438. * will be STACK_TOP_MAX, but at boot we need to pin up to
  439. * FIXADDR_TOP.
  440. *
  441. * For 32-bit the important bit is that we don't pin beyond there,
  442. * because then we start getting into Xen's ptes.
  443. *
  444. * For 64-bit, we must skip the Xen hole in the middle of the address
  445. * space, just after the big x86-64 virtual hole.
  446. */
  447. static int pgd_walk(pgd_t *pgd, int (*func)(struct page *, enum pt_level),
  448. unsigned long limit)
  449. {
  450. int flush = 0;
  451. unsigned hole_low, hole_high;
  452. unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
  453. unsigned pgdidx, pudidx, pmdidx;
  454. /* The limit is the last byte to be touched */
  455. limit--;
  456. BUG_ON(limit >= FIXADDR_TOP);
  457. if (xen_feature(XENFEAT_auto_translated_physmap))
  458. return 0;
  459. /*
  460. * 64-bit has a great big hole in the middle of the address
  461. * space, which contains the Xen mappings. On 32-bit these
  462. * will end up making a zero-sized hole and so is a no-op.
  463. */
  464. hole_low = pgd_index(USER_LIMIT);
  465. hole_high = pgd_index(PAGE_OFFSET);
  466. pgdidx_limit = pgd_index(limit);
  467. #if PTRS_PER_PUD > 1
  468. pudidx_limit = pud_index(limit);
  469. #else
  470. pudidx_limit = 0;
  471. #endif
  472. #if PTRS_PER_PMD > 1
  473. pmdidx_limit = pmd_index(limit);
  474. #else
  475. pmdidx_limit = 0;
  476. #endif
  477. flush |= (*func)(virt_to_page(pgd), PT_PGD);
  478. for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
  479. pud_t *pud;
  480. if (pgdidx >= hole_low && pgdidx < hole_high)
  481. continue;
  482. if (!pgd_val(pgd[pgdidx]))
  483. continue;
  484. pud = pud_offset(&pgd[pgdidx], 0);
  485. if (PTRS_PER_PUD > 1) /* not folded */
  486. flush |= (*func)(virt_to_page(pud), PT_PUD);
  487. for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
  488. pmd_t *pmd;
  489. if (pgdidx == pgdidx_limit &&
  490. pudidx > pudidx_limit)
  491. goto out;
  492. if (pud_none(pud[pudidx]))
  493. continue;
  494. pmd = pmd_offset(&pud[pudidx], 0);
  495. if (PTRS_PER_PMD > 1) /* not folded */
  496. flush |= (*func)(virt_to_page(pmd), PT_PMD);
  497. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
  498. struct page *pte;
  499. if (pgdidx == pgdidx_limit &&
  500. pudidx == pudidx_limit &&
  501. pmdidx > pmdidx_limit)
  502. goto out;
  503. if (pmd_none(pmd[pmdidx]))
  504. continue;
  505. pte = pmd_page(pmd[pmdidx]);
  506. flush |= (*func)(pte, PT_PTE);
  507. }
  508. }
  509. }
  510. out:
  511. return flush;
  512. }
  513. static spinlock_t *lock_pte(struct page *page)
  514. {
  515. spinlock_t *ptl = NULL;
  516. #if NR_CPUS >= CONFIG_SPLIT_PTLOCK_CPUS
  517. ptl = __pte_lockptr(page);
  518. spin_lock(ptl);
  519. #endif
  520. return ptl;
  521. }
  522. static void do_unlock(void *v)
  523. {
  524. spinlock_t *ptl = v;
  525. spin_unlock(ptl);
  526. }
  527. static void xen_do_pin(unsigned level, unsigned long pfn)
  528. {
  529. struct mmuext_op *op;
  530. struct multicall_space mcs;
  531. mcs = __xen_mc_entry(sizeof(*op));
  532. op = mcs.args;
  533. op->cmd = level;
  534. op->arg1.mfn = pfn_to_mfn(pfn);
  535. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  536. }
  537. static int pin_page(struct page *page, enum pt_level level)
  538. {
  539. unsigned pgfl = TestSetPagePinned(page);
  540. int flush;
  541. if (pgfl)
  542. flush = 0; /* already pinned */
  543. else if (PageHighMem(page))
  544. /* kmaps need flushing if we found an unpinned
  545. highpage */
  546. flush = 1;
  547. else {
  548. void *pt = lowmem_page_address(page);
  549. unsigned long pfn = page_to_pfn(page);
  550. struct multicall_space mcs = __xen_mc_entry(0);
  551. spinlock_t *ptl;
  552. flush = 0;
  553. ptl = NULL;
  554. if (level == PT_PTE)
  555. ptl = lock_pte(page);
  556. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  557. pfn_pte(pfn, PAGE_KERNEL_RO),
  558. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  559. if (level == PT_PTE)
  560. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  561. if (ptl) {
  562. /* Queue a deferred unlock for when this batch
  563. is completed. */
  564. xen_mc_callback(do_unlock, ptl);
  565. }
  566. }
  567. return flush;
  568. }
  569. /* This is called just after a mm has been created, but it has not
  570. been used yet. We need to make sure that its pagetable is all
  571. read-only, and can be pinned. */
  572. void xen_pgd_pin(pgd_t *pgd)
  573. {
  574. xen_mc_batch();
  575. if (pgd_walk(pgd, pin_page, USER_LIMIT)) {
  576. /* re-enable interrupts for kmap_flush_unused */
  577. xen_mc_issue(0);
  578. kmap_flush_unused();
  579. xen_mc_batch();
  580. }
  581. #ifdef CONFIG_X86_64
  582. {
  583. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  584. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  585. if (user_pgd) {
  586. pin_page(virt_to_page(user_pgd), PT_PGD);
  587. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(user_pgd)));
  588. }
  589. }
  590. #else /* CONFIG_X86_32 */
  591. #ifdef CONFIG_X86_PAE
  592. /* Need to make sure unshared kernel PMD is pinnable */
  593. pin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
  594. #endif
  595. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  596. #endif /* CONFIG_X86_64 */
  597. xen_mc_issue(0);
  598. }
  599. /*
  600. * On save, we need to pin all pagetables to make sure they get their
  601. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  602. * them (unpinned pgds are not currently in use, probably because the
  603. * process is under construction or destruction).
  604. */
  605. void xen_mm_pin_all(void)
  606. {
  607. unsigned long flags;
  608. struct page *page;
  609. spin_lock_irqsave(&pgd_lock, flags);
  610. list_for_each_entry(page, &pgd_list, lru) {
  611. if (!PagePinned(page)) {
  612. xen_pgd_pin((pgd_t *)page_address(page));
  613. SetPageSavePinned(page);
  614. }
  615. }
  616. spin_unlock_irqrestore(&pgd_lock, flags);
  617. }
  618. /*
  619. * The init_mm pagetable is really pinned as soon as its created, but
  620. * that's before we have page structures to store the bits. So do all
  621. * the book-keeping now.
  622. */
  623. static __init int mark_pinned(struct page *page, enum pt_level level)
  624. {
  625. SetPagePinned(page);
  626. return 0;
  627. }
  628. void __init xen_mark_init_mm_pinned(void)
  629. {
  630. pgd_walk(init_mm.pgd, mark_pinned, FIXADDR_TOP);
  631. }
  632. static int unpin_page(struct page *page, enum pt_level level)
  633. {
  634. unsigned pgfl = TestClearPagePinned(page);
  635. if (pgfl && !PageHighMem(page)) {
  636. void *pt = lowmem_page_address(page);
  637. unsigned long pfn = page_to_pfn(page);
  638. spinlock_t *ptl = NULL;
  639. struct multicall_space mcs;
  640. if (level == PT_PTE) {
  641. ptl = lock_pte(page);
  642. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  643. }
  644. mcs = __xen_mc_entry(0);
  645. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  646. pfn_pte(pfn, PAGE_KERNEL),
  647. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  648. if (ptl) {
  649. /* unlock when batch completed */
  650. xen_mc_callback(do_unlock, ptl);
  651. }
  652. }
  653. return 0; /* never need to flush on unpin */
  654. }
  655. /* Release a pagetables pages back as normal RW */
  656. static void xen_pgd_unpin(pgd_t *pgd)
  657. {
  658. xen_mc_batch();
  659. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  660. #ifdef CONFIG_X86_64
  661. {
  662. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  663. if (user_pgd) {
  664. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(user_pgd)));
  665. unpin_page(virt_to_page(user_pgd), PT_PGD);
  666. }
  667. }
  668. #endif
  669. #ifdef CONFIG_X86_PAE
  670. /* Need to make sure unshared kernel PMD is unpinned */
  671. pin_page(virt_to_page(pgd_page(pgd[pgd_index(TASK_SIZE)])), PT_PMD);
  672. #endif
  673. pgd_walk(pgd, unpin_page, USER_LIMIT);
  674. xen_mc_issue(0);
  675. }
  676. /*
  677. * On resume, undo any pinning done at save, so that the rest of the
  678. * kernel doesn't see any unexpected pinned pagetables.
  679. */
  680. void xen_mm_unpin_all(void)
  681. {
  682. unsigned long flags;
  683. struct page *page;
  684. spin_lock_irqsave(&pgd_lock, flags);
  685. list_for_each_entry(page, &pgd_list, lru) {
  686. if (PageSavePinned(page)) {
  687. BUG_ON(!PagePinned(page));
  688. xen_pgd_unpin((pgd_t *)page_address(page));
  689. ClearPageSavePinned(page);
  690. }
  691. }
  692. spin_unlock_irqrestore(&pgd_lock, flags);
  693. }
  694. void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  695. {
  696. spin_lock(&next->page_table_lock);
  697. xen_pgd_pin(next->pgd);
  698. spin_unlock(&next->page_table_lock);
  699. }
  700. void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  701. {
  702. spin_lock(&mm->page_table_lock);
  703. xen_pgd_pin(mm->pgd);
  704. spin_unlock(&mm->page_table_lock);
  705. }
  706. #ifdef CONFIG_SMP
  707. /* Another cpu may still have their %cr3 pointing at the pagetable, so
  708. we need to repoint it somewhere else before we can unpin it. */
  709. static void drop_other_mm_ref(void *info)
  710. {
  711. struct mm_struct *mm = info;
  712. struct mm_struct *active_mm;
  713. #ifdef CONFIG_X86_64
  714. active_mm = read_pda(active_mm);
  715. #else
  716. active_mm = __get_cpu_var(cpu_tlbstate).active_mm;
  717. #endif
  718. if (active_mm == mm)
  719. leave_mm(smp_processor_id());
  720. /* If this cpu still has a stale cr3 reference, then make sure
  721. it has been flushed. */
  722. if (x86_read_percpu(xen_current_cr3) == __pa(mm->pgd)) {
  723. load_cr3(swapper_pg_dir);
  724. arch_flush_lazy_cpu_mode();
  725. }
  726. }
  727. static void drop_mm_ref(struct mm_struct *mm)
  728. {
  729. cpumask_t mask;
  730. unsigned cpu;
  731. if (current->active_mm == mm) {
  732. if (current->mm == mm)
  733. load_cr3(swapper_pg_dir);
  734. else
  735. leave_mm(smp_processor_id());
  736. arch_flush_lazy_cpu_mode();
  737. }
  738. /* Get the "official" set of cpus referring to our pagetable. */
  739. mask = mm->cpu_vm_mask;
  740. /* It's possible that a vcpu may have a stale reference to our
  741. cr3, because its in lazy mode, and it hasn't yet flushed
  742. its set of pending hypercalls yet. In this case, we can
  743. look at its actual current cr3 value, and force it to flush
  744. if needed. */
  745. for_each_online_cpu(cpu) {
  746. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  747. cpu_set(cpu, mask);
  748. }
  749. if (!cpus_empty(mask))
  750. smp_call_function_mask(mask, drop_other_mm_ref, mm, 1);
  751. }
  752. #else
  753. static void drop_mm_ref(struct mm_struct *mm)
  754. {
  755. if (current->active_mm == mm)
  756. load_cr3(swapper_pg_dir);
  757. }
  758. #endif
  759. /*
  760. * While a process runs, Xen pins its pagetables, which means that the
  761. * hypervisor forces it to be read-only, and it controls all updates
  762. * to it. This means that all pagetable updates have to go via the
  763. * hypervisor, which is moderately expensive.
  764. *
  765. * Since we're pulling the pagetable down, we switch to use init_mm,
  766. * unpin old process pagetable and mark it all read-write, which
  767. * allows further operations on it to be simple memory accesses.
  768. *
  769. * The only subtle point is that another CPU may be still using the
  770. * pagetable because of lazy tlb flushing. This means we need need to
  771. * switch all CPUs off this pagetable before we can unpin it.
  772. */
  773. void xen_exit_mmap(struct mm_struct *mm)
  774. {
  775. get_cpu(); /* make sure we don't move around */
  776. drop_mm_ref(mm);
  777. put_cpu();
  778. spin_lock(&mm->page_table_lock);
  779. /* pgd may not be pinned in the error exit path of execve */
  780. if (page_pinned(mm->pgd))
  781. xen_pgd_unpin(mm->pgd);
  782. spin_unlock(&mm->page_table_lock);
  783. }