sun4d_smp.c 10 KB

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  1. /* sun4d_smp.c: Sparc SS1000/SC2000 SMP support.
  2. *
  3. * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  4. *
  5. * Based on sun4m's smp.c, which is:
  6. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  7. */
  8. #include <asm/head.h>
  9. #include <linux/kernel.h>
  10. #include <linux/sched.h>
  11. #include <linux/threads.h>
  12. #include <linux/smp.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/init.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mm.h>
  18. #include <linux/swap.h>
  19. #include <linux/profile.h>
  20. #include <linux/delay.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/atomic.h>
  23. #include <asm/irq_regs.h>
  24. #include <asm/irq.h>
  25. #include <asm/page.h>
  26. #include <asm/pgalloc.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/oplib.h>
  29. #include <asm/sbus.h>
  30. #include <asm/sbi.h>
  31. #include <asm/tlbflush.h>
  32. #include <asm/cacheflush.h>
  33. #include <asm/cpudata.h>
  34. #include "irq.h"
  35. #define IRQ_CROSS_CALL 15
  36. extern ctxd_t *srmmu_ctx_table_phys;
  37. static volatile int smp_processors_ready = 0;
  38. static int smp_highest_cpu;
  39. extern volatile unsigned long cpu_callin_map[NR_CPUS];
  40. extern cpuinfo_sparc cpu_data[NR_CPUS];
  41. extern unsigned char boot_cpu_id;
  42. extern volatile int smp_process_available;
  43. extern cpumask_t smp_commenced_mask;
  44. extern int __smp4d_processor_id(void);
  45. /* #define SMP_DEBUG */
  46. #ifdef SMP_DEBUG
  47. #define SMP_PRINTK(x) printk x
  48. #else
  49. #define SMP_PRINTK(x)
  50. #endif
  51. static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
  52. {
  53. __asm__ __volatile__("swap [%1], %0\n\t" :
  54. "=&r" (val), "=&r" (ptr) :
  55. "0" (val), "1" (ptr));
  56. return val;
  57. }
  58. static void smp_setup_percpu_timer(void);
  59. extern void cpu_probe(void);
  60. extern void sun4d_distribute_irqs(void);
  61. void __init smp4d_callin(void)
  62. {
  63. int cpuid = hard_smp4d_processor_id();
  64. extern spinlock_t sun4d_imsk_lock;
  65. unsigned long flags;
  66. /* Show we are alive */
  67. cpu_leds[cpuid] = 0x6;
  68. show_leds(cpuid);
  69. /* Enable level15 interrupt, disable level14 interrupt for now */
  70. cc_set_imsk((cc_get_imsk() & ~0x8000) | 0x4000);
  71. local_flush_cache_all();
  72. local_flush_tlb_all();
  73. notify_cpu_starting(cpuid);
  74. /*
  75. * Unblock the master CPU _only_ when the scheduler state
  76. * of all secondary CPUs will be up-to-date, so after
  77. * the SMP initialization the master will be just allowed
  78. * to call the scheduler code.
  79. */
  80. /* Get our local ticker going. */
  81. smp_setup_percpu_timer();
  82. calibrate_delay();
  83. smp_store_cpu_info(cpuid);
  84. local_flush_cache_all();
  85. local_flush_tlb_all();
  86. /* Allow master to continue. */
  87. swap((unsigned long *)&cpu_callin_map[cpuid], 1);
  88. local_flush_cache_all();
  89. local_flush_tlb_all();
  90. cpu_probe();
  91. while((unsigned long)current_set[cpuid] < PAGE_OFFSET)
  92. barrier();
  93. while(current_set[cpuid]->cpu != cpuid)
  94. barrier();
  95. /* Fix idle thread fields. */
  96. __asm__ __volatile__("ld [%0], %%g6\n\t"
  97. : : "r" (&current_set[cpuid])
  98. : "memory" /* paranoid */);
  99. cpu_leds[cpuid] = 0x9;
  100. show_leds(cpuid);
  101. /* Attach to the address space of init_task. */
  102. atomic_inc(&init_mm.mm_count);
  103. current->active_mm = &init_mm;
  104. local_flush_cache_all();
  105. local_flush_tlb_all();
  106. local_irq_enable(); /* We don't allow PIL 14 yet */
  107. while (!cpu_isset(cpuid, smp_commenced_mask))
  108. barrier();
  109. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  110. cc_set_imsk(cc_get_imsk() & ~0x4000); /* Allow PIL 14 as well */
  111. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  112. cpu_set(cpuid, cpu_online_map);
  113. }
  114. extern void init_IRQ(void);
  115. extern void cpu_panic(void);
  116. /*
  117. * Cycle through the processors asking the PROM to start each one.
  118. */
  119. extern struct linux_prom_registers smp_penguin_ctable;
  120. extern unsigned long trapbase_cpu1[];
  121. extern unsigned long trapbase_cpu2[];
  122. extern unsigned long trapbase_cpu3[];
  123. void __init smp4d_boot_cpus(void)
  124. {
  125. if (boot_cpu_id)
  126. current_set[0] = NULL;
  127. smp_setup_percpu_timer();
  128. local_flush_cache_all();
  129. }
  130. int __cpuinit smp4d_boot_one_cpu(int i)
  131. {
  132. extern unsigned long sun4d_cpu_startup;
  133. unsigned long *entry = &sun4d_cpu_startup;
  134. struct task_struct *p;
  135. int timeout;
  136. int cpu_node;
  137. cpu_find_by_instance(i, &cpu_node,NULL);
  138. /* Cook up an idler for this guy. */
  139. p = fork_idle(i);
  140. current_set[i] = task_thread_info(p);
  141. /*
  142. * Initialize the contexts table
  143. * Since the call to prom_startcpu() trashes the structure,
  144. * we need to re-initialize it for each cpu
  145. */
  146. smp_penguin_ctable.which_io = 0;
  147. smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
  148. smp_penguin_ctable.reg_size = 0;
  149. /* whirrr, whirrr, whirrrrrrrrr... */
  150. SMP_PRINTK(("Starting CPU %d at %p \n", i, entry));
  151. local_flush_cache_all();
  152. prom_startcpu(cpu_node,
  153. &smp_penguin_ctable, 0, (char *)entry);
  154. SMP_PRINTK(("prom_startcpu returned :)\n"));
  155. /* wheee... it's going... */
  156. for(timeout = 0; timeout < 10000; timeout++) {
  157. if(cpu_callin_map[i])
  158. break;
  159. udelay(200);
  160. }
  161. if (!(cpu_callin_map[i])) {
  162. printk("Processor %d is stuck.\n", i);
  163. return -ENODEV;
  164. }
  165. local_flush_cache_all();
  166. return 0;
  167. }
  168. void __init smp4d_smp_done(void)
  169. {
  170. int i, first;
  171. int *prev;
  172. /* setup cpu list for irq rotation */
  173. first = 0;
  174. prev = &first;
  175. for (i = 0; i < NR_CPUS; i++)
  176. if (cpu_online(i)) {
  177. *prev = i;
  178. prev = &cpu_data(i).next;
  179. }
  180. *prev = first;
  181. local_flush_cache_all();
  182. /* Free unneeded trap tables */
  183. ClearPageReserved(virt_to_page(trapbase_cpu1));
  184. init_page_count(virt_to_page(trapbase_cpu1));
  185. free_page((unsigned long)trapbase_cpu1);
  186. totalram_pages++;
  187. num_physpages++;
  188. ClearPageReserved(virt_to_page(trapbase_cpu2));
  189. init_page_count(virt_to_page(trapbase_cpu2));
  190. free_page((unsigned long)trapbase_cpu2);
  191. totalram_pages++;
  192. num_physpages++;
  193. ClearPageReserved(virt_to_page(trapbase_cpu3));
  194. init_page_count(virt_to_page(trapbase_cpu3));
  195. free_page((unsigned long)trapbase_cpu3);
  196. totalram_pages++;
  197. num_physpages++;
  198. /* Ok, they are spinning and ready to go. */
  199. smp_processors_ready = 1;
  200. sun4d_distribute_irqs();
  201. }
  202. static struct smp_funcall {
  203. smpfunc_t func;
  204. unsigned long arg1;
  205. unsigned long arg2;
  206. unsigned long arg3;
  207. unsigned long arg4;
  208. unsigned long arg5;
  209. unsigned char processors_in[NR_CPUS]; /* Set when ipi entered. */
  210. unsigned char processors_out[NR_CPUS]; /* Set when ipi exited. */
  211. } ccall_info __attribute__((aligned(8)));
  212. static DEFINE_SPINLOCK(cross_call_lock);
  213. /* Cross calls must be serialized, at least currently. */
  214. static void smp4d_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
  215. unsigned long arg2, unsigned long arg3,
  216. unsigned long arg4)
  217. {
  218. if(smp_processors_ready) {
  219. register int high = smp_highest_cpu;
  220. unsigned long flags;
  221. spin_lock_irqsave(&cross_call_lock, flags);
  222. {
  223. /* If you make changes here, make sure gcc generates proper code... */
  224. register smpfunc_t f asm("i0") = func;
  225. register unsigned long a1 asm("i1") = arg1;
  226. register unsigned long a2 asm("i2") = arg2;
  227. register unsigned long a3 asm("i3") = arg3;
  228. register unsigned long a4 asm("i4") = arg4;
  229. register unsigned long a5 asm("i5") = 0;
  230. __asm__ __volatile__(
  231. "std %0, [%6]\n\t"
  232. "std %2, [%6 + 8]\n\t"
  233. "std %4, [%6 + 16]\n\t" : :
  234. "r"(f), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
  235. "r" (&ccall_info.func));
  236. }
  237. /* Init receive/complete mapping, plus fire the IPI's off. */
  238. {
  239. register int i;
  240. cpu_clear(smp_processor_id(), mask);
  241. cpus_and(mask, cpu_online_map, mask);
  242. for(i = 0; i <= high; i++) {
  243. if (cpu_isset(i, mask)) {
  244. ccall_info.processors_in[i] = 0;
  245. ccall_info.processors_out[i] = 0;
  246. sun4d_send_ipi(i, IRQ_CROSS_CALL);
  247. }
  248. }
  249. }
  250. {
  251. register int i;
  252. i = 0;
  253. do {
  254. if (!cpu_isset(i, mask))
  255. continue;
  256. while(!ccall_info.processors_in[i])
  257. barrier();
  258. } while(++i <= high);
  259. i = 0;
  260. do {
  261. if (!cpu_isset(i, mask))
  262. continue;
  263. while(!ccall_info.processors_out[i])
  264. barrier();
  265. } while(++i <= high);
  266. }
  267. spin_unlock_irqrestore(&cross_call_lock, flags);
  268. }
  269. }
  270. /* Running cross calls. */
  271. void smp4d_cross_call_irq(void)
  272. {
  273. int i = hard_smp4d_processor_id();
  274. ccall_info.processors_in[i] = 1;
  275. ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
  276. ccall_info.arg4, ccall_info.arg5);
  277. ccall_info.processors_out[i] = 1;
  278. }
  279. void smp4d_percpu_timer_interrupt(struct pt_regs *regs)
  280. {
  281. struct pt_regs *old_regs;
  282. int cpu = hard_smp4d_processor_id();
  283. static int cpu_tick[NR_CPUS];
  284. static char led_mask[] = { 0xe, 0xd, 0xb, 0x7, 0xb, 0xd };
  285. old_regs = set_irq_regs(regs);
  286. bw_get_prof_limit(cpu);
  287. bw_clear_intr_mask(0, 1); /* INTR_TABLE[0] & 1 is Profile IRQ */
  288. cpu_tick[cpu]++;
  289. if (!(cpu_tick[cpu] & 15)) {
  290. if (cpu_tick[cpu] == 0x60)
  291. cpu_tick[cpu] = 0;
  292. cpu_leds[cpu] = led_mask[cpu_tick[cpu] >> 4];
  293. show_leds(cpu);
  294. }
  295. profile_tick(CPU_PROFILING);
  296. if(!--prof_counter(cpu)) {
  297. int user = user_mode(regs);
  298. irq_enter();
  299. update_process_times(user);
  300. irq_exit();
  301. prof_counter(cpu) = prof_multiplier(cpu);
  302. }
  303. set_irq_regs(old_regs);
  304. }
  305. extern unsigned int lvl14_resolution;
  306. static void __init smp_setup_percpu_timer(void)
  307. {
  308. int cpu = hard_smp4d_processor_id();
  309. prof_counter(cpu) = prof_multiplier(cpu) = 1;
  310. load_profile_irq(cpu, lvl14_resolution);
  311. }
  312. void __init smp4d_blackbox_id(unsigned *addr)
  313. {
  314. int rd = *addr & 0x3e000000;
  315. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  316. addr[1] = 0x01000000; /* nop */
  317. addr[2] = 0x01000000; /* nop */
  318. }
  319. void __init smp4d_blackbox_current(unsigned *addr)
  320. {
  321. int rd = *addr & 0x3e000000;
  322. addr[0] = 0xc0800800 | rd; /* lda [%g0] ASI_M_VIKING_TMP1, reg */
  323. addr[2] = 0x81282002 | rd | (rd >> 11); /* sll reg, 2, reg */
  324. addr[4] = 0x01000000; /* nop */
  325. }
  326. void __init sun4d_init_smp(void)
  327. {
  328. int i;
  329. extern unsigned int t_nmi[], linux_trap_ipi15_sun4d[], linux_trap_ipi15_sun4m[];
  330. /* Patch ipi15 trap table */
  331. t_nmi[1] = t_nmi[1] + (linux_trap_ipi15_sun4d - linux_trap_ipi15_sun4m);
  332. /* And set btfixup... */
  333. BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4d_blackbox_id);
  334. BTFIXUPSET_BLACKBOX(load_current, smp4d_blackbox_current);
  335. BTFIXUPSET_CALL(smp_cross_call, smp4d_cross_call, BTFIXUPCALL_NORM);
  336. BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4d_processor_id, BTFIXUPCALL_NORM);
  337. for (i = 0; i < NR_CPUS; i++) {
  338. ccall_info.processors_in[i] = 1;
  339. ccall_info.processors_out[i] = 1;
  340. }
  341. }