cf-enabler.c 4.1 KB

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  1. /* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
  2. *
  3. * linux/drivers/block/cf-enabler.c
  4. *
  5. * Copyright (C) 1999 Niibe Yutaka
  6. * Copyright (C) 2000 Toshiharu Nozawa
  7. * Copyright (C) 2001 A&D Co., Ltd.
  8. *
  9. * Enable the CF configuration.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/mm.h>
  13. #include <linux/vmalloc.h>
  14. #include <linux/interrupt.h>
  15. #include <asm/io.h>
  16. #include <asm/irq.h>
  17. /*
  18. * You can connect Compact Flash directly to the bus of SuperH.
  19. * This is the enabler for that.
  20. *
  21. * SIM: How generic is this really? It looks pretty board, or at
  22. * least SH sub-type, specific to me.
  23. * I know it doesn't work on the Overdrive!
  24. */
  25. /*
  26. * 0xB8000000 : Attribute
  27. * 0xB8001000 : Common Memory
  28. * 0xBA000000 : I/O
  29. */
  30. #if defined(CONFIG_CPU_SH4)
  31. /* SH4 can't access PCMCIA interface through P2 area.
  32. * we must remap it with appropriate attribute bit of the page set.
  33. * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
  34. #if defined(CONFIG_CF_AREA6)
  35. #define slot_no 0
  36. #else
  37. #define slot_no 1
  38. #endif
  39. /* use this pointer to access to directly connected compact flash io area*/
  40. void *cf_io_base;
  41. static int __init allocate_cf_area(void)
  42. {
  43. pgprot_t prot;
  44. unsigned long paddrbase, psize;
  45. /* open I/O area window */
  46. paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
  47. psize = PAGE_SIZE;
  48. prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
  49. cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
  50. if (!cf_io_base) {
  51. printk("allocate_cf_area : can't open CF I/O window!\n");
  52. return -ENOMEM;
  53. }
  54. /* printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
  55. paddrbase, psize, prot.pgprot, cf_io_base);*/
  56. /* XXX : do we need attribute and common-memory area also? */
  57. return 0;
  58. }
  59. #endif
  60. static int __init cf_init_default(void)
  61. {
  62. /* You must have enabled the card, and set the level interrupt
  63. * before reaching this point. Possibly in boot ROM or boot loader.
  64. */
  65. #if defined(CONFIG_CPU_SH4)
  66. allocate_cf_area();
  67. #endif
  68. return 0;
  69. }
  70. #if defined(CONFIG_SH_SOLUTION_ENGINE)
  71. #include <mach-se/mach/se.h>
  72. #elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
  73. #include <mach-se/mach/se7722.h>
  74. #elif defined(CONFIG_SH_7721_SOLUTION_ENGINE)
  75. #include <mach-se/mach/se7721.h>
  76. #endif
  77. /*
  78. * SolutionEngine Seriese
  79. *
  80. * about MS770xSE
  81. * 0xB8400000 : Common Memory
  82. * 0xB8500000 : Attribute
  83. * 0xB8600000 : I/O
  84. *
  85. * about MS7722SE
  86. * 0xB0400000 : Common Memory
  87. * 0xB0500000 : Attribute
  88. * 0xB0600000 : I/O
  89. */
  90. #if defined(CONFIG_SH_SOLUTION_ENGINE) || \
  91. defined(CONFIG_SH_7722_SOLUTION_ENGINE) || \
  92. defined(CONFIG_SH_7721_SOLUTION_ENGINE)
  93. static int __init cf_init_se(void)
  94. {
  95. if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
  96. return 0; /* Not detected */
  97. if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
  98. ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
  99. } else {
  100. ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
  101. }
  102. /*
  103. * PC-Card window open
  104. * flag == COMMON/ATTRIBUTE/IO
  105. */
  106. /* common window open */
  107. ctrl_outw(0x8a84, MRSHPC_MW0CR1);
  108. if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  109. /* common mode & bus width 16bit SWAP = 1*/
  110. ctrl_outw(0x0b00, MRSHPC_MW0CR2);
  111. else
  112. /* common mode & bus width 16bit SWAP = 0*/
  113. ctrl_outw(0x0300, MRSHPC_MW0CR2);
  114. /* attribute window open */
  115. ctrl_outw(0x8a85, MRSHPC_MW1CR1);
  116. if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  117. /* attribute mode & bus width 16bit SWAP = 1*/
  118. ctrl_outw(0x0a00, MRSHPC_MW1CR2);
  119. else
  120. /* attribute mode & bus width 16bit SWAP = 0*/
  121. ctrl_outw(0x0200, MRSHPC_MW1CR2);
  122. /* I/O window open */
  123. ctrl_outw(0x8a86, MRSHPC_IOWCR1);
  124. ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */
  125. if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
  126. ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
  127. else
  128. ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
  129. ctrl_outw(0x2000, MRSHPC_ICR);
  130. ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
  131. ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
  132. return 0;
  133. }
  134. #else
  135. static int __init cf_init_se(void)
  136. {
  137. return -1;
  138. }
  139. #endif
  140. static int __init cf_init(void)
  141. {
  142. if (mach_is_se() || mach_is_7722se() || mach_is_7721se())
  143. return cf_init_se();
  144. return cf_init_default();
  145. }
  146. __initcall (cf_init);