lcd_qvga.c 4.9 KB

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  1. /*
  2. * Support for SuperH MigoR Quarter VGA LCD Panel
  3. *
  4. * Copyright (C) 2008 Magnus Damm
  5. *
  6. * Based on lcd_powertip.c from Kenati Technologies Pvt Ltd.
  7. * Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>,
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/delay.h>
  14. #include <linux/err.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <asm/sh_mobile_lcdc.h>
  20. #include <asm/migor.h>
  21. /* LCD Module is a PH240320T according to board schematics. This module
  22. * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?)
  23. * Driver IC. This IC is connected to the SH7722 built-in LCDC using a
  24. * SYS-80 interface configured in 16 bit mode.
  25. *
  26. * Index 0: "Device Code Read" returns 0x1505.
  27. */
  28. static void reset_lcd_module(void)
  29. {
  30. ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR);
  31. mdelay(2);
  32. ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR);
  33. mdelay(1);
  34. }
  35. /* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */
  36. static unsigned long adjust_reg18(unsigned short data)
  37. {
  38. unsigned long tmp1, tmp2;
  39. tmp1 = (data<<1 | 0x00000001) & 0x000001FF;
  40. tmp2 = (data<<2 | 0x00000200) & 0x0003FE00;
  41. return tmp1 | tmp2;
  42. }
  43. static void write_reg(void *sys_ops_handle,
  44. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  45. unsigned short reg, unsigned short data)
  46. {
  47. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data));
  48. }
  49. static void write_reg16(void *sys_ops_handle,
  50. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  51. unsigned short reg, unsigned short data)
  52. {
  53. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
  54. sys_ops->write_data(sys_ops_handle, adjust_reg18(data));
  55. }
  56. static unsigned long read_reg16(void *sys_ops_handle,
  57. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  58. unsigned short reg)
  59. {
  60. unsigned long data;
  61. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
  62. data = sys_ops->read_data(sys_ops_handle);
  63. return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00);
  64. }
  65. static void migor_lcd_qvga_seq(void *sys_ops_handle,
  66. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  67. unsigned short const *data, int no_data)
  68. {
  69. int i;
  70. for (i = 0; i < no_data; i += 2)
  71. write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]);
  72. }
  73. static const unsigned short sync_data[] = {
  74. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  75. };
  76. static const unsigned short magic0_data[] = {
  77. 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001,
  78. 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116,
  79. 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8,
  80. };
  81. static const unsigned short magic1_data[] = {
  82. 0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202,
  83. 0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303,
  84. 0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102,
  85. 0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300,
  86. 0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000,
  87. 0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000,
  88. 0x0015, 0x8000,
  89. };
  90. static const unsigned short magic2_data[] = {
  91. 0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021,
  92. };
  93. static const unsigned short magic3_data[] = {
  94. 0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
  95. };
  96. int migor_lcd_qvga_setup(void *board_data, void *sohandle,
  97. struct sh_mobile_lcdc_sys_bus_ops *so)
  98. {
  99. unsigned long xres = 320;
  100. unsigned long yres = 240;
  101. int k;
  102. reset_lcd_module();
  103. migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
  104. if (read_reg16(sohandle, so, 0) != 0x1505)
  105. return -ENODEV;
  106. pr_info("Migo-R QVGA LCD Module detected.\n");
  107. migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
  108. write_reg16(sohandle, so, 0x00A4, 0x0001);
  109. mdelay(10);
  110. migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data));
  111. mdelay(100);
  112. migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data));
  113. write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1));
  114. write_reg16(sohandle, so, 0x0051, 0x00ef);
  115. write_reg16(sohandle, so, 0x0052, 0x0000);
  116. write_reg16(sohandle, so, 0x0053, xres - 1);
  117. migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data));
  118. mdelay(10);
  119. migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data));
  120. mdelay(40);
  121. /* clear GRAM to avoid displaying garbage */
  122. write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */
  123. write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */
  124. for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */
  125. write_reg16(sohandle, so, 0x0022, 0x0000);
  126. write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */
  127. write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */
  128. write_reg16(sohandle, so, 0x0007, 0x0173);
  129. mdelay(40);
  130. /* enable display */
  131. write_reg(sohandle, so, 0x00, 0x22);
  132. mdelay(100);
  133. return 0;
  134. }