traps.c 23 KB

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  1. /*
  2. * arch/s390/kernel/traps.c
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  8. *
  9. * Derived from "arch/i386/kernel/traps.c"
  10. * Copyright (C) 1991, 1992 Linus Torvalds
  11. */
  12. /*
  13. * 'Traps.c' handles hardware traps and faults after we have saved some
  14. * state in 'asm.s'.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/timer.h>
  22. #include <linux/mm.h>
  23. #include <linux/smp.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/delay.h>
  28. #include <linux/module.h>
  29. #include <linux/kdebug.h>
  30. #include <linux/kallsyms.h>
  31. #include <linux/reboot.h>
  32. #include <linux/kprobes.h>
  33. #include <linux/bug.h>
  34. #include <linux/utsname.h>
  35. #include <asm/system.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/io.h>
  38. #include <asm/atomic.h>
  39. #include <asm/mathemu.h>
  40. #include <asm/cpcmd.h>
  41. #include <asm/s390_ext.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/debug.h>
  44. #include "entry.h"
  45. pgm_check_handler_t *pgm_check_table[128];
  46. #ifdef CONFIG_SYSCTL
  47. #ifdef CONFIG_PROCESS_DEBUG
  48. int sysctl_userprocess_debug = 1;
  49. #else
  50. int sysctl_userprocess_debug = 0;
  51. #endif
  52. #endif
  53. extern pgm_check_handler_t do_protection_exception;
  54. extern pgm_check_handler_t do_dat_exception;
  55. extern pgm_check_handler_t do_asce_exception;
  56. #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
  57. #ifndef CONFIG_64BIT
  58. #define FOURLONG "%08lx %08lx %08lx %08lx\n"
  59. static int kstack_depth_to_print = 12;
  60. #else /* CONFIG_64BIT */
  61. #define FOURLONG "%016lx %016lx %016lx %016lx\n"
  62. static int kstack_depth_to_print = 20;
  63. #endif /* CONFIG_64BIT */
  64. /*
  65. * For show_trace we have tree different stack to consider:
  66. * - the panic stack which is used if the kernel stack has overflown
  67. * - the asynchronous interrupt stack (cpu related)
  68. * - the synchronous kernel stack (process related)
  69. * The stack trace can start at any of the three stack and can potentially
  70. * touch all of them. The order is: panic stack, async stack, sync stack.
  71. */
  72. static unsigned long
  73. __show_trace(unsigned long sp, unsigned long low, unsigned long high)
  74. {
  75. struct stack_frame *sf;
  76. struct pt_regs *regs;
  77. while (1) {
  78. sp = sp & PSW_ADDR_INSN;
  79. if (sp < low || sp > high - sizeof(*sf))
  80. return sp;
  81. sf = (struct stack_frame *) sp;
  82. printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  83. print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
  84. /* Follow the backchain. */
  85. while (1) {
  86. low = sp;
  87. sp = sf->back_chain & PSW_ADDR_INSN;
  88. if (!sp)
  89. break;
  90. if (sp <= low || sp > high - sizeof(*sf))
  91. return sp;
  92. sf = (struct stack_frame *) sp;
  93. printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  94. print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
  95. }
  96. /* Zero backchain detected, check for interrupt frame. */
  97. sp = (unsigned long) (sf + 1);
  98. if (sp <= low || sp > high - sizeof(*regs))
  99. return sp;
  100. regs = (struct pt_regs *) sp;
  101. printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
  102. print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
  103. low = sp;
  104. sp = regs->gprs[15];
  105. }
  106. }
  107. static void show_trace(struct task_struct *task, unsigned long *stack)
  108. {
  109. register unsigned long __r15 asm ("15");
  110. unsigned long sp;
  111. sp = (unsigned long) stack;
  112. if (!sp)
  113. sp = task ? task->thread.ksp : __r15;
  114. printk("Call Trace:\n");
  115. #ifdef CONFIG_CHECK_STACK
  116. sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
  117. S390_lowcore.panic_stack);
  118. #endif
  119. sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
  120. S390_lowcore.async_stack);
  121. if (task)
  122. __show_trace(sp, (unsigned long) task_stack_page(task),
  123. (unsigned long) task_stack_page(task) + THREAD_SIZE);
  124. else
  125. __show_trace(sp, S390_lowcore.thread_info,
  126. S390_lowcore.thread_info + THREAD_SIZE);
  127. if (!task)
  128. task = current;
  129. debug_show_held_locks(task);
  130. }
  131. void show_stack(struct task_struct *task, unsigned long *sp)
  132. {
  133. register unsigned long * __r15 asm ("15");
  134. unsigned long *stack;
  135. int i;
  136. if (!sp)
  137. stack = task ? (unsigned long *) task->thread.ksp : __r15;
  138. else
  139. stack = sp;
  140. for (i = 0; i < kstack_depth_to_print; i++) {
  141. if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
  142. break;
  143. if (i && ((i * sizeof (long) % 32) == 0))
  144. printk("\n ");
  145. printk("%p ", (void *)*stack++);
  146. }
  147. printk("\n");
  148. show_trace(task, sp);
  149. }
  150. static void show_last_breaking_event(struct pt_regs *regs)
  151. {
  152. #ifdef CONFIG_64BIT
  153. printk("Last Breaking-Event-Address:\n");
  154. printk(" [<%016lx>] ", regs->args[0] & PSW_ADDR_INSN);
  155. print_symbol("%s\n", regs->args[0] & PSW_ADDR_INSN);
  156. #endif
  157. }
  158. /*
  159. * The architecture-independent dump_stack generator
  160. */
  161. void dump_stack(void)
  162. {
  163. printk("CPU: %d %s %s %.*s\n",
  164. task_thread_info(current)->cpu, print_tainted(),
  165. init_utsname()->release,
  166. (int)strcspn(init_utsname()->version, " "),
  167. init_utsname()->version);
  168. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  169. current->comm, current->pid, current,
  170. (void *) current->thread.ksp);
  171. show_stack(NULL, NULL);
  172. }
  173. EXPORT_SYMBOL(dump_stack);
  174. static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
  175. {
  176. return (regs->psw.mask & bits) / ((~bits + 1) & bits);
  177. }
  178. void show_registers(struct pt_regs *regs)
  179. {
  180. char *mode;
  181. mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
  182. printk("%s PSW : %p %p",
  183. mode, (void *) regs->psw.mask,
  184. (void *) regs->psw.addr);
  185. print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
  186. printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
  187. "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
  188. mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
  189. mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
  190. mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
  191. mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
  192. mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
  193. #ifdef CONFIG_64BIT
  194. printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
  195. #endif
  196. printk("\n%s GPRS: " FOURLONG, mode,
  197. regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
  198. printk(" " FOURLONG,
  199. regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
  200. printk(" " FOURLONG,
  201. regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
  202. printk(" " FOURLONG,
  203. regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
  204. show_code(regs);
  205. }
  206. void show_regs(struct pt_regs *regs)
  207. {
  208. print_modules();
  209. printk("CPU: %d %s %s %.*s\n",
  210. task_thread_info(current)->cpu, print_tainted(),
  211. init_utsname()->release,
  212. (int)strcspn(init_utsname()->version, " "),
  213. init_utsname()->version);
  214. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  215. current->comm, current->pid, current,
  216. (void *) current->thread.ksp);
  217. show_registers(regs);
  218. /* Show stack backtrace if pt_regs is from kernel mode */
  219. if (!(regs->psw.mask & PSW_MASK_PSTATE))
  220. show_trace(NULL, (unsigned long *) regs->gprs[15]);
  221. show_last_breaking_event(regs);
  222. }
  223. /* This is called from fs/proc/array.c */
  224. void task_show_regs(struct seq_file *m, struct task_struct *task)
  225. {
  226. struct pt_regs *regs;
  227. regs = task_pt_regs(task);
  228. seq_printf(m, "task: %p, ksp: %p\n",
  229. task, (void *)task->thread.ksp);
  230. seq_printf(m, "User PSW : %p %p\n",
  231. (void *) regs->psw.mask, (void *)regs->psw.addr);
  232. seq_printf(m, "User GPRS: " FOURLONG,
  233. regs->gprs[0], regs->gprs[1],
  234. regs->gprs[2], regs->gprs[3]);
  235. seq_printf(m, " " FOURLONG,
  236. regs->gprs[4], regs->gprs[5],
  237. regs->gprs[6], regs->gprs[7]);
  238. seq_printf(m, " " FOURLONG,
  239. regs->gprs[8], regs->gprs[9],
  240. regs->gprs[10], regs->gprs[11]);
  241. seq_printf(m, " " FOURLONG,
  242. regs->gprs[12], regs->gprs[13],
  243. regs->gprs[14], regs->gprs[15]);
  244. seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
  245. task->thread.acrs[0], task->thread.acrs[1],
  246. task->thread.acrs[2], task->thread.acrs[3]);
  247. seq_printf(m, " %08x %08x %08x %08x\n",
  248. task->thread.acrs[4], task->thread.acrs[5],
  249. task->thread.acrs[6], task->thread.acrs[7]);
  250. seq_printf(m, " %08x %08x %08x %08x\n",
  251. task->thread.acrs[8], task->thread.acrs[9],
  252. task->thread.acrs[10], task->thread.acrs[11]);
  253. seq_printf(m, " %08x %08x %08x %08x\n",
  254. task->thread.acrs[12], task->thread.acrs[13],
  255. task->thread.acrs[14], task->thread.acrs[15]);
  256. }
  257. static DEFINE_SPINLOCK(die_lock);
  258. void die(const char * str, struct pt_regs * regs, long err)
  259. {
  260. static int die_counter;
  261. oops_enter();
  262. debug_stop_all();
  263. console_verbose();
  264. spin_lock_irq(&die_lock);
  265. bust_spinlocks(1);
  266. printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
  267. #ifdef CONFIG_PREEMPT
  268. printk("PREEMPT ");
  269. #endif
  270. #ifdef CONFIG_SMP
  271. printk("SMP ");
  272. #endif
  273. #ifdef CONFIG_DEBUG_PAGEALLOC
  274. printk("DEBUG_PAGEALLOC");
  275. #endif
  276. printk("\n");
  277. notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
  278. show_regs(regs);
  279. bust_spinlocks(0);
  280. add_taint(TAINT_DIE);
  281. spin_unlock_irq(&die_lock);
  282. if (in_interrupt())
  283. panic("Fatal exception in interrupt");
  284. if (panic_on_oops)
  285. panic("Fatal exception: panic_on_oops");
  286. oops_exit();
  287. do_exit(SIGSEGV);
  288. }
  289. static void inline
  290. report_user_fault(long interruption_code, struct pt_regs *regs)
  291. {
  292. #if defined(CONFIG_SYSCTL)
  293. if (!sysctl_userprocess_debug)
  294. return;
  295. #endif
  296. #if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
  297. printk("User process fault: interruption code 0x%lX\n",
  298. interruption_code);
  299. show_regs(regs);
  300. #endif
  301. }
  302. int is_valid_bugaddr(unsigned long addr)
  303. {
  304. return 1;
  305. }
  306. static void __kprobes inline do_trap(long interruption_code, int signr,
  307. char *str, struct pt_regs *regs,
  308. siginfo_t *info)
  309. {
  310. /*
  311. * We got all needed information from the lowcore and can
  312. * now safely switch on interrupts.
  313. */
  314. if (regs->psw.mask & PSW_MASK_PSTATE)
  315. local_irq_enable();
  316. if (notify_die(DIE_TRAP, str, regs, interruption_code,
  317. interruption_code, signr) == NOTIFY_STOP)
  318. return;
  319. if (regs->psw.mask & PSW_MASK_PSTATE) {
  320. struct task_struct *tsk = current;
  321. tsk->thread.trap_no = interruption_code & 0xffff;
  322. force_sig_info(signr, info, tsk);
  323. report_user_fault(interruption_code, regs);
  324. } else {
  325. const struct exception_table_entry *fixup;
  326. fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
  327. if (fixup)
  328. regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
  329. else {
  330. enum bug_trap_type btt;
  331. btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
  332. if (btt == BUG_TRAP_TYPE_WARN)
  333. return;
  334. die(str, regs, interruption_code);
  335. }
  336. }
  337. }
  338. static inline void __user *get_check_address(struct pt_regs *regs)
  339. {
  340. return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
  341. }
  342. void __kprobes do_single_step(struct pt_regs *regs)
  343. {
  344. if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
  345. SIGTRAP) == NOTIFY_STOP){
  346. return;
  347. }
  348. if ((current->ptrace & PT_PTRACED) != 0)
  349. force_sig(SIGTRAP, current);
  350. }
  351. static void default_trap_handler(struct pt_regs * regs, long interruption_code)
  352. {
  353. if (regs->psw.mask & PSW_MASK_PSTATE) {
  354. local_irq_enable();
  355. do_exit(SIGSEGV);
  356. report_user_fault(interruption_code, regs);
  357. } else
  358. die("Unknown program exception", regs, interruption_code);
  359. }
  360. #define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
  361. static void name(struct pt_regs * regs, long interruption_code) \
  362. { \
  363. siginfo_t info; \
  364. info.si_signo = signr; \
  365. info.si_errno = 0; \
  366. info.si_code = sicode; \
  367. info.si_addr = siaddr; \
  368. do_trap(interruption_code, signr, str, regs, &info); \
  369. }
  370. DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
  371. ILL_ILLADR, get_check_address(regs))
  372. DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
  373. ILL_ILLOPN, get_check_address(regs))
  374. DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
  375. FPE_INTDIV, get_check_address(regs))
  376. DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
  377. FPE_INTOVF, get_check_address(regs))
  378. DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
  379. FPE_FLTOVF, get_check_address(regs))
  380. DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
  381. FPE_FLTUND, get_check_address(regs))
  382. DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
  383. FPE_FLTRES, get_check_address(regs))
  384. DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
  385. FPE_FLTDIV, get_check_address(regs))
  386. DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
  387. FPE_FLTINV, get_check_address(regs))
  388. DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
  389. ILL_ILLOPN, get_check_address(regs))
  390. DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
  391. ILL_PRVOPC, get_check_address(regs))
  392. DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
  393. ILL_ILLOPN, get_check_address(regs))
  394. DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
  395. ILL_ILLOPN, get_check_address(regs))
  396. static inline void
  397. do_fp_trap(struct pt_regs *regs, void __user *location,
  398. int fpc, long interruption_code)
  399. {
  400. siginfo_t si;
  401. si.si_signo = SIGFPE;
  402. si.si_errno = 0;
  403. si.si_addr = location;
  404. si.si_code = 0;
  405. /* FPC[2] is Data Exception Code */
  406. if ((fpc & 0x00000300) == 0) {
  407. /* bits 6 and 7 of DXC are 0 iff IEEE exception */
  408. if (fpc & 0x8000) /* invalid fp operation */
  409. si.si_code = FPE_FLTINV;
  410. else if (fpc & 0x4000) /* div by 0 */
  411. si.si_code = FPE_FLTDIV;
  412. else if (fpc & 0x2000) /* overflow */
  413. si.si_code = FPE_FLTOVF;
  414. else if (fpc & 0x1000) /* underflow */
  415. si.si_code = FPE_FLTUND;
  416. else if (fpc & 0x0800) /* inexact */
  417. si.si_code = FPE_FLTRES;
  418. }
  419. current->thread.ieee_instruction_pointer = (addr_t) location;
  420. do_trap(interruption_code, SIGFPE,
  421. "floating point exception", regs, &si);
  422. }
  423. static void illegal_op(struct pt_regs * regs, long interruption_code)
  424. {
  425. siginfo_t info;
  426. __u8 opcode[6];
  427. __u16 __user *location;
  428. int signal = 0;
  429. location = get_check_address(regs);
  430. /*
  431. * We got all needed information from the lowcore and can
  432. * now safely switch on interrupts.
  433. */
  434. if (regs->psw.mask & PSW_MASK_PSTATE)
  435. local_irq_enable();
  436. if (regs->psw.mask & PSW_MASK_PSTATE) {
  437. if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
  438. return;
  439. if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
  440. if (current->ptrace & PT_PTRACED)
  441. force_sig(SIGTRAP, current);
  442. else
  443. signal = SIGILL;
  444. #ifdef CONFIG_MATHEMU
  445. } else if (opcode[0] == 0xb3) {
  446. if (get_user(*((__u16 *) (opcode+2)), location+1))
  447. return;
  448. signal = math_emu_b3(opcode, regs);
  449. } else if (opcode[0] == 0xed) {
  450. if (get_user(*((__u32 *) (opcode+2)),
  451. (__u32 __user *)(location+1)))
  452. return;
  453. signal = math_emu_ed(opcode, regs);
  454. } else if (*((__u16 *) opcode) == 0xb299) {
  455. if (get_user(*((__u16 *) (opcode+2)), location+1))
  456. return;
  457. signal = math_emu_srnm(opcode, regs);
  458. } else if (*((__u16 *) opcode) == 0xb29c) {
  459. if (get_user(*((__u16 *) (opcode+2)), location+1))
  460. return;
  461. signal = math_emu_stfpc(opcode, regs);
  462. } else if (*((__u16 *) opcode) == 0xb29d) {
  463. if (get_user(*((__u16 *) (opcode+2)), location+1))
  464. return;
  465. signal = math_emu_lfpc(opcode, regs);
  466. #endif
  467. } else
  468. signal = SIGILL;
  469. } else {
  470. /*
  471. * If we get an illegal op in kernel mode, send it through the
  472. * kprobes notifier. If kprobes doesn't pick it up, SIGILL
  473. */
  474. if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
  475. 3, SIGTRAP) != NOTIFY_STOP)
  476. signal = SIGILL;
  477. }
  478. #ifdef CONFIG_MATHEMU
  479. if (signal == SIGFPE)
  480. do_fp_trap(regs, location,
  481. current->thread.fp_regs.fpc, interruption_code);
  482. else if (signal == SIGSEGV) {
  483. info.si_signo = signal;
  484. info.si_errno = 0;
  485. info.si_code = SEGV_MAPERR;
  486. info.si_addr = (void __user *) location;
  487. do_trap(interruption_code, signal,
  488. "user address fault", regs, &info);
  489. } else
  490. #endif
  491. if (signal) {
  492. info.si_signo = signal;
  493. info.si_errno = 0;
  494. info.si_code = ILL_ILLOPC;
  495. info.si_addr = (void __user *) location;
  496. do_trap(interruption_code, signal,
  497. "illegal operation", regs, &info);
  498. }
  499. }
  500. #ifdef CONFIG_MATHEMU
  501. asmlinkage void
  502. specification_exception(struct pt_regs * regs, long interruption_code)
  503. {
  504. __u8 opcode[6];
  505. __u16 __user *location = NULL;
  506. int signal = 0;
  507. location = (__u16 __user *) get_check_address(regs);
  508. /*
  509. * We got all needed information from the lowcore and can
  510. * now safely switch on interrupts.
  511. */
  512. if (regs->psw.mask & PSW_MASK_PSTATE)
  513. local_irq_enable();
  514. if (regs->psw.mask & PSW_MASK_PSTATE) {
  515. get_user(*((__u16 *) opcode), location);
  516. switch (opcode[0]) {
  517. case 0x28: /* LDR Rx,Ry */
  518. signal = math_emu_ldr(opcode);
  519. break;
  520. case 0x38: /* LER Rx,Ry */
  521. signal = math_emu_ler(opcode);
  522. break;
  523. case 0x60: /* STD R,D(X,B) */
  524. get_user(*((__u16 *) (opcode+2)), location+1);
  525. signal = math_emu_std(opcode, regs);
  526. break;
  527. case 0x68: /* LD R,D(X,B) */
  528. get_user(*((__u16 *) (opcode+2)), location+1);
  529. signal = math_emu_ld(opcode, regs);
  530. break;
  531. case 0x70: /* STE R,D(X,B) */
  532. get_user(*((__u16 *) (opcode+2)), location+1);
  533. signal = math_emu_ste(opcode, regs);
  534. break;
  535. case 0x78: /* LE R,D(X,B) */
  536. get_user(*((__u16 *) (opcode+2)), location+1);
  537. signal = math_emu_le(opcode, regs);
  538. break;
  539. default:
  540. signal = SIGILL;
  541. break;
  542. }
  543. } else
  544. signal = SIGILL;
  545. if (signal == SIGFPE)
  546. do_fp_trap(regs, location,
  547. current->thread.fp_regs.fpc, interruption_code);
  548. else if (signal) {
  549. siginfo_t info;
  550. info.si_signo = signal;
  551. info.si_errno = 0;
  552. info.si_code = ILL_ILLOPN;
  553. info.si_addr = location;
  554. do_trap(interruption_code, signal,
  555. "specification exception", regs, &info);
  556. }
  557. }
  558. #else
  559. DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
  560. ILL_ILLOPN, get_check_address(regs));
  561. #endif
  562. static void data_exception(struct pt_regs * regs, long interruption_code)
  563. {
  564. __u16 __user *location;
  565. int signal = 0;
  566. location = get_check_address(regs);
  567. /*
  568. * We got all needed information from the lowcore and can
  569. * now safely switch on interrupts.
  570. */
  571. if (regs->psw.mask & PSW_MASK_PSTATE)
  572. local_irq_enable();
  573. if (MACHINE_HAS_IEEE)
  574. asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
  575. #ifdef CONFIG_MATHEMU
  576. else if (regs->psw.mask & PSW_MASK_PSTATE) {
  577. __u8 opcode[6];
  578. get_user(*((__u16 *) opcode), location);
  579. switch (opcode[0]) {
  580. case 0x28: /* LDR Rx,Ry */
  581. signal = math_emu_ldr(opcode);
  582. break;
  583. case 0x38: /* LER Rx,Ry */
  584. signal = math_emu_ler(opcode);
  585. break;
  586. case 0x60: /* STD R,D(X,B) */
  587. get_user(*((__u16 *) (opcode+2)), location+1);
  588. signal = math_emu_std(opcode, regs);
  589. break;
  590. case 0x68: /* LD R,D(X,B) */
  591. get_user(*((__u16 *) (opcode+2)), location+1);
  592. signal = math_emu_ld(opcode, regs);
  593. break;
  594. case 0x70: /* STE R,D(X,B) */
  595. get_user(*((__u16 *) (opcode+2)), location+1);
  596. signal = math_emu_ste(opcode, regs);
  597. break;
  598. case 0x78: /* LE R,D(X,B) */
  599. get_user(*((__u16 *) (opcode+2)), location+1);
  600. signal = math_emu_le(opcode, regs);
  601. break;
  602. case 0xb3:
  603. get_user(*((__u16 *) (opcode+2)), location+1);
  604. signal = math_emu_b3(opcode, regs);
  605. break;
  606. case 0xed:
  607. get_user(*((__u32 *) (opcode+2)),
  608. (__u32 __user *)(location+1));
  609. signal = math_emu_ed(opcode, regs);
  610. break;
  611. case 0xb2:
  612. if (opcode[1] == 0x99) {
  613. get_user(*((__u16 *) (opcode+2)), location+1);
  614. signal = math_emu_srnm(opcode, regs);
  615. } else if (opcode[1] == 0x9c) {
  616. get_user(*((__u16 *) (opcode+2)), location+1);
  617. signal = math_emu_stfpc(opcode, regs);
  618. } else if (opcode[1] == 0x9d) {
  619. get_user(*((__u16 *) (opcode+2)), location+1);
  620. signal = math_emu_lfpc(opcode, regs);
  621. } else
  622. signal = SIGILL;
  623. break;
  624. default:
  625. signal = SIGILL;
  626. break;
  627. }
  628. }
  629. #endif
  630. if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
  631. signal = SIGFPE;
  632. else
  633. signal = SIGILL;
  634. if (signal == SIGFPE)
  635. do_fp_trap(regs, location,
  636. current->thread.fp_regs.fpc, interruption_code);
  637. else if (signal) {
  638. siginfo_t info;
  639. info.si_signo = signal;
  640. info.si_errno = 0;
  641. info.si_code = ILL_ILLOPN;
  642. info.si_addr = location;
  643. do_trap(interruption_code, signal,
  644. "data exception", regs, &info);
  645. }
  646. }
  647. static void space_switch_exception(struct pt_regs * regs, long int_code)
  648. {
  649. siginfo_t info;
  650. /* Set user psw back to home space mode. */
  651. if (regs->psw.mask & PSW_MASK_PSTATE)
  652. regs->psw.mask |= PSW_ASC_HOME;
  653. /* Send SIGILL. */
  654. info.si_signo = SIGILL;
  655. info.si_errno = 0;
  656. info.si_code = ILL_PRVOPC;
  657. info.si_addr = get_check_address(regs);
  658. do_trap(int_code, SIGILL, "space switch event", regs, &info);
  659. }
  660. asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
  661. {
  662. bust_spinlocks(1);
  663. printk("Kernel stack overflow.\n");
  664. show_regs(regs);
  665. bust_spinlocks(0);
  666. panic("Corrupt kernel stack, can't continue.");
  667. }
  668. /* init is done in lowcore.S and head.S */
  669. void __init trap_init(void)
  670. {
  671. int i;
  672. for (i = 0; i < 128; i++)
  673. pgm_check_table[i] = &default_trap_handler;
  674. pgm_check_table[1] = &illegal_op;
  675. pgm_check_table[2] = &privileged_op;
  676. pgm_check_table[3] = &execute_exception;
  677. pgm_check_table[4] = &do_protection_exception;
  678. pgm_check_table[5] = &addressing_exception;
  679. pgm_check_table[6] = &specification_exception;
  680. pgm_check_table[7] = &data_exception;
  681. pgm_check_table[8] = &overflow_exception;
  682. pgm_check_table[9] = &divide_exception;
  683. pgm_check_table[0x0A] = &overflow_exception;
  684. pgm_check_table[0x0B] = &divide_exception;
  685. pgm_check_table[0x0C] = &hfp_overflow_exception;
  686. pgm_check_table[0x0D] = &hfp_underflow_exception;
  687. pgm_check_table[0x0E] = &hfp_significance_exception;
  688. pgm_check_table[0x0F] = &hfp_divide_exception;
  689. pgm_check_table[0x10] = &do_dat_exception;
  690. pgm_check_table[0x11] = &do_dat_exception;
  691. pgm_check_table[0x12] = &translation_exception;
  692. pgm_check_table[0x13] = &special_op_exception;
  693. #ifdef CONFIG_64BIT
  694. pgm_check_table[0x38] = &do_asce_exception;
  695. pgm_check_table[0x39] = &do_dat_exception;
  696. pgm_check_table[0x3A] = &do_dat_exception;
  697. pgm_check_table[0x3B] = &do_dat_exception;
  698. #endif /* CONFIG_64BIT */
  699. pgm_check_table[0x15] = &operand_exception;
  700. pgm_check_table[0x1C] = &space_switch_exception;
  701. pgm_check_table[0x1D] = &hfp_sqrt_exception;
  702. pfault_irq_init();
  703. }