smp.h 2.8 KB

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  1. /*
  2. * include/asm-s390/smp.h
  3. *
  4. * S390 version
  5. * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com)
  8. * Heiko Carstens (heiko.carstens@de.ibm.com)
  9. */
  10. #ifndef __ASM_SMP_H
  11. #define __ASM_SMP_H
  12. #include <linux/threads.h>
  13. #include <linux/cpumask.h>
  14. #include <linux/bitops.h>
  15. #if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__)
  16. #include <asm/lowcore.h>
  17. #include <asm/sigp.h>
  18. #include <asm/ptrace.h>
  19. #include <asm/system.h>
  20. /*
  21. s390 specific smp.c headers
  22. */
  23. typedef struct
  24. {
  25. int intresting;
  26. sigp_ccode ccode;
  27. __u32 status;
  28. __u16 cpu;
  29. } sigp_info;
  30. extern void machine_restart_smp(char *);
  31. extern void machine_halt_smp(void);
  32. extern void machine_power_off_smp(void);
  33. #define NO_PROC_ID 0xFF /* No processor magic marker */
  34. /*
  35. * This magic constant controls our willingness to transfer
  36. * a process across CPUs. Such a transfer incurs misses on the L1
  37. * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My
  38. * gut feeling is this will vary by board in value. For a board
  39. * with separate L2 cache it probably depends also on the RSS, and
  40. * for a board with shared L2 cache it ought to decay fast as other
  41. * processes are run.
  42. */
  43. #define PROC_CHANGE_PENALTY 20 /* Schedule penalty */
  44. #define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr)
  45. static inline __u16 hard_smp_processor_id(void)
  46. {
  47. return stap();
  48. }
  49. /*
  50. * returns 1 if cpu is in stopped/check stopped state or not operational
  51. * returns 0 otherwise
  52. */
  53. static inline int
  54. smp_cpu_not_running(int cpu)
  55. {
  56. __u32 status;
  57. switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
  58. case sigp_order_code_accepted:
  59. case sigp_status_stored:
  60. /* Check for stopped and check stop state */
  61. if (status & 0x50)
  62. return 1;
  63. break;
  64. case sigp_not_operational:
  65. return 1;
  66. default:
  67. break;
  68. }
  69. return 0;
  70. }
  71. #define cpu_logical_map(cpu) (cpu)
  72. extern int __cpu_disable (void);
  73. extern void __cpu_die (unsigned int cpu);
  74. extern void cpu_die (void) __attribute__ ((noreturn));
  75. extern int __cpu_up (unsigned int cpu);
  76. extern struct mutex smp_cpu_state_mutex;
  77. extern int smp_cpu_polarization[];
  78. extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
  79. void *info, int wait);
  80. #endif
  81. #ifndef CONFIG_SMP
  82. static inline void smp_send_stop(void)
  83. {
  84. /* Disable all interrupts/machine checks */
  85. __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
  86. }
  87. #define hard_smp_processor_id() 0
  88. #define smp_cpu_not_running(cpu) 1
  89. #endif
  90. #ifdef CONFIG_HOTPLUG_CPU
  91. extern int smp_rescan_cpus(void);
  92. #else
  93. static inline int smp_rescan_cpus(void) { return 0; }
  94. #endif
  95. extern union save_area *zfcpdump_save_areas[NR_CPUS + 1];
  96. #endif