mpc8272_ads.c 5.3 KB

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  1. /*
  2. * MPC8272 ADS board support
  3. *
  4. * Copyright 2007 Freescale Semiconductor, Inc.
  5. * Author: Scott Wood <scottwood@freescale.com>
  6. *
  7. * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
  8. * Copyright (c) 2006 MontaVista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/fsl_devices.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/io.h>
  20. #include <asm/cpm2.h>
  21. #include <asm/udbg.h>
  22. #include <asm/machdep.h>
  23. #include <asm/time.h>
  24. #include <platforms/82xx/pq2.h>
  25. #include <sysdev/fsl_soc.h>
  26. #include <sysdev/cpm2_pic.h>
  27. #include "pq2ads.h"
  28. #include "pq2.h"
  29. static void __init mpc8272_ads_pic_init(void)
  30. {
  31. struct device_node *np = of_find_compatible_node(NULL, NULL,
  32. "fsl,cpm2-pic");
  33. if (!np) {
  34. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  35. return;
  36. }
  37. cpm2_pic_init(np);
  38. of_node_put(np);
  39. /* Initialize stuff for the 82xx CPLD IC and install demux */
  40. pq2ads_pci_init_irq();
  41. }
  42. struct cpm_pin {
  43. int port, pin, flags;
  44. };
  45. static struct cpm_pin mpc8272_ads_pins[] = {
  46. /* SCC1 */
  47. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  48. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  49. /* SCC4 */
  50. {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  51. {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  52. /* FCC1 */
  53. {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  54. {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  55. {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  56. {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  57. {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  58. {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  59. {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  60. {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  61. {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  62. {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  63. {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  64. {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  65. {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  66. {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
  67. {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  68. {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  69. /* FCC2 */
  70. {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  71. {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  72. {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  73. {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  74. {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  75. {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  76. {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  77. {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  78. {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  79. {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  80. {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  81. {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  82. {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  83. {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  84. {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  85. {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  86. /* I2C */
  87. {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
  88. {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
  89. };
  90. static void __init init_ioports(void)
  91. {
  92. int i;
  93. for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) {
  94. struct cpm_pin *pin = &mpc8272_ads_pins[i];
  95. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  96. }
  97. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
  98. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
  99. cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
  100. cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
  101. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
  102. cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
  103. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
  104. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
  105. }
  106. static void __init mpc8272_ads_setup_arch(void)
  107. {
  108. struct device_node *np;
  109. __be32 __iomem *bcsr;
  110. if (ppc_md.progress)
  111. ppc_md.progress("mpc8272_ads_setup_arch()", 0);
  112. cpm2_reset();
  113. np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
  114. if (!np) {
  115. printk(KERN_ERR "No bcsr in device tree\n");
  116. return;
  117. }
  118. bcsr = of_iomap(np, 0);
  119. of_node_put(np);
  120. if (!bcsr) {
  121. printk(KERN_ERR "Cannot map BCSR registers\n");
  122. return;
  123. }
  124. clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
  125. setbits32(&bcsr[1], BCSR1_FETH_RST);
  126. clrbits32(&bcsr[3], BCSR3_FETHIEN2);
  127. setbits32(&bcsr[3], BCSR3_FETH2_RST);
  128. iounmap(bcsr);
  129. init_ioports();
  130. pq2_init_pci();
  131. if (ppc_md.progress)
  132. ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
  133. }
  134. static struct of_device_id __initdata of_bus_ids[] = {
  135. { .name = "soc", },
  136. { .name = "cpm", },
  137. { .name = "localbus", },
  138. {},
  139. };
  140. static int __init declare_of_platform_devices(void)
  141. {
  142. /* Publish the QE devices */
  143. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  144. return 0;
  145. }
  146. machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
  147. /*
  148. * Called very early, device-tree isn't unflattened
  149. */
  150. static int __init mpc8272_ads_probe(void)
  151. {
  152. unsigned long root = of_get_flat_dt_root();
  153. return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
  154. }
  155. define_machine(mpc8272_ads)
  156. {
  157. .name = "Freescale MPC8272 ADS",
  158. .probe = mpc8272_ads_probe,
  159. .setup_arch = mpc8272_ads_setup_arch,
  160. .init_IRQ = mpc8272_ads_pic_init,
  161. .get_irq = cpm2_get_irq,
  162. .calibrate_decr = generic_calibrate_decr,
  163. .restart = pq2_restart,
  164. .progress = udbg_progress,
  165. };