mpc52xx_gpio.c 12 KB

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  1. /*
  2. * MPC52xx gpio driver
  3. *
  4. * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/of.h>
  20. #include <linux/kernel.h>
  21. #include <linux/of_gpio.h>
  22. #include <linux/io.h>
  23. #include <linux/of_platform.h>
  24. #include <asm/gpio.h>
  25. #include <asm/mpc52xx.h>
  26. #include <sysdev/fsl_soc.h>
  27. static DEFINE_SPINLOCK(gpio_lock);
  28. struct mpc52xx_gpiochip {
  29. struct of_mm_gpio_chip mmchip;
  30. unsigned int shadow_dvo;
  31. unsigned int shadow_gpioe;
  32. unsigned int shadow_ddr;
  33. };
  34. /*
  35. * GPIO LIB API implementation for wakeup GPIOs.
  36. *
  37. * There's a maximum of 8 wakeup GPIOs. Which of these are available
  38. * for use depends on your board setup.
  39. *
  40. * 0 -> GPIO_WKUP_7
  41. * 1 -> GPIO_WKUP_6
  42. * 2 -> PSC6_1
  43. * 3 -> PSC6_0
  44. * 4 -> ETH_17
  45. * 5 -> PSC3_9
  46. * 6 -> PSC2_4
  47. * 7 -> PSC1_4
  48. *
  49. */
  50. static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  51. {
  52. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  53. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  54. unsigned int ret;
  55. ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;
  56. pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
  57. return ret;
  58. }
  59. static inline void
  60. __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  61. {
  62. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  63. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  64. struct mpc52xx_gpiochip, mmchip);
  65. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  66. if (val)
  67. chip->shadow_dvo |= 1 << (7 - gpio);
  68. else
  69. chip->shadow_dvo &= ~(1 << (7 - gpio));
  70. out_8(&regs->wkup_dvo, chip->shadow_dvo);
  71. }
  72. static void
  73. mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  74. {
  75. unsigned long flags;
  76. spin_lock_irqsave(&gpio_lock, flags);
  77. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  78. spin_unlock_irqrestore(&gpio_lock, flags);
  79. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  80. }
  81. static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  82. {
  83. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  84. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  85. struct mpc52xx_gpiochip, mmchip);
  86. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  87. unsigned long flags;
  88. spin_lock_irqsave(&gpio_lock, flags);
  89. /* set the direction */
  90. chip->shadow_ddr &= ~(1 << (7 - gpio));
  91. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  92. /* and enable the pin */
  93. chip->shadow_gpioe |= 1 << (7 - gpio);
  94. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  95. spin_unlock_irqrestore(&gpio_lock, flags);
  96. return 0;
  97. }
  98. static int
  99. mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  100. {
  101. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  102. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  103. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  104. struct mpc52xx_gpiochip, mmchip);
  105. unsigned long flags;
  106. spin_lock_irqsave(&gpio_lock, flags);
  107. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  108. /* Then set direction */
  109. chip->shadow_ddr |= 1 << (7 - gpio);
  110. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  111. /* Finally enable the pin */
  112. chip->shadow_gpioe |= 1 << (7 - gpio);
  113. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  114. spin_unlock_irqrestore(&gpio_lock, flags);
  115. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  116. return 0;
  117. }
  118. static int __devinit mpc52xx_wkup_gpiochip_probe(struct of_device *ofdev,
  119. const struct of_device_id *match)
  120. {
  121. struct mpc52xx_gpiochip *chip;
  122. struct mpc52xx_gpio_wkup __iomem *regs;
  123. struct of_gpio_chip *ofchip;
  124. int ret;
  125. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  126. if (!chip)
  127. return -ENOMEM;
  128. ofchip = &chip->mmchip.of_gc;
  129. ofchip->gpio_cells = 2;
  130. ofchip->gc.ngpio = 8;
  131. ofchip->gc.direction_input = mpc52xx_wkup_gpio_dir_in;
  132. ofchip->gc.direction_output = mpc52xx_wkup_gpio_dir_out;
  133. ofchip->gc.get = mpc52xx_wkup_gpio_get;
  134. ofchip->gc.set = mpc52xx_wkup_gpio_set;
  135. ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip);
  136. if (ret)
  137. return ret;
  138. regs = chip->mmchip.regs;
  139. chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
  140. chip->shadow_ddr = in_8(&regs->wkup_ddr);
  141. chip->shadow_dvo = in_8(&regs->wkup_dvo);
  142. return 0;
  143. }
  144. static int mpc52xx_gpiochip_remove(struct of_device *ofdev)
  145. {
  146. return -EBUSY;
  147. }
  148. static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
  149. {
  150. .compatible = "fsl,mpc5200-gpio-wkup",
  151. },
  152. {}
  153. };
  154. static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = {
  155. .name = "gpio_wkup",
  156. .match_table = mpc52xx_wkup_gpiochip_match,
  157. .probe = mpc52xx_wkup_gpiochip_probe,
  158. .remove = mpc52xx_gpiochip_remove,
  159. };
  160. /*
  161. * GPIO LIB API implementation for simple GPIOs
  162. *
  163. * There's a maximum of 32 simple GPIOs. Which of these are available
  164. * for use depends on your board setup.
  165. * The numbering reflects the bit numbering in the port registers:
  166. *
  167. * 0..1 > reserved
  168. * 2..3 > IRDA
  169. * 4..7 > ETHR
  170. * 8..11 > reserved
  171. * 12..15 > USB
  172. * 16..17 > reserved
  173. * 18..23 > PSC3
  174. * 24..27 > PSC2
  175. * 28..31 > PSC1
  176. */
  177. static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  178. {
  179. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  180. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  181. unsigned int ret;
  182. ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;
  183. return ret;
  184. }
  185. static inline void
  186. __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  187. {
  188. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  189. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  190. struct mpc52xx_gpiochip, mmchip);
  191. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  192. if (val)
  193. chip->shadow_dvo |= 1 << (31 - gpio);
  194. else
  195. chip->shadow_dvo &= ~(1 << (31 - gpio));
  196. out_be32(&regs->simple_dvo, chip->shadow_dvo);
  197. }
  198. static void
  199. mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  200. {
  201. unsigned long flags;
  202. spin_lock_irqsave(&gpio_lock, flags);
  203. __mpc52xx_simple_gpio_set(gc, gpio, val);
  204. spin_unlock_irqrestore(&gpio_lock, flags);
  205. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  206. }
  207. static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  208. {
  209. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  210. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  211. struct mpc52xx_gpiochip, mmchip);
  212. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  213. unsigned long flags;
  214. spin_lock_irqsave(&gpio_lock, flags);
  215. /* set the direction */
  216. chip->shadow_ddr &= ~(1 << (31 - gpio));
  217. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  218. /* and enable the pin */
  219. chip->shadow_gpioe |= 1 << (31 - gpio);
  220. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  221. spin_unlock_irqrestore(&gpio_lock, flags);
  222. return 0;
  223. }
  224. static int
  225. mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  226. {
  227. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  228. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  229. struct mpc52xx_gpiochip, mmchip);
  230. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  231. unsigned long flags;
  232. spin_lock_irqsave(&gpio_lock, flags);
  233. /* First set initial value */
  234. __mpc52xx_simple_gpio_set(gc, gpio, val);
  235. /* Then set direction */
  236. chip->shadow_ddr |= 1 << (31 - gpio);
  237. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  238. /* Finally enable the pin */
  239. chip->shadow_gpioe |= 1 << (31 - gpio);
  240. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  241. spin_unlock_irqrestore(&gpio_lock, flags);
  242. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  243. return 0;
  244. }
  245. static int __devinit mpc52xx_simple_gpiochip_probe(struct of_device *ofdev,
  246. const struct of_device_id *match)
  247. {
  248. struct mpc52xx_gpiochip *chip;
  249. struct of_gpio_chip *ofchip;
  250. struct mpc52xx_gpio __iomem *regs;
  251. int ret;
  252. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  253. if (!chip)
  254. return -ENOMEM;
  255. ofchip = &chip->mmchip.of_gc;
  256. ofchip->gpio_cells = 2;
  257. ofchip->gc.ngpio = 32;
  258. ofchip->gc.direction_input = mpc52xx_simple_gpio_dir_in;
  259. ofchip->gc.direction_output = mpc52xx_simple_gpio_dir_out;
  260. ofchip->gc.get = mpc52xx_simple_gpio_get;
  261. ofchip->gc.set = mpc52xx_simple_gpio_set;
  262. ret = of_mm_gpiochip_add(ofdev->node, &chip->mmchip);
  263. if (ret)
  264. return ret;
  265. regs = chip->mmchip.regs;
  266. chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
  267. chip->shadow_ddr = in_be32(&regs->simple_ddr);
  268. chip->shadow_dvo = in_be32(&regs->simple_dvo);
  269. return 0;
  270. }
  271. static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
  272. {
  273. .compatible = "fsl,mpc5200-gpio",
  274. },
  275. {}
  276. };
  277. static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
  278. .name = "gpio",
  279. .match_table = mpc52xx_simple_gpiochip_match,
  280. .probe = mpc52xx_simple_gpiochip_probe,
  281. .remove = mpc52xx_gpiochip_remove,
  282. };
  283. /*
  284. * GPIO LIB API implementation for gpt GPIOs.
  285. *
  286. * Each gpt only has a single GPIO.
  287. */
  288. static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  289. {
  290. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  291. struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
  292. unsigned int ret;
  293. return (in_be32(&regs->status) & (1 << (31 - 23))) ? 1 : 0;
  294. return ret;
  295. }
  296. static void
  297. mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  298. {
  299. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  300. struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
  301. if (val)
  302. out_be32(&regs->mode, 0x34);
  303. else
  304. out_be32(&regs->mode, 0x24);
  305. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  306. }
  307. static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  308. {
  309. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  310. struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
  311. out_be32(&regs->mode, 0x04);
  312. return 0;
  313. }
  314. static int
  315. mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  316. {
  317. mpc52xx_gpt_gpio_set(gc, gpio, val);
  318. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  319. return 0;
  320. }
  321. static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
  322. const struct of_device_id *match)
  323. {
  324. struct of_mm_gpio_chip *mmchip;
  325. struct of_gpio_chip *chip;
  326. mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
  327. if (!mmchip)
  328. return -ENOMEM;
  329. chip = &mmchip->of_gc;
  330. chip->gpio_cells = 2;
  331. chip->gc.ngpio = 1;
  332. chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
  333. chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
  334. chip->gc.get = mpc52xx_gpt_gpio_get;
  335. chip->gc.set = mpc52xx_gpt_gpio_set;
  336. return of_mm_gpiochip_add(ofdev->node, mmchip);
  337. }
  338. static const struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
  339. {
  340. .compatible = "fsl,mpc5200-gpt-gpio",
  341. },
  342. {}
  343. };
  344. static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
  345. .name = "gpio_gpt",
  346. .match_table = mpc52xx_gpt_gpiochip_match,
  347. .probe = mpc52xx_gpt_gpiochip_probe,
  348. .remove = mpc52xx_gpiochip_remove,
  349. };
  350. static int __init mpc52xx_gpio_init(void)
  351. {
  352. if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
  353. printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
  354. if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
  355. printk(KERN_ERR "Unable to register simple GPIO driver\n");
  356. if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
  357. printk(KERN_ERR "Unable to register gpt GPIO driver\n");
  358. return 0;
  359. }
  360. /* Make sure we get initialised before anyone else tries to use us */
  361. subsys_initcall(mpc52xx_gpio_init);
  362. /* No exit call at the moment as we cannot unregister of gpio chips */
  363. MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
  364. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
  365. MODULE_LICENSE("GPL v2");